arch/arm: remove unused arm_copyfullstate/arm_copyarmstate

Signed-off-by: chao.an <anchao@xiaomi.com>
This commit is contained in:
chao.an 2022-03-03 16:23:35 +08:00 committed by Masayuki Ishikawa
parent 7b9978883c
commit 81130bc692
55 changed files with 45 additions and 783 deletions

View File

@ -55,7 +55,7 @@ CMN_CSRCS += arm_releasestack.c arm_usestack.c arm_vfork.c arm_puts.c arm_mdelay
CMN_CSRCS += arm_stackframe.c arm_udelay.c arm_modifyreg8.c arm_modifyreg16.c
CMN_CSRCS += arm_modifyreg32.c
CMN_CSRCS += arm_assert.c arm_blocktask.c arm_copyfullstate.c arm_dataabort.c
CMN_CSRCS += arm_assert.c arm_blocktask.c arm_dataabort.c
CMN_CSRCS += arm_doirq.c arm_initialstate.c arm_mmu.c arm_prefetchabort.c
CMN_CSRCS += arm_releasepending.c arm_reprioritizertr.c
CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c arm_syscall.c
@ -105,7 +105,6 @@ CMN_CSRCS += arm_cache.c
ifeq ($(CONFIG_ARCH_FPU),y)
CMN_ASRCS += arm_savefpu.S arm_restorefpu.S
CMN_CSRCS += arm_copyarmstate.c
endif
ifeq ($(CONFIG_STACK_COLORATION),y)

View File

@ -55,7 +55,7 @@ CMN_CSRCS += arm_createstack.c arm_releasestack.c arm_usestack.c arm_vfork.c
CMN_CSRCS += arm_puts.c arm_mdelay.c arm_stackframe.c arm_udelay.c
CMN_CSRCS += arm_modifyreg8.c arm_modifyreg16.c arm_modifyreg32.c
CMN_CSRCS += arm_assert.c arm_blocktask.c arm_copyfullstate.c arm_dataabort.c
CMN_CSRCS += arm_assert.c arm_blocktask.c arm_dataabort.c
CMN_CSRCS += arm_doirq.c arm_initialstate.c arm_mmu.c arm_prefetchabort.c
CMN_CSRCS += arm_releasepending.c arm_reprioritizertr.c
CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c arm_syscall.c
@ -101,7 +101,6 @@ CMN_CSRCS += arm_cache.c
ifeq ($(CONFIG_ARCH_FPU),y)
CMN_ASRCS += arm_savefpu.S arm_restorefpu.S
CMN_CSRCS += arm_copyarmstate.c
endif
ifeq ($(CONFIG_STACK_COLORATION),y)

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@ -1,66 +0,0 @@
/****************************************************************************
* arch/arm/src/arm/arm_copyfullstate.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdint.h>
#include <arch/irq.h>
#include "arm_internal.h"
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/****************************************************************************
* Private Data
****************************************************************************/
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: arm_copyfullstate
****************************************************************************/
/* A little faster than most memcpy's */
void arm_copyfullstate(uint32_t *dest, uint32_t *src)
{
int i;
/* In the current ARM model, the state is always copied to and from the
* stack and TCB.
*/
for (i = 0; i < XCPTCONTEXT_REGS; i++)
{
*dest++ = *src++;
}
}

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@ -1,70 +0,0 @@
/****************************************************************************
* arch/arm/src/armv6-m/arm_copyfullstate.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdint.h>
#include <arch/irq.h>
#include "arm_internal.h"
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/****************************************************************************
* Private Data
****************************************************************************/
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: arm_copyfullstate
****************************************************************************/
/* A little faster than most memcpy's */
void arm_copyfullstate(uint32_t *dest, uint32_t *src)
{
int i;
/* In the Cortex-M0 model, the state is copied from the stack to the TCB,
* but only a reference is passed to get the state from the TCB. So the
* following check avoids copying the TCB save area onto itself:
*/
if (src != dest)
{
for (i = 0; i < XCPTCONTEXT_REGS; i++)
{
*dest++ = *src++;
}
}
}

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@ -1,76 +0,0 @@
/****************************************************************************
* arch/arm/src/armv7-a/arm_copyarmstate.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdint.h>
#include <arch/irq.h>
#include "arm_internal.h"
#ifdef CONFIG_ARCH_FPU
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: arm_copyarmstate
*
* Description:
* Copy the ARM portion of the register save area (omitting the floating
* point registers) and save the floating pointer register directly.
*
****************************************************************************/
void arm_copyarmstate(uint32_t *dest, uint32_t *src)
{
int i;
/* In the Cortex-A model, the state is copied from the stack to the TCB,
* but only a reference is passed to get the state from the TCB. So the
* following check avoids copying the TCB save area onto itself:
*/
if (src != dest)
{
/* Save the floating point registers: This will initialize the floating
* registers at indices ARM_CONTEXT_REGS through (XCPTCONTEXT_REGS-1)
*/
arm_savefpu(dest);
/* Then copy all of the ARM registers (omitting the floating point
* registers). Indices: 0 through (ARM_CONTEXT_REGS-1).
*/
for (i = 0; i < ARM_CONTEXT_REGS; i++)
{
*dest++ = *src++;
}
}
}
#endif /* CONFIG_ARCH_FPU */

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@ -1,58 +0,0 @@
/****************************************************************************
* arch/arm/src/armv7-a/arm_copyfullstate.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdint.h>
#include <arch/irq.h>
#include "arm_internal.h"
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: arm_copyfullstate
*
* Description:
* Copy the entire register save area (including the floating point
* registers if applicable). This is a little faster than most memcpy's
* since it does 32-bit transfers.
*
****************************************************************************/
void arm_copyfullstate(uint32_t *dest, uint32_t *src)
{
int i;
/* In the current ARM model, the state is always copied to and from the
* stack and TCB.
*/
for (i = 0; i < XCPTCONTEXT_REGS; i++)
{
*dest++ = *src++;
}
}

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@ -1,90 +0,0 @@
/****************************************************************************
* arch/arm/src/armv7-m/arm_copyarmstate.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdint.h>
#include <arch/irq.h>
#include "arm_internal.h"
#if defined(CONFIG_ARCH_FPU) && defined(CONFIG_ARMV7M_LAZYFPU)
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: arm_copyarmstate
*
* Description:
* Copy the ARM portion of the register save area (omitting the floating
* point registers) and save the floating pointer register directly.
*
****************************************************************************/
void arm_copyarmstate(uint32_t *dest, uint32_t *src)
{
int i;
/* In the Cortex-M3 model, the state is copied from the stack to the TCB,
* but only a reference is passed to get the state from the TCB. So the
* following check avoids copying the TCB save area onto itself:
*/
if (src != dest)
{
/* Save the floating point registers: This will initialize the floating
* registers at indices SW_INT_REGS through (SW_INT_REGS+SW_FPU_REGS-1)
*/
arm_savefpu(dest);
/* Save the block of ARM registers that were saved by the interrupt
* handling logic. Indices: 0 through (SW_INT_REGS-1).
*/
for (i = 0; i < SW_INT_REGS; i++)
{
*dest++ = *src++;
}
/* Skip over the floating point registers and save the block of ARM
* registers that were saved by the hardware when the interrupt was
* taken. Indices: (SW_INT_REGS+SW_FPU_REGS) through
* (XCPTCONTEXT_REGS-1)
*/
src += SW_FPU_REGS;
dest += SW_FPU_REGS;
for (i = 0; i < HW_XCPT_REGS; i++)
{
*dest++ = *src++;
}
}
}
#endif /* CONFIG_ARCH_FPU && CONFIG_ARMV7M_LAZYFPU */

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@ -1,62 +0,0 @@
/****************************************************************************
* arch/arm/src/armv7-m/arm_copyfullstate.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdint.h>
#include <arch/irq.h>
#include "arm_internal.h"
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: arm_copyfullstate
*
* Description:
* Copy the entire register save area (including the floating point
* registers if applicable). This is a little faster than most memcpy's
* since it does 32-bit transfers.
*
****************************************************************************/
void arm_copyfullstate(uint32_t *dest, uint32_t *src)
{
int i;
/* In the Cortex-M3 model, the state is copied from the stack to the TCB,
* but only a reference is passed to get the state from the TCB. So the
* following check avoids copying the TCB save area onto itself:
*/
if (src != dest)
{
for (i = 0; i < XCPTCONTEXT_REGS; i++)
{
*dest++ = *src++;
}
}
}

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@ -1,76 +0,0 @@
/****************************************************************************
* arch/arm/src/armv7-r/arm_copyarmstate.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdint.h>
#include <arch/irq.h>
#include "arm_internal.h"
#ifdef CONFIG_ARCH_FPU
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: arm_copyarmstate
*
* Description:
* Copy the ARM portion of the register save area (omitting the floating
* point registers) and save the floating pointer register directly.
*
****************************************************************************/
void arm_copyarmstate(uint32_t *dest, uint32_t *src)
{
int i;
/* In the Cortex-R model, the state is copied from the stack to the TCB,
* but only a reference is passed to get the state from the TCB. So the
* following check avoids copying the TCB save area onto itself:
*/
if (src != dest)
{
/* Save the floating point registers: This will initialize the floating
* registers at indices ARM_CONTEXT_REGS through (XCPTCONTEXT_REGS-1)
*/
arm_savefpu(dest);
/* Then copy all of the ARM registers (omitting the floating point
* registers). Indices: 0 through (ARM_CONTEXT_REGS-1).
*/
for (i = 0; i < ARM_CONTEXT_REGS; i++)
{
*dest++ = *src++;
}
}
}
#endif /* CONFIG_ARCH_FPU */

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@ -1,58 +0,0 @@
/****************************************************************************
* arch/arm/src/armv7-r/arm_copyfullstate.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdint.h>
#include <arch/irq.h>
#include "arm_internal.h"
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: arm_copyfullstate
*
* Description:
* Copy the entire register save area (including the floating point
* registers if applicable). This is a little faster than most memcpy's
* since it does 32-bit transfers.
*
****************************************************************************/
void arm_copyfullstate(uint32_t *dest, uint32_t *src)
{
int i;
/* In the current ARM model, the state is always copied to and from the
* stack and TCB.
*/
for (i = 0; i < XCPTCONTEXT_REGS; i++)
{
*dest++ = *src++;
}
}

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@ -1,90 +0,0 @@
/****************************************************************************
* arch/arm/src/armv8-m/arm_copyarmstate.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdint.h>
#include <arch/irq.h>
#include "arm_internal.h"
#if defined(CONFIG_ARCH_FPU) && defined(CONFIG_ARMV8M_LAZYFPU)
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: arm_copyarmstate
*
* Description:
* Copy the ARM portion of the register save area (omitting the floating
* point registers) and save the floating pointer register directly.
*
****************************************************************************/
void arm_copyarmstate(uint32_t *dest, uint32_t *src)
{
int i;
/* In the Cortex-M3 model, the state is copied from the stack to the TCB,
* but only a reference is passed to get the state from the TCB. So the
* following check avoids copying the TCB save area onto itself:
*/
if (src != dest)
{
/* Save the floating point registers: This will initialize the floating
* registers at indices SW_INT_REGS through (SW_INT_REGS+SW_FPU_REGS-1)
*/
arm_savefpu(dest);
/* Save the block of ARM registers that were saved by the interrupt
* handling logic. Indices: 0 through (SW_INT_REGS-1).
*/
for (i = 0; i < SW_INT_REGS; i++)
{
*dest++ = *src++;
}
/* Skip over the floating point registers and save the block of ARM
* registers that were saved by the hardware when the interrupt was
* taken. Indices: (SW_INT_REGS+SW_FPU_REGS) through
* (XCPTCONTEXT_REGS-1)
*/
src += SW_FPU_REGS;
dest += SW_FPU_REGS;
for (i = 0; i < HW_XCPT_REGS; i++)
{
*dest++ = *src++;
}
}
}
#endif /* CONFIG_ARCH_FPU && CONFIG_ARMV8M_LAZYFPU */

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@ -1,62 +0,0 @@
/****************************************************************************
* arch/arm/src/armv8-m/arm_copyfullstate.c
*
* Licensed to the Apache Software Foundation (ASF) under one or more
* contributor license agreements. See the NOTICE file distributed with
* this work for additional information regarding copyright ownership. The
* ASF licenses this file to you under the Apache License, Version 2.0 (the
* "License"); you may not use this file except in compliance with the
* License. You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the
* License for the specific language governing permissions and limitations
* under the License.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <stdint.h>
#include <arch/irq.h>
#include "arm_internal.h"
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: arm_copyfullstate
*
* Description:
* Copy the entire register save area (including the floating point
* registers if applicable). This is a little faster than most memcpy's
* since it does 32-bit transfers.
*
****************************************************************************/
void arm_copyfullstate(uint32_t *dest, uint32_t *src)
{
int i;
/* In the Cortex-M3 model, the state is copied from the stack to the TCB,
* but only a reference is passed to get the state from the TCB. So the
* following check avoids copying the TCB save area onto itself:
*/
if (src != dest)
{
for (i = 0; i < XCPTCONTEXT_REGS; i++)
{
*dest++ = *src++;
}
}
}

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@ -22,7 +22,7 @@ HEAD_ASRC = arm_nommuhead.S
CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S vfork.S
CMN_CSRCS = arm_allocateheap.c arm_assert.c arm_blocktask.c arm_copyfullstate.c
CMN_CSRCS = arm_allocateheap.c arm_assert.c arm_blocktask.c
CMN_CSRCS += arm_createstack.c arm_dataabort.c arm_mdelay.c arm_udelay.c arm_doirq.c
CMN_CSRCS += arm_exit.c arm_initialize.c arm_initialstate.c arm_interruptcontext.c
CMN_CSRCS += arm_prefetchabort.c arm_releasepending.c arm_releasestack.c

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@ -327,10 +327,6 @@ void arm_boot(void);
/* Context switching */
void arm_copyfullstate(uint32_t *dest, uint32_t *src);
#ifdef CONFIG_ARCH_FPU
void arm_copyarmstate(uint32_t *dest, uint32_t *src);
#endif
uint32_t *arm_decodeirq(uint32_t *regs);
int arm_saveusercontext(uint32_t *saveregs);
void arm_fullcontextrestore(uint32_t *restoreregs) noreturn_function;

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@ -25,7 +25,7 @@ ifneq ($(CONFIG_CXD56_TESTSET),y)
CMN_ASRCS += arm_testset.S
endif
CMN_CSRCS = arm_assert.c arm_blocktask.c arm_copyfullstate.c
CMN_CSRCS = arm_assert.c arm_blocktask.c
CMN_CSRCS += arm_createstack.c arm_exit.c
CMN_CSRCS += arm_initialize.c arm_initialstate.c arm_interruptcontext.c
CMN_CSRCS += arm_memfault.c arm_modifyreg8.c arm_modifyreg16.c arm_modifyreg32.c
@ -62,7 +62,6 @@ endif
ifeq ($(CONFIG_ARCH_FPU),y)
CMN_ASRCS += arm_fpu.S
CMN_CSRCS += arm_copyarmstate.c
endif
ifeq ($(CONFIG_ARMV7M_ITMSYSLOG),y)

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@ -23,7 +23,7 @@ HEAD_ASRC = arm_head.S
CMN_ASRCS = arm_cache.S arm_fullcontextrestore.S arm_saveusercontext.S
CMN_ASRCS += arm_vectors.S arm_vectoraddrexcptn.S arm_vectortab.S vfork.S
CMN_CSRCS = arm_assert.c arm_blocktask.c arm_copyfullstate.c arm_createstack.c
CMN_CSRCS = arm_assert.c arm_blocktask.c arm_createstack.c
CMN_CSRCS += arm_dataabort.c arm_mdelay.c arm_udelay.c arm_exit.c
CMN_CSRCS += arm_initialize.c arm_initialstate.c arm_interruptcontext.c
CMN_CSRCS += arm_prefetchabort.c arm_releasepending.c arm_releasestack.c

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@ -21,7 +21,7 @@
CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S
CMN_ASRCS += arm_testset.S arm_fetchadd.S vfork.S
CMN_CSRCS = arm_allocateheap.c arm_assert.c arm_blocktask.c arm_copyfullstate.c
CMN_CSRCS = arm_allocateheap.c arm_assert.c arm_blocktask.c
CMN_CSRCS += arm_createstack.c arm_doirq.c arm_exit.c arm_hardfault.c
CMN_CSRCS += arm_initialize.c arm_initialstate.c arm_interruptcontext.c
CMN_CSRCS += arm_itm.c arm_mdelay.c arm_memfault.c arm_modifyreg8.c
@ -54,7 +54,6 @@ endif
ifeq ($(CONFIG_ARCH_FPU),y)
CMN_ASRCS += arm_fpu.S
CMN_CSRCS += arm_copyarmstate.c
endif
ifeq ($(CONFIG_ARMV7M_ITMSYSLOG),y)

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@ -21,7 +21,7 @@
CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S
CMN_ASRCS += arm_testset.S arm_fetchadd.S vfork.S
CMN_CSRCS = arm_allocateheap.c arm_assert.c arm_blocktask.c arm_copyfullstate.c
CMN_CSRCS = arm_allocateheap.c arm_assert.c arm_blocktask.c
CMN_CSRCS += arm_createstack.c arm_doirq.c arm_exit.c arm_hardfault.c
CMN_CSRCS += arm_initialize.c arm_initialstate.c arm_interruptcontext.c
CMN_CSRCS += arm_itm.c arm_mdelay.c arm_memfault.c arm_modifyreg8.c

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@ -22,7 +22,7 @@ HEAD_ASRC = arm_head.S
CMN_ASRCS = arm_cache.S arm_fullcontextrestore.S arm_saveusercontext.S
CMN_ASRCS += arm_vectors.S arm_vectoraddrexcptn.S arm_vectortab.S vfork.S
CMN_CSRCS = arm_assert.c arm_blocktask.c arm_copyfullstate.c arm_createstack.c
CMN_CSRCS = arm_assert.c arm_blocktask.c arm_createstack.c
CMN_CSRCS += arm_dataabort.c arm_mdelay.c arm_udelay.c arm_exit.c
CMN_CSRCS += arm_initialize.c arm_initialstate.c arm_interruptcontext.c
CMN_CSRCS += arm_prefetchabort.c arm_releasepending.c arm_releasestack.c

View File

@ -58,7 +58,7 @@ CMN_CSRCS += arm_releasestack.c arm_usestack.c arm_vfork.c arm_puts.c arm_mdelay
CMN_CSRCS += arm_stackframe.c arm_udelay.c arm_modifyreg8.c arm_modifyreg16.c
CMN_CSRCS += arm_modifyreg32.c
CMN_CSRCS += arm_assert.c arm_blocktask.c arm_copyfullstate.c arm_dataabort.c
CMN_CSRCS += arm_assert.c arm_blocktask.c arm_dataabort.c
CMN_CSRCS += arm_doirq.c arm_gicv2.c arm_initialstate.c arm_mmu.c
CMN_CSRCS += arm_prefetchabort.c arm_releasepending.c arm_reprioritizertr.c
CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c arm_syscall.c
@ -125,7 +125,6 @@ endif
ifeq ($(CONFIG_ARCH_FPU),y)
CMN_ASRCS += arm_savefpu.S arm_restorefpu.S
CMN_CSRCS += arm_copyarmstate.c
endif
ifeq ($(CONFIG_STACK_COLORATION),y)

View File

@ -23,7 +23,7 @@
CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S
CMN_ASRCS += arm_testset.S arm_fetchadd.S vfork.S
CMN_CSRCS = arm_assert.c arm_blocktask.c arm_copyfullstate.c
CMN_CSRCS = arm_assert.c arm_blocktask.c
CMN_CSRCS += arm_createstack.c arm_mdelay.c arm_udelay.c arm_exit.c
CMN_CSRCS += arm_initialize.c arm_initialstate.c arm_interruptcontext.c
CMN_CSRCS += arm_memfault.c arm_modifyreg8.c arm_modifyreg16.c arm_modifyreg32.c
@ -68,7 +68,6 @@ CMN_CSRCS += arm_cache.c
ifeq ($(CONFIG_ARCH_FPU),y)
CMN_ASRCS += arm_fpu.S
CMN_CSRCS += arm_copyarmstate.c
endif
# Required i.MX RT files

View File

@ -21,7 +21,7 @@
CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S
CMN_ASRCS += arm_testset.S arm_fetchadd.S vfork.S
CMN_CSRCS = arm_assert.c arm_blocktask.c arm_copyfullstate.c arm_createstack.c
CMN_CSRCS = arm_assert.c arm_blocktask.c arm_createstack.c
CMN_CSRCS += arm_mdelay.c arm_udelay.c arm_exit.c arm_initialize.c arm_memfault.c
CMN_CSRCS += arm_initialstate.c arm_interruptcontext.c arm_modifyreg8.c
CMN_CSRCS += arm_modifyreg16.c arm_modifyreg32.c arm_releasestack.c
@ -72,7 +72,6 @@ endif
ifeq ($(CONFIG_ARCH_FPU),y)
CMN_ASRCS += arm_fpu.S
CMN_CSRCS += arm_copyarmstate.c
endif
ifeq ($(CONFIG_ARMV7M_ITMSYSLOG),y)

View File

@ -21,7 +21,7 @@
CMN_ASRCS = arm_exception.S arm_saveusercontext.S arm_fullcontextrestore.S
CMN_ASRCS += vfork.S
CMN_CSRCS = arm_allocateheap.c arm_assert.c arm_blocktask.c arm_copyfullstate.c
CMN_CSRCS = arm_allocateheap.c arm_assert.c arm_blocktask.c
CMN_CSRCS += arm_createstack.c arm_mdelay.c arm_udelay.c arm_exit.c
CMN_CSRCS += arm_initialize.c arm_initialstate.c arm_interruptcontext.c
CMN_CSRCS += arm_puts.c arm_modifyreg8.c arm_modifyreg16.c arm_modifyreg32.c

View File

@ -21,7 +21,7 @@
CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S
CMN_ASRCS += vfork.S
CMN_CSRCS = arm_assert.c arm_blocktask.c arm_copyfullstate.c
CMN_CSRCS = arm_assert.c arm_blocktask.c
CMN_CSRCS += arm_createstack.c arm_mdelay.c arm_udelay.c arm_exit.c
CMN_CSRCS += arm_initialize.c arm_initialstate.c arm_interruptcontext.c
CMN_CSRCS += arm_memfault.c arm_modifyreg8.c arm_modifyreg16.c arm_modifyreg32.c

View File

@ -23,7 +23,7 @@
CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S
CMN_ASRCS += arm_testset.S arm_fetchadd.S vfork.S
CMN_CSRCS = arm_assert.c arm_blocktask.c arm_copyfullstate.c arm_createstack.c
CMN_CSRCS = arm_assert.c arm_blocktask.c arm_createstack.c
CMN_CSRCS += arm_mdelay.c arm_udelay.c arm_exit.c arm_initialize.c arm_memfault.c
CMN_CSRCS += arm_initialstate.c arm_interruptcontext.c arm_modifyreg8.c
CMN_CSRCS += arm_modifyreg16.c arm_modifyreg32.c arm_releasepending.c
@ -70,7 +70,6 @@ endif
ifeq ($(CONFIG_ARCH_FPU),y)
CMN_ASRCS += arm_fpu.S
CMN_CSRCS += arm_copyarmstate.c
endif
# Required LPC17xx files

View File

@ -23,7 +23,7 @@ HEAD_ASRC = lpc214x_head.S
CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S arm_vectors.S
CMN_ASRCS += vfork.S
CMN_CSRCS = arm_allocateheap.c arm_assert.c arm_blocktask.c arm_copyfullstate.c
CMN_CSRCS = arm_allocateheap.c arm_assert.c arm_blocktask.c
CMN_CSRCS += arm_createstack.c arm_dataabort.c arm_mdelay.c arm_udelay.c
CMN_CSRCS += arm_exit.c arm_initialize.c arm_initialstate.c
CMN_CSRCS += arm_interruptcontext.c arm_prefetchabort.c arm_releasepending.c

View File

@ -22,7 +22,7 @@ HEAD_ASRC = lpc23xx_head.S
CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S arm_vectors.S
CMN_ASRCS += vfork.S
CMN_CSRCS = arm_allocateheap.c arm_assert.c arm_blocktask.c arm_copyfullstate.c
CMN_CSRCS = arm_allocateheap.c arm_assert.c arm_blocktask.c
CMN_CSRCS += arm_createstack.c arm_dataabort.c arm_mdelay.c arm_udelay.c
CMN_CSRCS += arm_exit.c arm_initialize.c arm_initialstate.c
CMN_CSRCS += arm_interruptcontext.c arm_prefetchabort.c arm_releasepending.c

View File

@ -23,7 +23,7 @@ HEAD_ASRC = arm_head.S
CMN_ASRCS = arm_cache.S arm_fullcontextrestore.S arm_saveusercontext.S
CMN_ASRCS += arm_vectors.S arm_vectoraddrexcptn.S arm_vectortab.S vfork.S
CMN_CSRCS = arm_assert.c arm_blocktask.c arm_copyfullstate.c arm_createstack.c
CMN_CSRCS = arm_assert.c arm_blocktask.c arm_createstack.c
CMN_CSRCS += arm_dataabort.c arm_mdelay.c arm_udelay.c arm_exit.c
CMN_CSRCS += arm_initialize.c arm_initialstate.c arm_interruptcontext.c
CMN_CSRCS += arm_modifyreg8.c arm_modifyreg16.c arm_modifyreg32.c

View File

@ -21,7 +21,7 @@
CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S
CMN_ASRCS += arm_testset.S arm_fetchadd.S vfork.S
CMN_CSRCS = arm_assert.c arm_blocktask.c arm_copyfullstate.c arm_createstack.c
CMN_CSRCS = arm_assert.c arm_blocktask.c arm_createstack.c
CMN_CSRCS += arm_doirq.c arm_exit.c arm_hardfault.c arm_initialize.c
CMN_CSRCS += arm_initialstate.c arm_interruptcontext.c arm_mdelay.c
CMN_CSRCS += arm_memfault.c arm_modifyreg8.c arm_modifyreg16.c arm_modifyreg32.c
@ -58,7 +58,6 @@ endif
ifeq ($(CONFIG_ARCH_FPU),y)
CMN_ASRCS += arm_fpu.S
CMN_CSRCS += arm_copyarmstate.c
endif
CHIP_CSRCS = lpc43_allocateheap.c lpc43_cgu.c lpc43_clrpend.c lpc43_gpio.c

View File

@ -21,7 +21,7 @@
CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S
CMN_ASRCS += arm_testset.S arm_fetchadd.S vfork.S
CMN_CSRCS = arm_assert.c arm_blocktask.c arm_copyfullstate.c arm_createstack.c
CMN_CSRCS = arm_assert.c arm_blocktask.c arm_createstack.c
CMN_CSRCS += arm_doirq.c arm_exit.c arm_hardfault.c arm_initialize.c
CMN_CSRCS += arm_initialstate.c arm_interruptcontext.c arm_mdelay.c
CMN_CSRCS += arm_memfault.c arm_modifyreg8.c arm_modifyreg16.c arm_modifyreg32.c
@ -58,7 +58,6 @@ endif
ifeq ($(CONFIG_ARCH_FPU),y)
CMN_ASRCS += arm_fpu.S
CMN_CSRCS += arm_copyarmstate.c
endif
CHIP_CSRCS = lpc54_start.c lpc54_clockconfig.c lpc54_irq.c lpc54_clrpend.c

View File

@ -23,7 +23,7 @@
CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S
CMN_ASRCS += arm_testset.S arm_fetchadd.S vfork.S
CMN_CSRCS = arm_allocateheap.c arm_assert.c arm_blocktask.c arm_copyfullstate.c
CMN_CSRCS = arm_allocateheap.c arm_assert.c arm_blocktask.c
CMN_CSRCS += arm_createstack.c arm_doirq.c arm_exit.c arm_hardfault.c
CMN_CSRCS += arm_initialize.c arm_initialstate.c arm_interruptcontext.c
CMN_CSRCS += arm_mdelay.c arm_memfault.c arm_modifyreg8.c arm_modifyreg16.c
@ -56,7 +56,6 @@ endif
ifeq ($(CONFIG_ARCH_FPU),y)
CMN_ASRCS += arm_fpu.S
CMN_CSRCS += arm_copyarmstate.c
endif
# Common MAX326XX Source Files

View File

@ -22,7 +22,7 @@ HEAD_ASRC = moxart_head.S
CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S arm_vectors.S
CMN_ASRCS += arm_nommuhead.S vfork.S
CMN_CSRCS = arm_allocateheap.c arm_assert.c arm_blocktask.c arm_copyfullstate.c
CMN_CSRCS = arm_allocateheap.c arm_assert.c arm_blocktask.c
CMN_CSRCS += arm_createstack.c arm_dataabort.c arm_mdelay.c arm_udelay.c
CMN_CSRCS += arm_exit.c arm_initialstate.c arm_initialize.c
CMN_CSRCS += arm_interruptcontext.c arm_prefetchabort.c arm_releasepending.c

View File

@ -21,7 +21,7 @@
CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S
CMN_ASRCS += arm_testset.S vfork.S
CMN_CSRCS = arm_assert.c arm_blocktask.c arm_copyfullstate.c
CMN_CSRCS = arm_assert.c arm_blocktask.c
CMN_CSRCS += arm_createstack.c arm_doirq.c arm_exit.c arm_hardfault.c
CMN_CSRCS += arm_initialize.c arm_initialstate.c arm_interruptcontext.c
CMN_CSRCS += arm_memfault.c arm_modifyreg8.c arm_modifyreg16.c
@ -66,7 +66,6 @@ endif
ifeq ($(CONFIG_ARCH_FPU),y)
CMN_ASRCS += arm_fpu.S
CMN_CSRCS += arm_copyarmstate.c
endif
CHIP_CSRCS = nrf52_start.c nrf52_clockconfig.c nrf52_irq.c nrf52_utils.c

View File

@ -21,7 +21,7 @@
CMN_ASRCS = arm_exception.S arm_saveusercontext.S arm_fullcontextrestore.S
CMN_ASRCS += vfork.S
CMN_CSRCS = arm_allocateheap.c arm_assert.c arm_blocktask.c arm_copyfullstate.c
CMN_CSRCS = arm_allocateheap.c arm_assert.c arm_blocktask.c
CMN_CSRCS += arm_createstack.c arm_mdelay.c arm_udelay.c arm_exit.c
CMN_CSRCS += arm_initialize.c arm_initialstate.c arm_interruptcontext.c
CMN_CSRCS += arm_modifyreg8.c arm_modifyreg16.c arm_modifyreg32.c

View File

@ -22,7 +22,7 @@ CMN_ASRCS = phy62xx_exception.S phy62xx_start.S arm_saveusercontext.S arm_fullc
#CMN_ASRCS += arm_switchcontext.S vfork.S
CMN_ASRCS += vfork.S
CMN_CSRCS = arm_allocateheap.c arm_assert.c arm_blocktask.c arm_copyfullstate.c
CMN_CSRCS = arm_allocateheap.c arm_assert.c arm_blocktask.c
CMN_CSRCS += arm_createstack.c arm_mdelay.c arm_udelay.c arm_exit.c
CMN_CSRCS += arm_initialize.c arm_initialstate.c arm_interruptcontext.c
CMN_CSRCS += arm_puts.c arm_modifyreg8.c arm_modifyreg16.c arm_modifyreg32.c

View File

@ -21,7 +21,7 @@
CMN_ASRCS = arm_exception.S arm_saveusercontext.S arm_fullcontextrestore.S
CMN_ASRCS += vfork.S
CMN_CSRCS = arm_allocateheap.c arm_assert.c arm_blocktask.c arm_copyfullstate.c
CMN_CSRCS = arm_allocateheap.c arm_assert.c arm_blocktask.c
CMN_CSRCS += arm_createstack.c arm_mdelay.c arm_udelay.c arm_exit.c
CMN_CSRCS += arm_initialize.c arm_initialstate.c arm_interruptcontext.c
CMN_CSRCS += arm_modifyreg8.c arm_modifyreg16.c arm_modifyreg32.c

View File

@ -36,8 +36,8 @@ CMN_ASRCS += arm_testset.S vfork.S
CMN_UASRCS += arm_signal_handler.S
CMN_CSRCS += arm_assert.c arm_blocktask.c arm_cache.c arm_copyarmstate.c
CMN_CSRCS += arm_copyfullstate.c arm_doirq.c arm_hardfault.c arm_initialstate.c
CMN_CSRCS += arm_assert.c arm_blocktask.c arm_cache.c
CMN_CSRCS += arm_doirq.c arm_hardfault.c arm_initialstate.c
CMN_CSRCS += arm_itm_syslog.c arm_memfault.c arm_mpu.c arm_ramvec_attach.c
CMN_CSRCS += arm_ramvec_initialize.c arm_releasepending.c arm_reprioritizertr.c
CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c arm_signal_dispatch.c

View File

@ -23,7 +23,7 @@
CMN_ASRCS += arm_exception.S arm_saveusercontext.S arm_fullcontextrestore.S
CMN_ASRCS += vfork.S
CMN_CSRCS += arm_assert.c arm_blocktask.c arm_copyfullstate.c arm_createstack.c
CMN_CSRCS += arm_assert.c arm_blocktask.c arm_createstack.c
CMN_CSRCS += arm_initialstate.c arm_releasepending.c arm_reprioritizertr.c
CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c arm_systemreset.c
CMN_CSRCS += arm_unblocktask.c arm_doirq.c arm_hardfault.c arm_svcall.c

View File

@ -23,7 +23,7 @@
CMN_ASRCS += arm_saveusercontext.S arm_fullcontextrestore.S
CMN_ASRCS += arm_testset.S arm_fetchadd.S vfork.S
CMN_CSRCS += arm_assert.c arm_blocktask.c arm_copyfullstate.c arm_createstack.c
CMN_CSRCS += arm_assert.c arm_blocktask.c arm_createstack.c
CMN_CSRCS += arm_doirq.c arm_hardfault.c arm_initialstate.c arm_memfault.c
CMN_CSRCS += arm_releasepending.c arm_reprioritizertr.c arm_schedulesigaction.c
CMN_CSRCS += arm_sigdeliver.c arm_svcall.c arm_trigger_irq.c arm_unblocktask.c
@ -47,7 +47,6 @@ endif
ifeq ($(CONFIG_ARCH_FPU),y)
CMN_ASRCS += arm_fpu.S
CMN_CSRCS += arm_copyarmstate.c
endif
# Source file specific to the S32k11x family

View File

@ -25,7 +25,7 @@
CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S
CMN_ASRCS += arm_testset.S arm_fetchadd.S vfork.S
CMN_CSRCS = arm_assert.c arm_blocktask.c arm_copyfullstate.c arm_createstack.c
CMN_CSRCS = arm_assert.c arm_blocktask.c arm_createstack.c
CMN_CSRCS += arm_doirq.c arm_exit.c arm_hardfault.c arm_initialize.c
CMN_CSRCS += arm_initialstate.c arm_interruptcontext.c arm_mdelay.c
CMN_CSRCS += arm_memfault.c arm_modifyreg8.c arm_modifyreg16.c arm_modifyreg32.c
@ -66,7 +66,6 @@ endif
ifeq ($(CONFIG_ARCH_FPU),y)
CMN_ASRCS += arm_fpu.S
CMN_CSRCS += arm_copyarmstate.c
endif
ifeq ($(CONFIG_STACK_COLORATION),y)

View File

@ -57,7 +57,7 @@ CMN_CSRCS += arm_releasestack.c arm_usestack.c arm_vfork.c arm_puts.c arm_mdelay
CMN_CSRCS += arm_stackframe.c arm_udelay.c arm_modifyreg8.c arm_modifyreg16.c
CMN_CSRCS += arm_modifyreg32.c
CMN_CSRCS += arm_assert.c arm_blocktask.c arm_copyfullstate.c arm_dataabort.c
CMN_CSRCS += arm_assert.c arm_blocktask.c arm_dataabort.c
CMN_CSRCS += arm_doirq.c arm_initialstate.c arm_mmu.c arm_prefetchabort.c
CMN_CSRCS += arm_releasepending.c arm_reprioritizertr.c
CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c arm_syscall.c
@ -107,7 +107,6 @@ CMN_CSRCS += arm_cache.c
ifeq ($(CONFIG_ARCH_FPU),y)
CMN_ASRCS += arm_savefpu.S arm_restorefpu.S
CMN_CSRCS += arm_copyarmstate.c
endif
ifeq ($(CONFIG_STACK_COLORATION),y)

View File

@ -21,7 +21,7 @@
CMN_ASRCS = arm_exception.S arm_saveusercontext.S arm_fullcontextrestore.S
CMN_ASRCS += vfork.S
CMN_CSRCS = arm_allocateheap.c arm_assert.c arm_blocktask.c arm_copyfullstate.c
CMN_CSRCS = arm_allocateheap.c arm_assert.c arm_blocktask.c
CMN_CSRCS += arm_createstack.c arm_mdelay.c arm_udelay.c arm_exit.c
CMN_CSRCS += arm_initialize.c arm_initialstate.c arm_interruptcontext.c
CMN_CSRCS += arm_modifyreg8.c arm_modifyreg16.c arm_modifyreg32.c

View File

@ -25,7 +25,7 @@
CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S
CMN_ASRCS += arm_testset.S arm_fetchadd.S vfork.S
CMN_CSRCS = arm_allocateheap.c arm_assert.c arm_blocktask.c arm_copyfullstate.c
CMN_CSRCS = arm_allocateheap.c arm_assert.c arm_blocktask.c
CMN_CSRCS += arm_createstack.c arm_exit.c arm_initialize.c arm_initialstate.c
CMN_CSRCS += arm_interruptcontext.c arm_mdelay.c arm_memfault.c arm_modifyreg8.c
CMN_CSRCS += arm_modifyreg16.c arm_modifyreg32.c arm_releasepending.c
@ -56,7 +56,6 @@ endif
ifeq ($(CONFIG_ARCH_FPU),y)
CMN_ASRCS += arm_fpu.S
CMN_CSRCS += arm_copyarmstate.c
endif
ifeq ($(CONFIG_STACK_COLORATION),y)

View File

@ -26,7 +26,7 @@
CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S
CMN_ASRCS += arm_testset.S arm_fetchadd.S vfork.S
CMN_CSRCS = arm_assert.c arm_blocktask.c arm_copyfullstate.c arm_createstack.c
CMN_CSRCS = arm_assert.c arm_blocktask.c arm_createstack.c
CMN_CSRCS += arm_exit.c arm_hardfault.c arm_initialize.c arm_initialstate.c
CMN_CSRCS += arm_interruptcontext.c arm_mdelay.c arm_udelay.c arm_systemreset.c
CMN_CSRCS += arm_memfault.c arm_modifyreg8.c arm_modifyreg16.c arm_modifyreg32.c
@ -57,7 +57,6 @@ CMN_CSRCS += arm_cache.c
ifeq ($(CONFIG_ARCH_FPU),y)
CMN_ASRCS += arm_fpu.S
CMN_CSRCS += arm_copyarmstate.c
endif
ifeq ($(CONFIG_ARCH_RAMVECTORS),y)

View File

@ -21,7 +21,7 @@
CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S
CMN_ASRCS += arm_testset.S arm_fetchadd.S vfork.S
CMN_CSRCS = arm_assert.c arm_blocktask.c arm_copyfullstate.c arm_createstack.c
CMN_CSRCS = arm_assert.c arm_blocktask.c arm_createstack.c
CMN_CSRCS += arm_exit.c arm_hardfault.c arm_initialize.c arm_initialstate.c
CMN_CSRCS += arm_interruptcontext.c arm_memfault.c arm_modifyreg8.c arm_mdelay.c
CMN_CSRCS += arm_modifyreg16.c arm_modifyreg32.c arm_releasepending.c
@ -66,7 +66,6 @@ endif
ifeq ($(CONFIG_ARCH_FPU),y)
CMN_ASRCS += arm_fpu.S
CMN_CSRCS += arm_copyarmstate.c
endif
ifeq ($(CONFIG_ARMV7M_ITMSYSLOG),y)

View File

@ -21,7 +21,7 @@
CMN_ASRCS = arm_exception.S arm_saveusercontext.S arm_fullcontextrestore.S
CMN_ASRCS += vfork.S
CMN_CSRCS = arm_allocateheap.c arm_assert.c arm_blocktask.c arm_copyfullstate.c
CMN_CSRCS = arm_allocateheap.c arm_assert.c arm_blocktask.c
CMN_CSRCS += arm_createstack.c arm_mdelay.c arm_udelay.c arm_exit.c
CMN_CSRCS += arm_initialize.c arm_initialstate.c arm_interruptcontext.c
CMN_CSRCS += arm_puts.c arm_modifyreg8.c arm_modifyreg16.c arm_modifyreg32.c

View File

@ -26,7 +26,7 @@
CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S
CMN_ASRCS += arm_testset.S arm_fetchadd.S vfork.S
CMN_CSRCS = arm_assert.c arm_blocktask.c arm_copyfullstate.c arm_createstack.c
CMN_CSRCS = arm_assert.c arm_blocktask.c arm_createstack.c
CMN_CSRCS += arm_doirq.c arm_exit.c arm_hardfault.c arm_initialize.c
CMN_CSRCS += arm_initialstate.c arm_interruptcontext.c arm_mdelay.c
CMN_CSRCS += arm_memfault.c arm_modifyreg8.c arm_modifyreg16.c arm_modifyreg32.c
@ -57,7 +57,6 @@ CMN_CSRCS += arm_cache.c
ifeq ($(CONFIG_ARCH_FPU),y)
CMN_ASRCS += arm_fpu.S
CMN_CSRCS += arm_copyarmstate.c
endif
ifeq ($(CONFIG_ARCH_RAMVECTORS),y)

View File

@ -26,7 +26,7 @@
CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S
CMN_ASRCS += arm_testset.S vfork.S
CMN_CSRCS = arm_assert.c arm_blocktask.c arm_copyfullstate.c arm_createstack.c
CMN_CSRCS = arm_assert.c arm_blocktask.c arm_createstack.c
CMN_CSRCS += arm_doirq.c arm_exit.c arm_hardfault.c arm_initialize.c
CMN_CSRCS += arm_initialstate.c arm_interruptcontext.c arm_mdelay.c arm_memfault.c
CMN_CSRCS += arm_modifyreg8.c arm_modifyreg16.c arm_modifyreg32.c
@ -52,7 +52,6 @@ CMN_CSRCS += arm_vectors.c
CMN_CSRCS += arm_cache.c
ifeq ($(CONFIG_ARCH_FPU),y)
CMN_ASRCS += arm_fpu.S
CMN_CSRCS += arm_copyarmstate.c
endif
ifneq ($(CONFIG_ARCH_IDLE_CUSTOM),y)

View File

@ -26,7 +26,7 @@
CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S
CMN_ASRCS += arm_testset.S arm_fetchadd.S vfork.S
CMN_CSRCS = arm_assert.c arm_blocktask.c arm_copyfullstate.c arm_createstack.c
CMN_CSRCS = arm_assert.c arm_blocktask.c arm_createstack.c
CMN_CSRCS += arm_doirq.c arm_exit.c arm_hardfault.c arm_initialize.c
CMN_CSRCS += arm_initialstate.c arm_interruptcontext.c arm_mdelay.c arm_memfault.c
CMN_CSRCS += arm_modifyreg8.c arm_modifyreg16.c arm_modifyreg32.c
@ -51,7 +51,6 @@ CMN_CSRCS += arm_vectors.c
ifeq ($(CONFIG_ARCH_FPU),y)
CMN_ASRCS += arm_fpu.S
CMN_CSRCS += arm_copyarmstate.c
endif
ifeq ($(CONFIG_ARCH_RAMVECTORS),y)

View File

@ -31,7 +31,7 @@ CMN_UCSRCS =
CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S
CMN_ASRCS += arm_testset.S arm_fetchadd.S vfork.S
CMN_CSRCS = arm_assert.c arm_blocktask.c arm_copyfullstate.c arm_createstack.c
CMN_CSRCS = arm_assert.c arm_blocktask.c arm_createstack.c
CMN_CSRCS += arm_doirq.c arm_exit.c arm_hardfault.c arm_initialize.c
CMN_CSRCS += arm_initialstate.c arm_interruptcontext.c arm_mdelay.c arm_memfault.c
CMN_CSRCS += arm_modifyreg8.c arm_modifyreg16.c arm_modifyreg32.c
@ -56,7 +56,6 @@ CMN_CSRCS += arm_vectors.c
ifeq ($(CONFIG_ARCH_FPU),y)
CMN_ASRCS += arm_fpu.S
CMN_CSRCS += arm_copyarmstate.c
endif
ifeq ($(CONFIG_ARCH_RAMVECTORS),y)

View File

@ -31,7 +31,7 @@ CMN_UCSRCS =
CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S
CMN_ASRCS += arm_testset.S arm_fetchadd.S vfork.S
CMN_CSRCS = arm_assert.c arm_blocktask.c arm_copyfullstate.c arm_createstack.c
CMN_CSRCS = arm_assert.c arm_blocktask.c arm_createstack.c
CMN_CSRCS += arm_doirq.c arm_exit.c arm_hardfault.c arm_initialize.c
CMN_CSRCS += arm_initialstate.c arm_interruptcontext.c arm_mdelay.c arm_memfault.c
CMN_CSRCS += arm_modifyreg8.c arm_modifyreg16.c arm_modifyreg32.c arm_puts.c
@ -56,7 +56,6 @@ CMN_CSRCS += arm_vectors.c
ifeq ($(CONFIG_ARCH_FPU),y)
CMN_ASRCS += arm_fpu.S
CMN_CSRCS += arm_copyarmstate.c
endif
ifeq ($(CONFIG_ARCH_RAMVECTORS),y)

View File

@ -23,7 +23,7 @@ HEAD_ASRC = str71x_head.S
CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S arm_vectors.S
CMN_ASRCS += vfork.S
CMN_CSRCS = arm_allocateheap.c arm_assert.c arm_blocktask.c arm_copyfullstate.c
CMN_CSRCS = arm_allocateheap.c arm_assert.c arm_blocktask.c
CMN_CSRCS += arm_createstack.c arm_dataabort.c arm_mdelay.c arm_udelay.c
CMN_CSRCS += arm_exit.c arm_initialize.c arm_initialstate.c
CMN_CSRCS += arm_interruptcontext.c arm_prefetchabort.c arm_releasepending.c

View File

@ -21,7 +21,7 @@
CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S
CMN_ASRCS += arm_testset.S arm_fetchadd.S vfork.S
CMN_CSRCS = arm_assert.c arm_blocktask.c arm_copyfullstate.c arm_createstack.c
CMN_CSRCS = arm_assert.c arm_blocktask.c arm_createstack.c
CMN_CSRCS += arm_doirq.c arm_exit.c arm_hardfault.c arm_initialize.c
CMN_CSRCS += arm_initialstate.c arm_interruptcontext.c arm_mdelay.c
CMN_CSRCS += arm_memfault.c arm_modifyreg8.c arm_modifyreg16.c arm_modifyreg32.c
@ -49,7 +49,6 @@ CMN_CSRCS += arm_vectors.c
ifeq ($(CONFIG_ARCH_FPU),y)
CMN_ASRCS += arm_fpu.S
CMN_CSRCS += arm_copyarmstate.c
endif
ifeq ($(CONFIG_ARCH_RAMVECTORS),y)

View File

@ -46,7 +46,7 @@ CMN_CSRCS += arm_exit.c arm_createstack.c arm_releasestack.c arm_usestack.c
CMN_CSRCS += arm_vfork.c arm_puts.c arm_mdelay.c arm_stackframe.c arm_udelay.c
CMN_CSRCS += arm_modifyreg8.c arm_modifyreg16.c arm_modifyreg32.c
CMN_CSRCS += arm_assert.c arm_blocktask.c arm_copyfullstate.c arm_dataabort.c
CMN_CSRCS += arm_assert.c arm_blocktask.c arm_dataabort.c
CMN_CSRCS += arm_doirq.c arm_initialstate.c arm_prefetchabort.c
CMN_CSRCS += arm_releasepending.c arm_reprioritizertr.c
CMN_CSRCS += arm_schedulesigaction.c arm_sigdeliver.c arm_syscall.c
@ -73,7 +73,6 @@ CMN_CSRCS += arm_cache.c
ifeq ($(CONFIG_ARCH_FPU),y)
CMN_ASRCS += arm_savefpu.S arm_restorefpu.S
CMN_CSRCS += arm_copyarmstate.c
endif
ifeq ($(CONFIG_STACK_COLORATION),y)

View File

@ -21,7 +21,7 @@
CMN_ASRCS = arm_saveusercontext.S arm_fullcontextrestore.S
CMN_ASRCS += arm_testset.S arm_fetchadd.S vfork.S
CMN_CSRCS = arm_assert.c arm_blocktask.c arm_copyfullstate.c arm_createstack.c
CMN_CSRCS = arm_assert.c arm_blocktask.c arm_createstack.c
CMN_CSRCS += arm_doirq.c arm_exit.c arm_initialize.c arm_initialstate.c
CMN_CSRCS += arm_hardfault.c arm_interruptcontext.c arm_memfault.c arm_mdelay.c
CMN_CSRCS += arm_modifyreg8.c arm_modifyreg16.c arm_modifyreg32.c
@ -71,7 +71,6 @@ endif
ifeq ($(CONFIG_ARCH_FPU),y)
CMN_ASRCS += arm_fpu.S
CMN_CSRCS += arm_copyarmstate.c
endif
ifeq ($(CONFIG_ARMV7M_ITMSYSLOG),y)