ARMv7-A: Need 8-byte stack alignment when callign C code from interrupt handlers. This change needs to be ported to other ARM architectures as well
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@ -5165,4 +5165,7 @@
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definitions for the SAMA5D3 (2013-7-23).
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* arch/arm/src/sama5/chip/: New header files for SAMA5 AXI Matrix
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SFR, and BSC blocks (2013-7-23).
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* arch/arm/src/armv7-a/arm_vectors.S: Force 8-byte stack alignment
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in interrupt handlers before calling C code. Other ARM
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architectures need to do this as well (2013-7-23).
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83
TODO
83
TODO
@ -1,7 +1,7 @@
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NuttX TODO List (Last updated June 23, 2013)
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NuttX TODO List (Last updated July 23, 2013)
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^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
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This file summarizes known NuttX bugs, limitations, inconsistencies with
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This file summarizes known NuttX bugs, limitations, inconsistencies with
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standards, things that could be improved, and ideas for enhancements. See
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also individual README.txt files in the configs/ sub-directories for each
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board port.
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@ -24,7 +24,7 @@ nuttx/
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(1) Documentation (Documentation/)
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(6) Build system / Toolchains
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(5) Linux/Cywgin simulation (arch/sim)
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(4) ARM (arch/arm/)
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(5) ARM (arch/arm/)
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(1) ARM/C5471 (arch/arm/src/c5471/)
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(3) ARM/DM320 (arch/arm/src/dm320/)
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(2) ARM/i.MX (arch/arm/src/imx/)
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@ -149,7 +149,7 @@ o Task/Scheduler (sched/)
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Title: ISSUES WITH atexit() AND on_exit()
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Description: These functions execute with the following bad properties:
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1. They run with interrupts disabled,
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2. They run in supervisor mode (if applicable), and
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3. They do not obey any setup of PIC or address
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@ -426,7 +426,7 @@ o Kernel Build
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the count becomes negative the caller must be blocked.
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Update:
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"I am thinking that there should be a "magic" global, user-accessible
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"I am thinking that there should be a "magic" global, user-accessible
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variable that holds the PID of the currently executing thread;
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basically the PID of the task at the head of the ready-to-run list.
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This variable would have to be reset each time the head of the ready-
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@ -474,10 +474,10 @@ o Kernel Build
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OS services within the kernel and with other OS facilities, such
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as the file system, message queues, etc., residing in user-space
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and to interfacing with those core OS facilities through traps.
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Status: Open
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Status: Open
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Priority: Low. This is a good idea and certainly an architectural
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improvement. However, there is no strong motivivation now do
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do that partitioning work.
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do that partitioning work.
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o C++ Support
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^^^^^^^^^^^
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@ -641,7 +641,7 @@ o Binary loaders (binfmt/)
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Priority: Medium-High
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Title: READ-ONLY DATA IN RAM
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Description: At present, all .rodata must be put into RAM. There is a
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Description: At present, all .rodata must be put into RAM. There is a
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tentative design change that might allow .rodata to be placed
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in FLASH (see Documentation/NuttXNxFlat.html).
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Status: Open
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@ -676,9 +676,9 @@ o Binary loaders (binfmt/)
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else
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NXFLATLDSCRIPT=$(TOPDIR)/binfmt/libnxflat/gnu-nxflat-gotoff.ld
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endif
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Then use
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NXFLATLDFLAGS2 = $(NXFLATLDFLAGS1) -T"$(NXFLATLDSCRIPT)" -no-check-sections
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Status: Open
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@ -712,15 +712,15 @@ o Binary loaders (binfmt/)
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.word .LC4-(.LPIC5+4)
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This is good and bad. This is good because it means that .rodata.str1.1 can now
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reside in FLASH with .text and can be accessed using PC-relative addressing.
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reside in FLASH with .text and can be accessed using PC-relative addressing.
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That can be accomplished by simply moving the .rodata from the .data section to
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the .text section in the linker script. (The NXFLAT linker script is located at
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nuttx/binfmt/libnxflat/gnu-nxflat.ld).
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This is bad because a lot of stuff may get broken an a lot of test will need to
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be done. One question that I have is does this apply to all kinds of .rodata?
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be done. One question that I have is does this apply to all kinds of .rodata?
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Or just to .rodata.str1.1?
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Status: Open. Many of the required changes are in place but, unfortunately, not enough
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go be fully functional. I think all of the I-Space-to-I-Space fixes are in place.
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However, the generated code also includes PC-relative references to .bss which
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@ -797,7 +797,7 @@ o Network (net/, drivers/net)
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Description: At present, there cannot be two concurrent active TCP send
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operations in progress using the same socket. This is because
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the uIP ACK logic will support only one transfer at a time. The
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solution is simple: A mutex will be needed to make sure that each
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solution is simple: A mutex will be needed to make sure that each
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send that is started is able to be the exclusive sender until all of
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the data to be sent has been ACKed.
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Status: Open. There is some temporary logic to apps/nshlib that does
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@ -1001,13 +1001,13 @@ o Libraries (libc/)
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Title: RESETTING GETOPT()
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Description: There is an issue with the way that getopt() handles errors that
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return '?'.
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1. Does getopt() reset its global variables after returning '?' so
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that it can be re-used? That would be required to support where
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the caller terminates parsing before reaching the last parameter.
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2. Or is the client expected to continue parsing after getopt()
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returns '?' and parse until the final parameter?
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The current getopt() implementation only supports #2.
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Status: Open
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Priority: Low
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@ -1030,11 +1030,11 @@ o Libraries (libc/)
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ferror().
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Title: CONCURRENT STREAM READ/WRITE
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Description: NuttX only supports a single file pointer so reads and writes
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Description: NuttX only supports a single file pointer so reads and writes
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must be from the same position. This prohibits implementation
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of behavior like that required for fopen() with the "a+" mode.
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According to the fopen man page:
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"a+ Open for reading and appending (writing at end of file).
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The file is created if it does not exist. The initial file
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position for reading is at the beginning of the file, but
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@ -1059,11 +1059,11 @@ o Libraries (libc/)
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by zero, since it will result in a compile-time diagnostic, if the
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implementation does not support infinity."
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Status: Open
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Priority:
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Priority:
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Title: OLD dtoa NEEDS TO BE UPDATED
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Description: This implementation of dtoa in libc/stdio is old and will not
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work with some newer compilers. See
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work with some newer compilers. See
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http://patrakov.blogspot.com/2009/03/dont-use-old-dtoac.html
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Status: Open
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Priority: ??
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@ -1208,7 +1208,7 @@ o Graphics subystem (graphics/)
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Priority: Medium. Not important for day-to-day testing but would be
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a critical improvement if NxConsole were to be used in a
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product.
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o Pascal Add-On (pcode/)
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^^^^^^^^^^^^^^^^^^^^^^
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@ -1350,7 +1350,7 @@ o Linux/Cywgin simulation (arch/sim)
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least, partially functional (it has never been rigorously tested).
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Status: Open
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Priority: Low (unless you want to test networking features on the simulation).
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Title: ROUND-ROBIN SCHEDULING IN THE SIMULATOR
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Description: Since the simulation is not pre-emptible, you can't use round-robin
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scheduling (no time slicing). Currently, the timer interrupts are
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@ -1361,7 +1361,7 @@ o Linux/Cywgin simulation (arch/sim)
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irqrestore() to block and (conditionally) unblock the signal.
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Status: Open
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Priority: Low
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Title: NSH ISSUES ON THE SIMULATOR
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Descripion: The NSH example has some odd behaviors. Mult-tasking -- for example,
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execution of commands in background -- does not work normally. This
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@ -1455,6 +1455,31 @@ o ARM (arch/arm/)
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If your design needs continous interrupts like this, please try
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the above change and, please, submit a patch with the working fix.
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Title: STACK ALIGNMENT IN INTERRUPT HANDLERS
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Description: The EABI standard requires that the stack always have a 32-byte
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alignment. There is no guaratee at present that the stack will be
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so aligned in an interrupt handler. Therefore, I would expect some
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issues if, for example, floating point or perhaps long long operations
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were performed in an interrupt handler.
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This issue exists for ARM7, ARM9, Cortex-M0, Cortex-M3, and
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Cortex-M4 but has been addressed for the Cortex-A5. The fix
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is really simple can cannot be incorporated without some
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substantial testing. For ARM, the fix is the following logic
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arround each call into C code from assembly:
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mov r4, sp /* Save the SP in a preserved register */
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bic sp, sp, #7 /* Force 8-byte alignement */
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bl cfunction /* Call the C function */
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mov sp, r4 /* Restore the possibly unaligned stack pointer */
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This same issue applies to the interrupt stack which is, I think
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improperly aligned in almost all cases (except Cortex-A5).
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Status: Open
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Priority: Low for me because I never do floating point operations in
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interrupt handlers.
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o ARM/C5471 (arch/arm/src/c5471/)
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^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
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@ -1590,7 +1615,7 @@ o ARM/LPC214x (arch/arm/src/lpc214x/)
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Title: USB BROKEN?
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Description: I tried to bring up the new configuration at configs/mcu123-214x/composite,
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and Linux failed to enumerate the device. I don't know if this is
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and Linux failed to enumerate the device. I don't know if this is
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a problem with the lpc214x USB driver (bit rot), or due to recent
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changed (e.g., -r4359 is suspicious), or an incompatibility between the
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Composite driver and the LPC214x USB driver. It will take more work
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@ -1698,7 +1723,7 @@ o ARM/STM32 (arch/arm/src/stm32/)
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is sent, the driver works fine.
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Status: Open
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Priority: Medium-High
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Title: DMA EXTENSIONS F1/3
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Description: DMA logic needs to be extended. DMA2, Channel 5, will not work
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because the DMA2 channels 4 & 5 share the same interrupt.
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@ -1941,7 +1966,7 @@ o Renesas M16C/26 (arch/sh/src/m16c)
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^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
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Title: M16C DOES NOT BUILD
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Description: The M16C target cannot be built. The GNU m16c-elf-ld link fails with
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Description: The M16C target cannot be built. The GNU m16c-elf-ld link fails with
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the following message:
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m32c-elf-ld: BFD (GNU Binutils) 2.19 assertion fail /home/Owner/projects/nuttx/buildroot/toolchain_build_m32c/binutils-2.19/bfd/elf32-m32c.c:482
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@ -2167,7 +2192,7 @@ o z16 (arch/z16)
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Title: ZDS-II COMPILER PROBLEMS
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Description: The file drivers/mmcsd/mmcsd_sdio.c generates an internal compiler
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error like:
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mmcsd\mmcsd_sdio.c
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Internal Error(0503) On line 2504 of "MMCSD\MMCSD_SDIO.C"
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File <c3>, Args(562,46)
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@ -2182,7 +2207,7 @@ o z16 (arch/z16)
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reliable Windows native build. As of this writing, the Cygwin
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based build has not been re-verified.
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Status: Open
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Priority: Low -- I don't think anyone uses the Z16 port.
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Priority: Low -- I don't think anyone uses the Z16 port.
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o mc68hc1x (arch/hc)
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^^^^^^^^^^^^^^^^^^
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@ -2219,7 +2244,7 @@ o Network Utilities (apps/netutils/)
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Title: THE ARP ISSUES AGAIN
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Description: The first GET received by THTTPD is not responded to. Refreshing the page
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from the browser solves the problem and THTTPD works fine after thatg. I
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from the browser solves the problem and THTTPD works fine after thatg. I
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believe that this is the duplicate of another bug: "Outgoing [uIP] packets are dropped
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and overwritten by ARP packets if the destination IP has not been mapped to a MAC."
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Status: Open
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@ -134,10 +134,15 @@ arm_vectorirq:
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#if CONFIG_ARCH_INTERRUPTSTACK > 3
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ldr sp, .Lirqstackbase /* SP = interrupt stack base */
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str r0, [sp] /* Save the user stack pointer */
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mov r4, sp /* Save the SP in a preserved register */
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bic sp, sp, #7 /* Force 8-byte alignement */
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bl up_decodeirq /* Call the handler */
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ldr sp, [sp] /* Restore the user stack pointer */
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ldr sp, [r4] /* Restore the user stack pointer */
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#else
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mov r4, sp /* Save the SP in a preserved register */
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bic sp, sp, #7 /* Force 8-byte alignement */
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bl up_decodeirq /* Call the handler */
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mov sp, r4 /* Restore the possibly unaligned stack pointer */
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#endif
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/* Restore the CPSR, SVC modr registers and return */
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@ -192,7 +197,10 @@ arm_vectorswi:
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mov fp, #0 /* Init frame pointer */
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mov r0, sp /* Get r0=xcp */
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mov r4, sp /* Save the SP in a preserved register */
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bic sp, sp, #7 /* Force 8-byte alignement */
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bl up_syscall /* Call the handler */
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mov sp, r4 /* Restore the possibly unaligned stack pointer */
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/* Restore the CPSR, SVC modr registers and return */
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@ -262,7 +270,10 @@ arm_vectordata:
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mov r0, sp /* Get r0=xcp */
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mrc CP15_DFAR(r1) /* Get R1=DFAR */
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mrc CP15_DFSR(r2) /* Get r2=DFSR */
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mov r4, sp /* Save the SP in a preserved register */
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bic sp, sp, #7 /* Force 8-byte alignement */
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bl arm_dataabort /* Call the handler */
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mov sp, r4 /* Restore the possibly unaligned stack pointer */
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/* Restore the CPSR, SVC modr registers and return */
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@ -335,7 +346,10 @@ arm_vectorprefetch:
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mov r0, sp /* Get r0=xcp */
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mrc CP15_IFAR(r1) /* Get R1=IFAR */
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mrc CP15_IFSR(r2) /* Get r2=IFSR */
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mov r4, sp /* Save the SP in a preserved register */
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bic sp, sp, #7 /* Force 8-byte alignement */
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bl arm_prefetchabort /* Call the handler */
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mov sp, r4 /* Restore the possibly unaligned stack pointer */
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/* Restore the CPSR, SVC modr registers and return */
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@ -403,7 +417,10 @@ arm_vectorundefinsn:
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mov fp, #0 /* Init frame pointer */
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mov r0, sp /* Get r0=xcp */
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mov r4, sp /* Save the SP in a preserved register */
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bic sp, sp, #7 /* Force 8-byte alignement */
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bl arm_undefinedinsn /* Call the handler */
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mov sp, r4 /* Restore the possibly unaligned stack pointer */
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/* Restore the CPSR, SVC modr registers and return */
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