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ESP32: Clock configuration is not yet implemented. ESP32 will be running a XTAL frequency.

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This commit is contained in:
Gregory Nutt 2016-10-24 07:30:11 -06:00
parent 4cf60022ca
commit 818b0171d7
6 changed files with 157 additions and 26 deletions
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13
arch/xtensa/src/common/xtensa.h
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@ -49,16 +49,17 @@
* Pre-processor Definitions
****************************************************************************/
/* Bring-up debug configurations. These are here (vs defconfig)
/* Bring-up debug configurations. These are here (vs Kconfig)
* because these should only be controlled during low level
* board bring-up and not part of normal platform configuration.
*/
#undef CONFIG_SUPPRESS_INTERRUPTS /* DEFINED: Do not enable interrupts */
#undef CONFIG_SUPPRESS_TIMER_INTS /* DEFINED: No timer */
#undef CONFIG_SUPPRESS_SERIAL_INTS /* DEFINED: Console will poll */
#undef CONFIG_SUPPRESS_UART_CONFIG /* DEFINED: Do not reconfig UART */
#undef CONFIG_DUMP_ON_EXIT /* DEFINED: Dump task state on exit */
#undef CONFIG_SUPPRESS_INTERRUPTS /* DEFINED: Do not enable interrupts */
#undef CONFIG_SUPPRESS_TIMER_INTS /* DEFINED: No timer */
#undef CONFIG_SUPPRESS_SERIAL_INTS /* DEFINED: Console will poll */
#undef CONFIG_SUPPRESS_UART_CONFIG /* DEFINED: Do not reconfigure UART */
#define CONFIG_SUPPRESS_CLOCK_CONFIG 1 /* DEFINED: Do not reconfigure clocking */
#undef CONFIG_DUMP_ON_EXIT /* DEFINED: Dump task state on exit */
#ifndef CONFIG_DEBUG_SCHED_INFO
# undef CONFIG_DUMP_ON_EXIT /* Needs CONFIG_DEBUG_SCHED_INFO */

35
arch/xtensa/src/common/xtensa_inthandlers.S
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@ -62,6 +62,7 @@
#include <arch/irq.h>
#include <arch/chip/core-isa.h>
#include <arch/xtensa/xtensa_specregs.h>
#include <arch/chip/chip_macros.h>
#include "xtensa_macros.h"
#include "xtensa_timer.h"
@ -282,8 +283,8 @@
****************************************************************************/
#if XCHAL_EXCM_LEVEL >= 2
.section .iram1,"ax"
.type _xtensa_level2_handler,@function
.section HANDLER_SECTION, "ax"
.type _xtensa_level2_handler, @function
.align 4
_xtensa_level2_handler:
@ -339,8 +340,8 @@ _xtensa_level2_handler:
#endif /* XCHAL_EXCM_LEVEL >= 2 */
#if XCHAL_EXCM_LEVEL >= 3
.section .iram1,"ax"
.type _xtensa_level3_handler,@function
.section HANDLER_SECTION, "ax"
.type _xtensa_level3_handler, @function
.align 4
_xtensa_level3_handler:
@ -396,8 +397,8 @@ _xtensa_level3_handler:
#endif /* XCHAL_EXCM_LEVEL >= 3 */
#if XCHAL_EXCM_LEVEL >= 4
.section .iram1,"ax"
.type _xtensa_level4_handler,@function
.section HANDLER_SECTION, "ax"
.type _xtensa_level4_handler, @function
.align 4
_xtensa_level4_handler:
@ -453,8 +454,8 @@ _xtensa_level4_handler:
#endif /* XCHAL_EXCM_LEVEL >= 4 */
#if XCHAL_EXCM_LEVEL >= 5
.section .iram1,"ax"
.type _xtensa_level5_handler,@function
.section HANDLER_SECTION, "ax"
.type _xtensa_level5_handler, @function
.align 4
_xtensa_level5_handler:
@ -510,8 +511,8 @@ _xtensa_level5_handler:
#endif /* XCHAL_EXCM_LEVEL >= 2 */
#if XCHAL_EXCM_LEVEL >= 6
.section .iram1,"ax"
.type _xtensa_level6_handler,@function
.section HANDLER_SECTION, "ax"
.type _xtensa_level6_handler, @function
.align 4
_xtensa_level6_handler:
@ -603,7 +604,7 @@ _xtensa_level6_handler:
****************************************************************************/
#if XCHAL_INT_NLEVELS >=2 && XCHAL_EXCM_LEVEL < 2 && XCHAL_DEBUGLEVEL !=2
.section .iram1,"ax"
.section HANDLER_SECTION, "ax"
.type _xtensa_level2_handler, @function
.align 4
@ -635,7 +636,7 @@ _xtensa_level2_handler:
#endif /* XCHAL_INT_NLEVELS >=2 && XCHAL_EXCM_LEVEL < 2 && XCHAL_DEBUGLEVEL !=2 */
#if XCHAL_INT_NLEVELS >=3 && XCHAL_EXCM_LEVEL < 3 && XCHAL_DEBUGLEVEL !=3
.section .iram1,"ax"
.section HANDLER_SECTION, "ax"
.type _xtensa_level3_handler, @function
.align 4
@ -666,8 +667,8 @@ _xtensa_level3_handler:
#endif /* XCHAL_INT_NLEVELS >=3 && XCHAL_EXCM_LEVEL < 3 && XCHAL_DEBUGLEVEL !=3 */
#if XCHAL_INT_NLEVELS >=4 && XCHAL_EXCM_LEVEL < 4 && XCHAL_DEBUGLEVEL !=4
.section .iram1,"ax"
.type _xtensa_level4_handler,@function
.section HANDLER_SECTION, "ax"
.type _xtensa_level4_handler, @function
.align 4
_xtensa_level4_handler:
@ -697,8 +698,8 @@ _xtensa_level4_handler:
#endif /* XCHAL_INT_NLEVELS >=4 && XCHAL_EXCM_LEVEL < 4 && XCHAL_DEBUGLEVEL !=4 */
#if XCHAL_INT_NLEVELS >=5 && XCHAL_EXCM_LEVEL < 5 && XCHAL_DEBUGLEVEL !=5
.section .iram1,"ax"
.type _xtensa_level5_handler,@function
.section HANDLER_SECTION, "ax"
.type _xtensa_level5_handler, @function
.align 4
_xtensa_level5_handler:
@ -726,7 +727,7 @@ _xtensa_level5_handler:
#endif /* XCHAL_INT_NLEVELS >=5 && XCHAL_EXCM_LEVEL < 5 && XCHAL_DEBUGLEVEL !=5 */
#if XCHAL_INT_NLEVELS >=6 && XCHAL_EXCM_LEVEL < 6 && XCHAL_DEBUGLEVEL !=6
.section .iram1,"ax"
.section HANDLER_SECTION, "ax"
.type _xtensa_level6_handler, @function
.align 4

5
arch/xtensa/src/common/xtensa_nmihandler.S
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@ -61,6 +61,7 @@
#include <arch/chip/core-isa.h>
#include <arch/xtensa/xtensa_specregs.h>
#include <arch/chip/chip_macros.h>
#include "xtensa_macros.h"
@ -101,8 +102,8 @@
****************************************************************************/
#if XCHAL_HAVE_NMI
.section .iram1,"ax"
.type _xt_nmi,@function
.section HANDLER_SECTION, "ax"
.type _xt_nmi, @function
.align 4
_xt_nmi:

10
arch/xtensa/src/esp32/chip_macros.h
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@ -39,6 +39,16 @@
#include <nuttx/config.h>
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/* This is the name of the section containing the Xtensa low level handlers
* that is used by the board linker scripts.
*/
#define HANDLER_SECTION .iram1
/****************************************************************************
* Assembly Language Macros
****************************************************************************/

107
arch/xtensa/src/esp32/esp32_clockconfig.c Normal file
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@ -0,0 +1,107 @@
/****************************************************************************
* arch/xtensa/src/esp32/exp32_cpuindex.S
*
* Mofidifed by use in NuttX by:
*
* Copyright (C) 2016 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Derives from software originally provided by Expressif Systems:
*
* Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
****************************************************************************
/****************************************************************************
* Included Files
****************************************************************************
#include <stdint.h>
#include "xtensa.h"
#warning REVISIT ... function prototypes
void phy_get_romfunc_addr(void);
void rtc_init_lite(void);
void rtc_set_cpu_freq(xtal_freq_t xtal_freq, enum xtal_freq_e cpu_freq);
/****************************************************************************
* Private Types
****************************************************************************
enum xtal_freq_e
{
XTAL_40M = 40,
XTAL_26M = 26,
XTAL_24M = 24,
XTAL_AUTO = 0
};
enum xtal_freq_e
{
CPU_80M = 1,
CPU_160M = 2,
CPU_240M = 3,
};
/****************************************************************************
* Public Functions
****************************************************************************
/****************************************************************************
* Name: esp32_clockconfig
*
* Description:
* Called to initialize the ESP32. This does whatever setup is needed to
* put the SoC in a usable state. This includes the initialization of
* clocking using the settings in board.h.
*
****************************************************************************/
void esp32_clockconfig(void)
{
#ifndef CONFIG_SUPPRESS_CLOCK_CONFIG
uint32_t freq_mhz = CONFIG_ESP32_DEFAULT_CPU_FREQ_MHZ;
enum xtal_freq_e freq;
phy_get_romfunc_addr();
// freq will be changed to 40MHz in rtc_init_lite
rtc_init_lite();
freq = CPU_80M;
switch (freq_mhz)
{
case 240:
freq = CPU_240M;
break;
case 160:
freq = CPU_160M;
break;
default:
freq_mhz = 80;
/* no break */
case 80:
freq = CPU_80M;
break;
}
// freq will be changed to freq in rtc_set_cpu_freq,
rtc_set_cpu_freq(XTAL_AUTO, freq);
ets_update_cpu_frequency(freq_mhz);
#endif
}

13
configs/esp32-core/include/board.h
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@ -41,7 +41,18 @@
****************************************************************************/
/* Clocking ****************************************************************/
/* The ESP32 Core board V2 is fitted with a 40MHz crystal */
#define BOARD_CLOCK_FREQUENCY 80000000
#define BOARD_XTAL_FREQUENCY 40000000
/* Clock reconfiguration is currently disabled, so the CPU will be running
* at the XTAL frequency.
*.
#if 0
# define BOARD_CLOCK_FREQUENCY 80000000
#else
# define BOARD_CLOCK_FREQUENCY BOARD_XTAL_FREQUENCY
#endif
#endif /* __CONFIGS_ESP32_CORE_INCLUDE_BOARD_H */