diff --git a/arch/arm/src/samdl/sam_usart.h b/arch/arm/src/samdl/sam_usart.h
index 528a15da8a..640bb2af45 100644
--- a/arch/arm/src/samdl/sam_usart.h
+++ b/arch/arm/src/samdl/sam_usart.h
@@ -47,6 +47,8 @@
 
 #include <arch/chip/chip.h>
 
+#include "up_arch.h"
+
 #if defined(CONFIG_ARCH_FAMILY_SAMD20)
 #  include "chip/samd_usart.h"
 #elif defined(CONFIG_ARCH_FAMILY_SAML21)
diff --git a/arch/arm/src/samdl/saml_clockconfig.c b/arch/arm/src/samdl/saml_clockconfig.c
index f7cdd22447..843defcf65 100644
--- a/arch/arm/src/samdl/saml_clockconfig.c
+++ b/arch/arm/src/samdl/saml_clockconfig.c
@@ -816,9 +816,9 @@ static inline void sam_dfll48m_config(void)
                OSCCTRL_DFLLCTRL_QLDIS    | OSCCTRL_DFLLCTRL_BPLCKC |
                OSCCTRL_DFLLCTRL_WAITLOCK);
 
-#if defined(BOARD_DFLL48M_CLOSELOOP
+#if defined(BOARD_DFLL48M_CLOSELOOP)
   control |= OSCCTRL_DFLLCTRL_MODE;     /* Closed loop mode */
-#if defined(BOARD_DFLL48M_RECOVERY
+#elif defined(BOARD_DFLL48M_RECOVERY)
   control |= OSCCTRL_DFLLCTRL_USBCRM;   /* USB clock recovery mode */
 #endif
 
@@ -897,7 +897,6 @@ static inline void sam_dfll48m_config(void)
 static inline void sam_dfll48m_enable(void)
 {
   uint16_t control;
-  uint32_t regval;
 
   /* Enable the DFLL48M (with ONDEMAND still set to zero). */
 
diff --git a/configs/saml21-xplained/include/board.h b/configs/saml21-xplained/include/board.h
index d3a63c44f2..3636e62c5d 100644
--- a/configs/saml21-xplained/include/board.h
+++ b/configs/saml21-xplained/include/board.h
@@ -425,7 +425,7 @@
  */
 
 #define BOARD_SERCOM3_GCLKGEN        GCLK_CLKCTRL_GEN0
-#define BOARD_SERCOM3_MUXCONFIG      (USART_CTRLA_RXPAD1 | USART_CTRLA_TXPAD0_1)
+#define BOARD_SERCOM3_MUXCONFIG      (USART_CTRLA_RXPAD1 | USART_CTRLA_TXPAD0_2)
 #define BOARD_SERCOM3_PINMAP_PAD0    PORT_SERCOM3_PAD0_1 /* USART TX */
 #define BOARD_SERCOM3_PINMAP_PAD1    PORT_SERCOM3_PAD1_1 /* USART RX */
 #define BOARD_SERCOM3_PINMAP_PAD2    0                   /* (not used) */
@@ -445,7 +445,7 @@
 
 #define BOARD_SERCOM4_GCLKGEN        GCLK_CLKCTRL_GEN0
 
-#define BOARD_SERCOM4_MUXCONFIG    (USART_CTRLA_RXPAD1 | USART_CTRLA_TXPAD0)
+#define BOARD_SERCOM4_MUXCONFIG    (USART_CTRLA_RXPAD1 | USART_CTRLA_TXPAD0_2)
 #define BOARD_SERCOM4_PINMAP_PAD0  PORT_SERCOM4_PAD0_3 /* USART TX */
 #define BOARD_SERCOM4_PINMAP_PAD1  PORT_SERCOM4_PAD1_3 /* USART RX */
 #define BOARD_SERCOM4_PINMAP_PAD2  0