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arch/arm/src/lpc11 and lpc17 and several README.tst files in configs/: Fix scopy of nameing. CONFIG_CANx_DIVISOR->CONFIG_LPC17_CANx_DIVISOR, for example.

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This commit is contained in:
Gregory Nutt 2018-06-28 13:10:02 -06:00
parent 2c78adf529
commit 8281dc1ed8
15 changed files with 61 additions and 90 deletions
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4
arch/arm/src/lpc17xx/Kconfig
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@ -556,7 +556,7 @@ config CAN2_BAUD
---help---
CAN2 BAUD rate. Required if LPC17_CAN2 is defined.
config CAN1_DIVISOR
config LPC17_CAN1_DIVISOR
int "CAN1 CCLK divisor"
depends on LPC17_CAN1
default 4
@ -564,7 +564,7 @@ config CAN1_DIVISOR
CAN1 is clocked at CCLK divided by this number. (the CCLK frequency is divided
by this number to get the CAN clock). Options = {1,2,4,6}. Default: 4.
config CAN2_DIVISOR
config LPC17_CAN2_DIVISOR
int "CAN2 CCLK divisor"
depends on LPC17_CAN2
default 4

34
arch/arm/src/lpc17xx/lpc17_can.c
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@ -84,22 +84,22 @@
/* If no divsor is provided, use a divisor of 4 */
# ifndef CONFIG_CAN1_DIVISOR
# define CONFIG_CAN1_DIVISOR 4
# ifndef CONFIG_LPC17_CAN1_DIVISOR
# define CONFIG_LPC17_CAN1_DIVISOR 4
# endif
/* Get the SYSCON_PCLKSEL value for CAN1 the implements this divisor */
# if CONFIG_CAN1_DIVISOR == 1
# if CONFIG_LPC17_CAN1_DIVISOR == 1
# define CAN1_CCLK_DIVISOR SYSCON_PCLKSEL_CCLK
# elif CONFIG_CAN1_DIVISOR == 2
# elif CONFIG_LPC17_CAN1_DIVISOR == 2
# define CAN1_CCLK_DIVISOR SYSCON_PCLKSEL_CCLK2
# elif CONFIG_CAN1_DIVISOR == 4
# elif CONFIG_LPC17_CAN1_DIVISOR == 4
# define CAN1_CCLK_DIVISOR SYSCON_PCLKSEL_CCLK4
# elif CONFIG_CAN1_DIVISOR == 6
# elif CONFIG_LPC17_CAN1_DIVISOR == 6
# define CAN1_CCLK_DIVISOR SYSCON_PCLKSEL_CCLK6
# else
# error "Unsupported value of CONFIG_CAN1_DIVISOR"
# error "Unsupported value of CONFIG_LPC17_CAN1_DIVISOR"
# endif
#endif
@ -113,22 +113,22 @@
/* If no divsor is provided, use a divisor of 4 */
# ifndef CONFIG_CAN2_DIVISOR
# define CONFIG_CAN2_DIVISOR 4
# ifndef CONFIG_LPC17_CAN2_DIVISOR
# define CONFIG_LPC17_CAN2_DIVISOR 4
# endif
/* Get the SYSCON_PCLKSEL value for CAN2 the implements this divisor */
# if CONFIG_CAN2_DIVISOR == 1
# if CONFIG_LPC17_CAN2_DIVISOR == 1
# define CAN2_CCLK_DIVISOR SYSCON_PCLKSEL_CCLK
# elif CONFIG_CAN2_DIVISOR == 2
# elif CONFIG_LPC17_CAN2_DIVISOR == 2
# define CAN2_CCLK_DIVISOR SYSCON_PCLKSEL_CCLK2
# elif CONFIG_CAN2_DIVISOR == 4
# elif CONFIG_LPC17_CAN2_DIVISOR == 4
# define CAN2_CCLK_DIVISOR SYSCON_PCLKSEL_CCLK4
# elif CONFIG_CAN2_DIVISOR == 6
# elif CONFIG_LPC17_CAN2_DIVISOR == 6
# define CAN2_CCLK_DIVISOR SYSCON_PCLKSEL_CCLK6
# else
# error "Unsupported value of CONFIG_CAN2_DIVISOR"
# error "Unsupported value of CONFIG_LPC17_CAN2_DIVISOR"
# endif
#endif
@ -245,7 +245,7 @@ static const struct can_ops_s g_canops =
static struct up_dev_s g_can1priv =
{
.port = 1,
.divisor = CONFIG_CAN1_DIVISOR,
.divisor = CONFIG_LPC17_CAN1_DIVISOR,
.baud = CONFIG_CAN1_BAUD,
.base = LPC17_CAN1_BASE,
};
@ -261,7 +261,7 @@ static struct can_dev_s g_can1dev =
static struct up_dev_s g_can2priv =
{
.port = 2,
.divisor = CONFIG_CAN2_DIVISOR,
.divisor = CONFIG_LPC17_CAN2_DIVISOR,
.baud = CONFIG_CAN2_BAUD,
.base = LPC17_CAN2_BASE,
};
@ -1107,7 +1107,7 @@ static int can12_interrupt(int irq, void *context, FAR void *arg)
* Tq = brp * Tcan
*
* Where:
* Tcan is the period of the APB clock (PCLK = CCLK / CONFIG_CAN1_DIVISOR).
* Tcan is the period of the APB clock (PCLK = CCLK / CONFIG_LPC17_CAN1_DIVISOR).
*
* Input Parameters:
* priv - A reference to the CAN block status

2
arch/arm/src/lpc43xx/lpc43_can.c
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@ -1150,7 +1150,7 @@ static void can_setuprxobj(struct up_dev_s *priv)
* Tq = brp * Tcan
*
* Where:
* Tcan is the period of the APB clock (PCLK = CCLK / CONFIG_CAN1_DIVISOR).
* Tcan is the period of the APB clock.
*
* Input Parameters:
* priv - A reference to the CAN block status

6
configs/bambino-200e/README.txt
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@ -300,12 +300,6 @@ Bambino-200e Configuration Options
Standard 11-bit IDs.
CONFIG_CAN1_BAUD - CAN1 BAUD rate. Required if CONFIG_LPC43_CAN1 is defined.
CONFIG_CAN2_BAUD - CAN1 BAUD rate. Required if CONFIG_LPC43_CAN2 is defined.
CONFIG_CAN1_DIVISOR - CAN1 is clocked at CCLK divided by this number.
(the CCLK frequency is divided by this number to get the CAN clock).
Options = {1,2,4,6}. Default: 4.
CONFIG_CAN2_DIVISOR - CAN2 is clocked at CCLK divided by this number.
(the CCLK frequency is divided by this number to get the CAN clock).
Options = {1,2,4,6}. Default: 4.
CONFIG_CAN_TSEG1 - The number of CAN time quanta in segment 1. Default: 6
CONFIG_CAN_TSEG2 = the number of CAN time quanta in segment 2. Default: 7

12
configs/lincoln60/README.txt
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@ -171,12 +171,12 @@ Lincoln 60 Configuration Options
Standard 11-bit IDs.
CONFIG_CAN1_BAUD - CAN1 BAUD rate. Required if CONFIG_LPC17_CAN1 is defined.
CONFIG_CAN2_BAUD - CAN1 BAUD rate. Required if CONFIG_LPC17_CAN2 is defined.
CONFIG_CAN1_DIVISOR - CAN1 is clocked at CCLK divided by this number.
(the CCLK frequency is divided by this number to get the CAN clock).
Options = {1,2,4,6}. Default: 4.
CONFIG_CAN2_DIVISOR - CAN2 is clocked at CCLK divided by this number.
(the CCLK frequency is divided by this number to get the CAN clock).
Options = {1,2,4,6}. Default: 4.
CONFIG_LPC17_CAN1_DIVISOR - CAN1 is clocked at CCLK divided by this
number. (the CCLK frequency is divided by this number to get the CAN
clock). Options = {1,2,4,6}. Default: 4.
CONFIG_LPC17_CAN2_DIVISOR - CAN2 is clocked at CCLK divided by this
number. (the CCLK frequency is divided by this number to get the CAN
clock). Options = {1,2,4,6}. Default: 4.
CONFIG_CAN_TSEG1 - The number of CAN time quanta in segment 1. Default: 6
CONFIG_CAN_TSEG2 = the number of CAN time quanta in segment 2. Default: 7

6
configs/lpc4330-xplorer/README.txt
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@ -552,12 +552,6 @@ LPC4330-Xplorer Configuration Options
Standard 11-bit IDs.
CONFIG_CAN1_BAUD - CAN1 BAUD rate. Required if CONFIG_LPC43_CAN1 is defined.
CONFIG_CAN2_BAUD - CAN1 BAUD rate. Required if CONFIG_LPC43_CAN2 is defined.
CONFIG_CAN1_DIVISOR - CAN1 is clocked at CCLK divided by this number.
(the CCLK frequency is divided by this number to get the CAN clock).
Options = {1,2,4,6}. Default: 4.
CONFIG_CAN2_DIVISOR - CAN2 is clocked at CCLK divided by this number.
(the CCLK frequency is divided by this number to get the CAN clock).
Options = {1,2,4,6}. Default: 4.
CONFIG_CAN_TSEG1 - The number of CAN time quanta in segment 1. Default: 6
CONFIG_CAN_TSEG2 = the number of CAN time quanta in segment 2. Default: 7

6
configs/lpc4337-ws/README.txt
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@ -591,12 +591,6 @@ LPC4337-ws Configuration Options
Standard 11-bit IDs.
CONFIG_CAN1_BAUD - CAN1 BAUD rate. Required if CONFIG_LPC43_CAN1 is defined.
CONFIG_CAN2_BAUD - CAN1 BAUD rate. Required if CONFIG_LPC43_CAN2 is defined.
CONFIG_CAN1_DIVISOR - CAN1 is clocked at CCLK divided by this number.
(the CCLK frequency is divided by this number to get the CAN clock).
Options = {1,2,4,6}. Default: 4.
CONFIG_CAN2_DIVISOR - CAN2 is clocked at CCLK divided by this number.
(the CCLK frequency is divided by this number to get the CAN clock).
Options = {1,2,4,6}. Default: 4.
CONFIG_CAN_TSEG1 - The number of CAN time quanta in segment 1. Default: 6
CONFIG_CAN_TSEG2 = the number of CAN time quanta in segment 2. Default: 7

6
configs/lpc4357-evb/README.txt
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@ -588,12 +588,6 @@ LPC4357-EVB Configuration Options
Standard 11-bit IDs.
CONFIG_CAN1_BAUD - CAN1 BAUD rate. Required if CONFIG_LPC43_CAN1 is defined.
CONFIG_CAN2_BAUD - CAN1 BAUD rate. Required if CONFIG_LPC43_CAN2 is defined.
CONFIG_CAN1_DIVISOR - CAN1 is clocked at CCLK divided by this number.
(the CCLK frequency is divided by this number to get the CAN clock).
Options = {1,2,4,6}. Default: 4.
CONFIG_CAN2_DIVISOR - CAN2 is clocked at CCLK divided by this number.
(the CCLK frequency is divided by this number to get the CAN clock).
Options = {1,2,4,6}. Default: 4.
CONFIG_CAN_TSEG1 - The number of CAN time quanta in segment 1. Default: 6
CONFIG_CAN_TSEG2 = the number of CAN time quanta in segment 2. Default: 7

6
configs/lpc4370-link2/README.txt
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@ -591,12 +591,6 @@ LPC4370-Link2 Configuration Options
Standard 11-bit IDs.
CONFIG_CAN1_BAUD - CAN1 BAUD rate. Required if CONFIG_LPC43_CAN1 is defined.
CONFIG_CAN2_BAUD - CAN1 BAUD rate. Required if CONFIG_LPC43_CAN2 is defined.
CONFIG_CAN1_DIVISOR - CAN1 is clocked at CCLK divided by this number.
(the CCLK frequency is divided by this number to get the CAN clock).
Options = {1,2,4,6}. Default: 4.
CONFIG_CAN2_DIVISOR - CAN2 is clocked at CCLK divided by this number.
(the CCLK frequency is divided by this number to get the CAN clock).
Options = {1,2,4,6}. Default: 4.
CONFIG_CAN_TSEG1 - The number of CAN time quanta in segment 1. Default: 6
CONFIG_CAN_TSEG2 = the number of CAN time quanta in segment 2. Default: 7

9
configs/lpcxpresso-lpc1115/README.txt
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@ -496,10 +496,11 @@ LPCXpresso Configuration Options
CONFIG_CAN_EXTID - Enables support for the 29-bit extended ID. Default
Standard 11-bit IDs.
CONFIG_CAN1_BAUD - CAN1 BAUD rate. Required if CONFIG_LPC11_CAN1 is defined.
CONFIG_CAN1_DIVISOR - CAN1 is clocked at CCLK divided by this number.
(the CCLK frequency is divided by this number to get the CAN clock).
Options = {1,2,4,6}. Default: 4.
CONFIG_LPC11_CAN1_BAUD - CAN1 BAUD rate. Required if CONFIG_LPC11_CAN1
is defined.
CONFIG_LPC11_CAN1_DIVISOR - CAN1 is clocked at CCLK divided by this
number. (the CCLK frequency is divided by this number to get the CAN
clock). Options = {1,2,4,6}. Default: 4.
CONFIG_CAN_TSEG1 - The number of CAN time quanta in segment 1. Default: 6
Configurations

12
configs/lpcxpresso-lpc1768/README.txt
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@ -489,12 +489,12 @@ LPCXpresso Configuration Options
Standard 11-bit IDs.
CONFIG_CAN1_BAUD - CAN1 BAUD rate. Required if CONFIG_LPC17_CAN1 is defined.
CONFIG_CAN2_BAUD - CAN1 BAUD rate. Required if CONFIG_LPC17_CAN2 is defined.
CONFIG_CAN1_DIVISOR - CAN1 is clocked at CCLK divided by this number.
(the CCLK frequency is divided by this number to get the CAN clock).
Options = {1,2,4,6}. Default: 4.
CONFIG_CAN2_DIVISOR - CAN2 is clocked at CCLK divided by this number.
(the CCLK frequency is divided by this number to get the CAN clock).
Options = {1,2,4,6}. Default: 4.
CONFIG_LPC17_CAN1_DIVISOR - CAN1 is clocked at CCLK divided by this
number. (the CCLK frequency is divided by this number to get the CAN
clock). Options = {1,2,4,6}. Default: 4.
CONFIG_LPC17_CAN2_DIVISOR - CAN2 is clocked at CCLK divided by this
number. (the CCLK frequency is divided by this number to get the CAN
clock). Options = {1,2,4,6}. Default: 4.
CONFIG_CAN_TSEG1 - The number of CAN time quanta in segment 1. Default: 6
CONFIG_CAN_TSEG2 = the number of CAN time quanta in segment 2. Default: 7

12
configs/mbed/README.txt
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@ -134,12 +134,12 @@ mbed Configuration Options
Standard 11-bit IDs.
CONFIG_CAN1_BAUD - CAN1 BAUD rate. Required if CONFIG_LPC17_CAN1 is defined.
CONFIG_CAN2_BAUD - CAN1 BAUD rate. Required if CONFIG_LPC17_CAN2 is defined.
CONFIG_CAN1_DIVISOR - CAN1 is clocked at CCLK divided by this number.
(the CCLK frequency is divided by this number to get the CAN clock).
Options = {1,2,4,6}. Default: 4.
CONFIG_CAN2_DIVISOR - CAN2 is clocked at CCLK divided by this number.
(the CCLK frequency is divided by this number to get the CAN clock).
Options = {1,2,4,6}. Default: 4.
CONFIG_LPC17_CAN1_DIVISOR - CAN1 is clocked at CCLK divided by this
number. (the CCLK frequency is divided by this number to get the CAN
clock). Options = {1,2,4,6}. Default: 4.
CONFIG_LPC17CAN2_DIVISOR - CAN2 is clocked at CCLK divided by this
number. (the CCLK frequency is divided by this number to get the CAN
clock). Options = {1,2,4,6}. Default: 4.
CONFIG_CAN_TSEG1 - The number of CAN time quanta in segment 1. Default: 6
CONFIG_CAN_TSEG2 = the number of CAN time quanta in segment 2. Default: 7

12
configs/mcb1700/README.txt
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@ -135,12 +135,12 @@ mcb1700 Configuration Options
Standard 11-bit IDs.
CONFIG_CAN1_BAUD - CAN1 BAUD rate. Required if CONFIG_LPC17_CAN1 is defined.
CONFIG_CAN2_BAUD - CAN1 BAUD rate. Required if CONFIG_LPC17_CAN2 is defined.
CONFIG_CAN1_DIVISOR - CAN1 is clocked at CCLK divided by this number.
(the CCLK frequency is divided by this number to get the CAN clock).
Options = {1,2,4,6}. Default: 4.
CONFIG_CAN2_DIVISOR - CAN2 is clocked at CCLK divided by this number.
(the CCLK frequency is divided by this number to get the CAN clock).
Options = {1,2,4,6}. Default: 4.
CONFIG_LPC17_CAN1_DIVISOR - CAN1 is clocked at CCLK divided by this
number. (the CCLK frequency is divided by this number to get the CAN
clock). Options = {1,2,4,6}. Default: 4.
CONFIG_LPC17CAN2_DIVISOR - CAN2 is clocked at CCLK divided by this
number. (the CCLK frequency is divided by this number to get the CAN
clock). Options = {1,2,4,6}. Default: 4.
CONFIG_CAN_TSEG1 - The number of CAN time quanta in segment 1. Default: 6
CONFIG_CAN_TSEG2 = the number of CAN time quanta in segment 2. Default: 7

12
configs/olimex-lpc1766stk/README.txt
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@ -572,12 +572,12 @@ Olimex LPC1766-STK Configuration Options
Standard 11-bit IDs.
CONFIG_CAN1_BAUD - CAN1 BAUD rate. Required if CONFIG_LPC17_CAN1 is defined.
CONFIG_CAN2_BAUD - CAN1 BAUD rate. Required if CONFIG_LPC17_CAN2 is defined.
CONFIG_CAN1_DIVISOR - CAN1 is clocked at CCLK divided by this number.
(the CCLK frequency is divided by this number to get the CAN clock).
Options = {1,2,4,6}. Default: 4.
CONFIG_CAN2_DIVISOR - CAN2 is clocked at CCLK divided by this number.
(the CCLK frequency is divided by this number to get the CAN clock).
Options = {1,2,4,6}. Default: 4.
CONFIG_LPC17_CAN1_DIVISOR - CAN1 is clocked at CCLK divided by this
number. (the CCLK frequency is divided by this number to get the CAN
clock). Options = {1,2,4,6}. Default: 4.
CONFIG_LPC17CAN2_DIVISOR - CAN2 is clocked at CCLK divided by this
number. (the CCLK frequency is divided by this number to get the CAN
clock). Options = {1,2,4,6}. Default: 4.
CONFIG_CAN_TSEG1 - The number of CAN time quanta in segment 1. Default: 6
CONFIG_CAN_TSEG2 - the number of CAN time quanta in segment 2. Default: 7

12
configs/zkit-arm-1769/README.txt
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@ -300,12 +300,12 @@ ZKit-ARM Configuration Options
Standard 11-bit IDs.
CONFIG_CAN1_BAUD - CAN1 BAUD rate. Required if CONFIG_LPC17_CAN1 is defined.
CONFIG_CAN2_BAUD - CAN1 BAUD rate. Required if CONFIG_LPC17_CAN2 is defined.
CONFIG_CAN1_DIVISOR - CAN1 is clocked at CCLK divided by this number.
(the CCLK frequency is divided by this number to get the CAN clock).
Options = {1,2,4,6}. Default: 4.
CONFIG_CAN2_DIVISOR - CAN2 is clocked at CCLK divided by this number.
(the CCLK frequency is divided by this number to get the CAN clock).
Options = {1,2,4,6}. Default: 4.
CONFIG_LPC17_CAN1_DIVISOR - CAN1 is clocked at CCLK divided by this
number. (the CCLK frequency is divided by this number to get the CAN
clock). Options = {1,2,4,6}. Default: 4.
CONFIG_LPC17CAN2_DIVISOR - CAN2 is clocked at CCLK divided by this
number. (the CCLK frequency is divided by this number to get the CAN
clock). Options = {1,2,4,6}. Default: 4.
CONFIG_CAN_TSEG1 - The number of CAN time quanta in segment 1. Default: 6
CONFIG_CAN_TSEG2 = the number of CAN time quanta in segment 2. Default: 7