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adc i2c_reset

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This commit is contained in:
Lok Tep 2016-06-03 17:19:22 +02:00
parent 3bb60966e7
commit 82cd44dbc5
4 changed files with 27 additions and 9 deletions
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4
arch/arm/src/stm32f7/chip/stm32f74xx75xx_memorymap.h
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@ -142,6 +142,10 @@
#define STM32_USART1_BASE 0x40011000 /* 0x40011000-0x400113ff: USART1 */
#define STM32_USART6_BASE 0x40011400 /* 0x40011400-0x400117ff: USART6 */
#define STM32_ADC_BASE 0x40012000 /* 0x40012000-0x400123ff: ADC1 - ADC2 - ADC3 */
# define STM32_ADC1_BASE 0x40012000 /* ADC1 */
# define STM32_ADC2_BASE 0x40012100 /* ADC2 */
# define STM32_ADC3_BASE 0x40012200 /* ADC3 */
# define STM32_ADCCMN_BASE 0x40012300 /* Common */
#define STM32_SDMMC1_BASE 0x40012c00 /* 0x40012c00-0x40012fff: SDMMC1 */
#define STM32_SPI1_BASE 0x40013000 /* 0x40013000-0x400133ff: SPI1 */
#define STM32_SPI4_BASE 0x40013400 /* 0x40013400-0x400137ff: SPI4 */

20
arch/arm/src/stm32f7/stm32_i2c.c
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@ -273,10 +273,12 @@
# define CONFIG_STM32F7_I2C_DYNTIMEO_STARTSTOP TICK2USEC(CONFIG_STM32F7_I2CTIMEOTICKS)
#endif
#define I2C_OUTPUT \
(GPIO_OUTPUT | GPIO_OUTPUT_SET | GPIO_CNF_OUTOD | GPIO_MODE_50MHz)
#define MKI2C_OUTPUT(p) \
(((p) & (GPIO_PORT_MASK | GPIO_PIN_MASK)) | I2C_OUTPUT)
/* Macros to convert a I2C pin to a GPIO output */
#define I2C_OUTPUT (GPIO_OUTPUT | GPIO_FLOAT | GPIO_OPENDRAIN |\
GPIO_SPEED_50MHz | GPIO_OUTPUT_SET)
#define MKI2C_OUTPUT(p) (((p) & (GPIO_PORT_MASK | GPIO_PIN_MASK)) | I2C_OUTPUT)
/* Register setting unique to the STM32F30xx */
@ -483,7 +485,9 @@ static int stm32_i2c_process(FAR struct i2c_master_s *dev, FAR struct i2c_msg_s
int count);
static int stm32_i2c_transfer(FAR struct i2c_master_s *dev, FAR struct i2c_msg_s *msgs,
int count);
#ifdef CONFIG_I2C_RESET
int stm32_i2c_reset(FAR struct i2c_master_s * dev);
#endif
/************************************************************************************
* Private Data
@ -582,7 +586,7 @@ struct i2c_ops_s stm32_i2c_ops =
{
.transfer = stm32_i2c_transfer
#ifdef CONFIG_I2C_RESET
, .reset = stm32f7_i2c_reset
, .reset = stm32_i2c_reset
#endif
};
@ -2576,7 +2580,7 @@ int stm32f7_i2cbus_uninitialize(FAR struct i2c_master_s * dev)
}
/************************************************************************************
* Name: up_i2creset
* Name: stm32_i2c_reset
*
* Description:
* Reset an I2C bus
@ -2584,7 +2588,7 @@ int stm32f7_i2cbus_uninitialize(FAR struct i2c_master_s * dev)
************************************************************************************/
#ifdef CONFIG_I2C_RESET
int up_i2creset(FAR struct i2c_master_s * dev)
int stm32_i2c_reset(FAR struct i2c_master_s * dev)
{
struct stm32_i2c_priv_s * priv;
unsigned int clock_count;

8
configs/stm32f746-ws/include/board.h
View File

@ -165,6 +165,14 @@
#define STM32_APB2_TIM10_CLKIN (2*STM32_PCLK2_FREQUENCY)
#define STM32_APB2_TIM11_CLKIN (2*STM32_PCLK2_FREQUENCY)
/* Timer Frequencies, if APBx is set to 1, frequency is same to APBx
* otherwise frequency is 2xAPBx.
* Note: TIM1,8 are on APB2, others on APB1
*/
#define STM32_TIM18_FREQUENCY (2*STM32_PCLK2_FREQUENCY)
#define STM32_TIM27_FREQUENCY (2*STM32_PCLK1_FREQUENCY)
/* FLASH wait states
*
* --------- ---------- -----------

4
configs/stm32f746-ws/nsh/defconfig
View File

@ -175,7 +175,7 @@ CONFIG_STM32F7_I2C=y
# CONFIG_STM32F7_SAI is not set
CONFIG_STM32F7_SPI=y
CONFIG_STM32F7_USART=y
# CONFIG_STM32F7_ADC1 is not set
CONFIG_STM32F7_ADC1=y
# CONFIG_STM32F7_ADC2 is not set
# CONFIG_STM32F7_ADC3 is not set
# CONFIG_STM32F7_BKPSRAM is not set
@ -442,6 +442,7 @@ CONFIG_DEV_NULL=y
# CONFIG_PWM is not set
CONFIG_ARCH_HAVE_I2CRESET=y
CONFIG_I2C=y
CONFIG_I2C_RESET=y
CONFIG_SPI=y
# CONFIG_SPI_SLAVE is not set
CONFIG_SPI_EXCHANGE=y
@ -451,6 +452,7 @@ CONFIG_SPI_EXCHANGE=y
# CONFIG_SPI_HWFEATURES is not set
# CONFIG_SPI_CRCGENERATION is not set
# CONFIG_I2S is not set
CONFIG_ADC=y
#
# Timer Driver Support