arch/arm/src/stm32l4/stm32l4_rtc.c: Appease nxstyle
This commit is contained in:
YAMAMOTO Takashi
Xiang Xiao
parent
030271f7f5
commit
82e511c644
@ -224,8 +224,9 @@ static void rtc_wprunlock(void)
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stm32l4_pwr_enablebkp(true);
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/* The following steps are required to unlock the write protection on all the
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* RTC registers (except for RTC_ISR[13:8], RTC_TAFCR, and RTC_BKPxR).
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/* The following steps are required to unlock the write protection on
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* all the RTC registers (except for RTC_ISR[13:8], RTC_TAFCR, and
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* RTC_BKPxR).
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*
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* 1. Write 0xca into the RTC_WPR register.
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* 2. Write 0x53 into the RTC_WPR register.
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@ -781,7 +782,8 @@ static inline void rtc_enable_alarm(void)
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****************************************************************************/
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#ifdef CONFIG_RTC_ALARM
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static int stm32l4_rtc_getalarmdatetime(rtc_alarmreg_t reg, FAR struct tm *tp)
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static int stm32l4_rtc_getalarmdatetime(rtc_alarmreg_t reg,
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FAR struct tm *tp)
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{
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uint32_t data;
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uint32_t tmp;
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@ -796,16 +798,20 @@ static int stm32l4_rtc_getalarmdatetime(rtc_alarmreg_t reg, FAR struct tm *tp)
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* ranges of values correspond between struct tm and the time register.
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*/
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tmp = (data & (RTC_ALRMR_SU_MASK | RTC_ALRMR_ST_MASK)) >> RTC_ALRMR_SU_SHIFT;
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tmp = (data & (RTC_ALRMR_SU_MASK | RTC_ALRMR_ST_MASK)) >>
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RTC_ALRMR_SU_SHIFT;
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tp->tm_sec = rtc_bcd2bin(tmp);
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tmp = (data & (RTC_ALRMR_MNU_MASK | RTC_ALRMR_MNT_MASK)) >> RTC_ALRMR_MNU_SHIFT;
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tmp = (data & (RTC_ALRMR_MNU_MASK | RTC_ALRMR_MNT_MASK)) >>
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RTC_ALRMR_MNU_SHIFT;
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tp->tm_min = rtc_bcd2bin(tmp);
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tmp = (data & (RTC_ALRMR_HU_MASK | RTC_ALRMR_HT_MASK)) >> RTC_ALRMR_HU_SHIFT;
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tmp = (data & (RTC_ALRMR_HU_MASK | RTC_ALRMR_HT_MASK)) >>
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RTC_ALRMR_HU_SHIFT;
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tp->tm_hour = rtc_bcd2bin(tmp);
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tmp = (data & (RTC_ALRMR_DU_MASK | RTC_ALRMR_DT_MASK)) >> RTC_ALRMR_DU_SHIFT;
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tmp = (data & (RTC_ALRMR_DU_MASK | RTC_ALRMR_DT_MASK)) >>
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RTC_ALRMR_DU_SHIFT;
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tp->tm_mday = rtc_bcd2bin(tmp);
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return OK;
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@ -821,8 +827,9 @@ static int stm32l4_rtc_getalarmdatetime(rtc_alarmreg_t reg, FAR struct tm *tp)
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*
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* Description:
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* Returns 'true' if the RTC has been initialized
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* Returns 'false' if the RTC has never been initialized since first time power
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* up, and the counters are stopped until it is first initialized.
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* Returns 'false' if the RTC has never been initialized since first
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* time power up, and the counters are stopped until it is first
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* initialized.
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*
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* Input Parameters:
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* None
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@ -845,8 +852,8 @@ bool stm32l4_rtc_is_initialized(void)
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* Name: up_rtc_initialize
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*
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* Description:
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* Initialize the hardware RTC per the selected configuration. This function is
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* called once during the OS initialization sequence
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* Initialize the hardware RTC per the selected configuration. This
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* function is called once during the OS initialization sequence
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*
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* Input Parameters:
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* None
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@ -877,11 +884,14 @@ int up_rtc_initialize(void)
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stm32l4_pwr_enablebkp(true);
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#if defined(CONFIG_STM32L4_RTC_HSECLOCK)
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modifyreg32(STM32L4_RCC_BDCR, RCC_BDCR_RTCSEL_MASK, RCC_BDCR_RTCSEL_HSE);
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modifyreg32(STM32L4_RCC_BDCR, RCC_BDCR_RTCSEL_MASK,
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RCC_BDCR_RTCSEL_HSE);
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#elif defined(CONFIG_STM32L4_RTC_LSICLOCK)
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modifyreg32(STM32L4_RCC_BDCR, RCC_BDCR_RTCSEL_MASK, RCC_BDCR_RTCSEL_LSI);
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modifyreg32(STM32L4_RCC_BDCR, RCC_BDCR_RTCSEL_MASK,
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RCC_BDCR_RTCSEL_LSI);
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#elif defined(CONFIG_STM32L4_RTC_LSECLOCK)
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modifyreg32(STM32L4_RCC_BDCR, RCC_BDCR_RTCSEL_MASK, RCC_BDCR_RTCSEL_LSE);
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modifyreg32(STM32L4_RCC_BDCR, RCC_BDCR_RTCSEL_MASK,
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RCC_BDCR_RTCSEL_LSE);
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#else
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# error "No clock for RTC!"
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#endif
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@ -902,8 +912,8 @@ int up_rtc_initialize(void)
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rtc_wprlock();
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/* Disable write access to the backup domain (RTC registers, RTC backup
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* data registers and backup SRAM).
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/* Disable write access to the backup domain (RTC registers,
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* RTC backup data registers and backup SRAM).
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*/
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stm32l4_pwr_enablebkp(false);
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@ -936,7 +946,9 @@ int up_rtc_initialize(void)
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((uint32_t)0x7f << RTC_PRER_PREDIV_A_SHIFT),
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STM32L4_RTC_PRER);
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#elif defined(CONFIG_STM32L4_RTC_LSICLOCK)
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/* Suitable values for 32.000 KHz LSI clock (29.5 - 34 KHz, though) */
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/* Suitable values for 32.000 KHz LSI clock (29.5 - 34 KHz,
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* though)
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*/
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putreg32(((uint32_t)0xf9 << RTC_PRER_PREDIV_S_SHIFT) |
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((uint32_t)0x7f << RTC_PRER_PREDIV_A_SHIFT),
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@ -953,8 +965,8 @@ int up_rtc_initialize(void)
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rtc_exitinit();
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/* Wait for the RTC Time and Date registers to be synchronized with RTC APB
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* clock.
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/* Wait for the RTC Time and Date registers to be synchronized
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* with RTC APB clock.
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*/
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rtc_synchwait();
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@ -967,8 +979,8 @@ int up_rtc_initialize(void)
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rtc_wprlock();
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/* Disable write access to the backup domain (RTC registers, RTC backup
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* data registers and backup SRAM).
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/* Disable write access to the backup domain (RTC registers,
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* RTC backup data registers and backup SRAM).
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*/
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stm32l4_pwr_enablebkp(false);
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@ -1005,9 +1017,9 @@ int up_rtc_initialize(void)
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* Description:
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* Get the current date and time from the date/time RTC. This interface
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* is only supported by the date/time RTC hardware implementation.
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* It is used to replace the system timer. It is only used by the RTOS during
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* initialization to set up the system time when CONFIG_RTC and CONFIG_RTC_DATETIME
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* are selected.
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* It is used to replace the system timer. It is only used by the RTOS
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* during initialization to set up the system time when CONFIG_RTC and
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* CONFIG_RTC_DATETIME are selected.
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*
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* Sub-second accuracy is returned through 'nsec'.
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*
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@ -1020,7 +1032,8 @@ int up_rtc_initialize(void)
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*
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****************************************************************************/
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int stm32l4_rtc_getdatetime_with_subseconds(FAR struct tm *tp, FAR long *nsec)
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int stm32l4_rtc_getdatetime_with_subseconds(FAR struct tm *tp,
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FAR long *nsec)
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{
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#ifdef CONFIG_STM32L4_HAVE_RTC_SUBSECONDS
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uint32_t ssr;
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@ -1135,14 +1148,14 @@ int stm32l4_rtc_getdatetime_with_subseconds(FAR struct tm *tp, FAR long *nsec)
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* Description:
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* Get the current date and time from the date/time RTC. This interface
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* is only supported by the date/time RTC hardware implementation.
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* It is used to replace the system timer. It is only used by the RTOS during
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* initialization to set up the system time when CONFIG_RTC and CONFIG_RTC_DATETIME
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* are selected.
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* It is used to replace the system timer. It is only used by the RTOS
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* during initialization to set up the system time when CONFIG_RTC and
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* CONFIG_RTC_DATETIME are selected.
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*
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* NOTE: Some date/time RTC hardware is capability of sub-second accuracy. That
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* sub-second accuracy is lost in this interface. However, since the system time
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* is reinitialized on each power-up/reset, there will be no timing inaccuracy in
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* the long run.
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* NOTE: Some date/time RTC hardware is capability of sub-second accuracy.
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* That sub-second accuracy is lost in this interface. However, since the
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* system time is reinitialized on each power-up/reset, there will be no
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* timing inaccuracy in the long run.
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*
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* Input Parameters:
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* tp - The location to return the high resolution time value.
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@ -1197,8 +1210,8 @@ int up_rtc_getdatetime_with_subseconds(FAR struct tm *tp, FAR long *nsec)
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*
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* Description:
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* Set the RTC to the provided time. RTC implementations which provide
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* up_rtc_getdatetime() (CONFIG_RTC_DATETIME is selected) should provide this
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* function.
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* up_rtc_getdatetime() (CONFIG_RTC_DATETIME is selected) should provide
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* this function.
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*
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* Input Parameters:
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* tp - the time to use
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@ -1228,7 +1241,8 @@ int stm32l4_rtc_setdatetime(FAR const struct tm *tp)
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(rtc_bin2bcd(tp->tm_hour) << RTC_TR_HU_SHIFT);
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tr &= ~RTC_TR_RESERVED_BITS;
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/* Now convert the fields in struct tm format to the RTC date register fields:
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/* Now convert the fields in struct tm format to the RTC date register
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* fields:
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* Days: 1-31 match in both cases.
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* Month: STM32 is 1-12, struct tm is 0-11.
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* Years: STM32 is 00-99, struct tm is years since 1900.
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@ -1581,7 +1595,8 @@ int stm32l4_rtc_rdalarm(FAR struct alm_rdalarm_s *alminfo)
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****************************************************************************/
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#ifdef CONFIG_RTC_PERIODIC
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static int stm32l4_rtc_wakeup_handler(int irq, FAR void *context, FAR void *arg)
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static int stm32l4_rtc_wakeup_handler(int irq, FAR void *context,
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FAR void *arg)
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{
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uint32_t regval = 0;
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@ -1615,7 +1630,8 @@ static inline void rtc_enable_wakeup(void)
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{
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if (!g_wakeup_enabled)
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{
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stm32l4_exti_wakeup(true, false, true, stm32l4_rtc_wakeup_handler, NULL);
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stm32l4_exti_wakeup(true, false, true, stm32l4_rtc_wakeup_handler,
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NULL);
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g_wakeup_enabled = true;
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}
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}
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@ -1657,7 +1673,8 @@ static inline void rtc_set_wcksel(unsigned int wucksel)
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****************************************************************************/
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#ifdef CONFIG_RTC_PERIODIC
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int stm32l4_rtc_setperiodic(FAR const struct timespec *period, wakeupcb_t callback)
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int stm32l4_rtc_setperiodic(FAR const struct timespec *period,
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wakeupcb_t callback)
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{
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unsigned int wutr_val;
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int ret;
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@ -1671,7 +1688,8 @@ int stm32l4_rtc_setperiodic(FAR const struct timespec *period, wakeupcb_t callba
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#elif defined(CONFIG_STM32L4_RTC_LSICLOCK)
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# error "Periodic wakeup not available for LSI (and it is too inaccurate!)"
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#elif defined(CONFIG_STM32L4_RTC_LSECLOCK)
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const uint32_t rtc_div16_max_msecs = 16 * 1000 * 0xffffu / STM32L4_LSE_FREQUENCY;
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const uint32_t rtc_div16_max_msecs = 16 * 1000 * 0xffffu /
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STM32L4_LSE_FREQUENCY;
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#else
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# error "No clock for RTC!"
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#endif
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@ -1713,7 +1731,9 @@ int stm32l4_rtc_setperiodic(FAR const struct timespec *period, wakeupcb_t callba
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regval &= ~RTC_CR_WUTE;
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putreg32(regval, STM32L4_RTC_CR);
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/* Poll WUTWF until it is set in RTC_ISR (takes around 2 RTCCLK clock cycles) */
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/* Poll WUTWF until it is set in RTC_ISR (takes around 2 RTCCLK
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* clock cycles)
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*/
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ret = -ETIMEDOUT;
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for (timeout = 0; timeout < SYNCHRO_TIMEOUT; timeout++)
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@ -1809,7 +1829,9 @@ int stm32l4_rtc_cancelperiodic(void)
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regval &= ~(RTC_CR_WUTE | RTC_CR_WUTIE);
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putreg32(regval, STM32L4_RTC_CR);
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/* Poll WUTWF until it is set in RTC_ISR (takes around 2 RTCCLK clock cycles) */
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/* Poll WUTWF until it is set in RTC_ISR (takes around 2 RTCCLK
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* clock cycles)
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*/
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ret = -ETIMEDOUT;
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for (timeout = 0; timeout < SYNCHRO_TIMEOUT; timeout++)
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