diff --git a/arch/arm/src/stm32l4/stm32l4_rtc.c b/arch/arm/src/stm32l4/stm32l4_rtc.c index 28c16f3075..9930b095ef 100644 --- a/arch/arm/src/stm32l4/stm32l4_rtc.c +++ b/arch/arm/src/stm32l4/stm32l4_rtc.c @@ -224,8 +224,9 @@ static void rtc_wprunlock(void) stm32l4_pwr_enablebkp(true); - /* The following steps are required to unlock the write protection on all the - * RTC registers (except for RTC_ISR[13:8], RTC_TAFCR, and RTC_BKPxR). + /* The following steps are required to unlock the write protection on + * all the RTC registers (except for RTC_ISR[13:8], RTC_TAFCR, and + * RTC_BKPxR). * * 1. Write 0xca into the RTC_WPR register. * 2. Write 0x53 into the RTC_WPR register. @@ -781,7 +782,8 @@ static inline void rtc_enable_alarm(void) ****************************************************************************/ #ifdef CONFIG_RTC_ALARM -static int stm32l4_rtc_getalarmdatetime(rtc_alarmreg_t reg, FAR struct tm *tp) +static int stm32l4_rtc_getalarmdatetime(rtc_alarmreg_t reg, + FAR struct tm *tp) { uint32_t data; uint32_t tmp; @@ -796,16 +798,20 @@ static int stm32l4_rtc_getalarmdatetime(rtc_alarmreg_t reg, FAR struct tm *tp) * ranges of values correspond between struct tm and the time register. */ - tmp = (data & (RTC_ALRMR_SU_MASK | RTC_ALRMR_ST_MASK)) >> RTC_ALRMR_SU_SHIFT; + tmp = (data & (RTC_ALRMR_SU_MASK | RTC_ALRMR_ST_MASK)) >> + RTC_ALRMR_SU_SHIFT; tp->tm_sec = rtc_bcd2bin(tmp); - tmp = (data & (RTC_ALRMR_MNU_MASK | RTC_ALRMR_MNT_MASK)) >> RTC_ALRMR_MNU_SHIFT; + tmp = (data & (RTC_ALRMR_MNU_MASK | RTC_ALRMR_MNT_MASK)) >> + RTC_ALRMR_MNU_SHIFT; tp->tm_min = rtc_bcd2bin(tmp); - tmp = (data & (RTC_ALRMR_HU_MASK | RTC_ALRMR_HT_MASK)) >> RTC_ALRMR_HU_SHIFT; + tmp = (data & (RTC_ALRMR_HU_MASK | RTC_ALRMR_HT_MASK)) >> + RTC_ALRMR_HU_SHIFT; tp->tm_hour = rtc_bcd2bin(tmp); - tmp = (data & (RTC_ALRMR_DU_MASK | RTC_ALRMR_DT_MASK)) >> RTC_ALRMR_DU_SHIFT; + tmp = (data & (RTC_ALRMR_DU_MASK | RTC_ALRMR_DT_MASK)) >> + RTC_ALRMR_DU_SHIFT; tp->tm_mday = rtc_bcd2bin(tmp); return OK; @@ -821,8 +827,9 @@ static int stm32l4_rtc_getalarmdatetime(rtc_alarmreg_t reg, FAR struct tm *tp) * * Description: * Returns 'true' if the RTC has been initialized - * Returns 'false' if the RTC has never been initialized since first time power - * up, and the counters are stopped until it is first initialized. + * Returns 'false' if the RTC has never been initialized since first + * time power up, and the counters are stopped until it is first + * initialized. * * Input Parameters: * None @@ -845,8 +852,8 @@ bool stm32l4_rtc_is_initialized(void) * Name: up_rtc_initialize * * Description: - * Initialize the hardware RTC per the selected configuration. This function is - * called once during the OS initialization sequence + * Initialize the hardware RTC per the selected configuration. This + * function is called once during the OS initialization sequence * * Input Parameters: * None @@ -877,11 +884,14 @@ int up_rtc_initialize(void) stm32l4_pwr_enablebkp(true); #if defined(CONFIG_STM32L4_RTC_HSECLOCK) - modifyreg32(STM32L4_RCC_BDCR, RCC_BDCR_RTCSEL_MASK, RCC_BDCR_RTCSEL_HSE); + modifyreg32(STM32L4_RCC_BDCR, RCC_BDCR_RTCSEL_MASK, + RCC_BDCR_RTCSEL_HSE); #elif defined(CONFIG_STM32L4_RTC_LSICLOCK) - modifyreg32(STM32L4_RCC_BDCR, RCC_BDCR_RTCSEL_MASK, RCC_BDCR_RTCSEL_LSI); + modifyreg32(STM32L4_RCC_BDCR, RCC_BDCR_RTCSEL_MASK, + RCC_BDCR_RTCSEL_LSI); #elif defined(CONFIG_STM32L4_RTC_LSECLOCK) - modifyreg32(STM32L4_RCC_BDCR, RCC_BDCR_RTCSEL_MASK, RCC_BDCR_RTCSEL_LSE); + modifyreg32(STM32L4_RCC_BDCR, RCC_BDCR_RTCSEL_MASK, + RCC_BDCR_RTCSEL_LSE); #else # error "No clock for RTC!" #endif @@ -902,8 +912,8 @@ int up_rtc_initialize(void) rtc_wprlock(); - /* Disable write access to the backup domain (RTC registers, RTC backup - * data registers and backup SRAM). + /* Disable write access to the backup domain (RTC registers, + * RTC backup data registers and backup SRAM). */ stm32l4_pwr_enablebkp(false); @@ -936,7 +946,9 @@ int up_rtc_initialize(void) ((uint32_t)0x7f << RTC_PRER_PREDIV_A_SHIFT), STM32L4_RTC_PRER); #elif defined(CONFIG_STM32L4_RTC_LSICLOCK) - /* Suitable values for 32.000 KHz LSI clock (29.5 - 34 KHz, though) */ + /* Suitable values for 32.000 KHz LSI clock (29.5 - 34 KHz, + * though) + */ putreg32(((uint32_t)0xf9 << RTC_PRER_PREDIV_S_SHIFT) | ((uint32_t)0x7f << RTC_PRER_PREDIV_A_SHIFT), @@ -953,8 +965,8 @@ int up_rtc_initialize(void) rtc_exitinit(); - /* Wait for the RTC Time and Date registers to be synchronized with RTC APB - * clock. + /* Wait for the RTC Time and Date registers to be synchronized + * with RTC APB clock. */ rtc_synchwait(); @@ -967,8 +979,8 @@ int up_rtc_initialize(void) rtc_wprlock(); - /* Disable write access to the backup domain (RTC registers, RTC backup - * data registers and backup SRAM). + /* Disable write access to the backup domain (RTC registers, + * RTC backup data registers and backup SRAM). */ stm32l4_pwr_enablebkp(false); @@ -1005,9 +1017,9 @@ int up_rtc_initialize(void) * Description: * Get the current date and time from the date/time RTC. This interface * is only supported by the date/time RTC hardware implementation. - * It is used to replace the system timer. It is only used by the RTOS during - * initialization to set up the system time when CONFIG_RTC and CONFIG_RTC_DATETIME - * are selected. + * It is used to replace the system timer. It is only used by the RTOS + * during initialization to set up the system time when CONFIG_RTC and + * CONFIG_RTC_DATETIME are selected. * * Sub-second accuracy is returned through 'nsec'. * @@ -1020,7 +1032,8 @@ int up_rtc_initialize(void) * ****************************************************************************/ -int stm32l4_rtc_getdatetime_with_subseconds(FAR struct tm *tp, FAR long *nsec) +int stm32l4_rtc_getdatetime_with_subseconds(FAR struct tm *tp, + FAR long *nsec) { #ifdef CONFIG_STM32L4_HAVE_RTC_SUBSECONDS uint32_t ssr; @@ -1135,14 +1148,14 @@ int stm32l4_rtc_getdatetime_with_subseconds(FAR struct tm *tp, FAR long *nsec) * Description: * Get the current date and time from the date/time RTC. This interface * is only supported by the date/time RTC hardware implementation. - * It is used to replace the system timer. It is only used by the RTOS during - * initialization to set up the system time when CONFIG_RTC and CONFIG_RTC_DATETIME - * are selected. + * It is used to replace the system timer. It is only used by the RTOS + * during initialization to set up the system time when CONFIG_RTC and + * CONFIG_RTC_DATETIME are selected. * - * NOTE: Some date/time RTC hardware is capability of sub-second accuracy. That - * sub-second accuracy is lost in this interface. However, since the system time - * is reinitialized on each power-up/reset, there will be no timing inaccuracy in - * the long run. + * NOTE: Some date/time RTC hardware is capability of sub-second accuracy. + * That sub-second accuracy is lost in this interface. However, since the + * system time is reinitialized on each power-up/reset, there will be no + * timing inaccuracy in the long run. * * Input Parameters: * tp - The location to return the high resolution time value. @@ -1197,8 +1210,8 @@ int up_rtc_getdatetime_with_subseconds(FAR struct tm *tp, FAR long *nsec) * * Description: * Set the RTC to the provided time. RTC implementations which provide - * up_rtc_getdatetime() (CONFIG_RTC_DATETIME is selected) should provide this - * function. + * up_rtc_getdatetime() (CONFIG_RTC_DATETIME is selected) should provide + * this function. * * Input Parameters: * tp - the time to use @@ -1228,7 +1241,8 @@ int stm32l4_rtc_setdatetime(FAR const struct tm *tp) (rtc_bin2bcd(tp->tm_hour) << RTC_TR_HU_SHIFT); tr &= ~RTC_TR_RESERVED_BITS; - /* Now convert the fields in struct tm format to the RTC date register fields: + /* Now convert the fields in struct tm format to the RTC date register + * fields: * Days: 1-31 match in both cases. * Month: STM32 is 1-12, struct tm is 0-11. * Years: STM32 is 00-99, struct tm is years since 1900. @@ -1581,7 +1595,8 @@ int stm32l4_rtc_rdalarm(FAR struct alm_rdalarm_s *alminfo) ****************************************************************************/ #ifdef CONFIG_RTC_PERIODIC -static int stm32l4_rtc_wakeup_handler(int irq, FAR void *context, FAR void *arg) +static int stm32l4_rtc_wakeup_handler(int irq, FAR void *context, + FAR void *arg) { uint32_t regval = 0; @@ -1615,7 +1630,8 @@ static inline void rtc_enable_wakeup(void) { if (!g_wakeup_enabled) { - stm32l4_exti_wakeup(true, false, true, stm32l4_rtc_wakeup_handler, NULL); + stm32l4_exti_wakeup(true, false, true, stm32l4_rtc_wakeup_handler, + NULL); g_wakeup_enabled = true; } } @@ -1657,7 +1673,8 @@ static inline void rtc_set_wcksel(unsigned int wucksel) ****************************************************************************/ #ifdef CONFIG_RTC_PERIODIC -int stm32l4_rtc_setperiodic(FAR const struct timespec *period, wakeupcb_t callback) +int stm32l4_rtc_setperiodic(FAR const struct timespec *period, + wakeupcb_t callback) { unsigned int wutr_val; int ret; @@ -1671,7 +1688,8 @@ int stm32l4_rtc_setperiodic(FAR const struct timespec *period, wakeupcb_t callba #elif defined(CONFIG_STM32L4_RTC_LSICLOCK) # error "Periodic wakeup not available for LSI (and it is too inaccurate!)" #elif defined(CONFIG_STM32L4_RTC_LSECLOCK) - const uint32_t rtc_div16_max_msecs = 16 * 1000 * 0xffffu / STM32L4_LSE_FREQUENCY; + const uint32_t rtc_div16_max_msecs = 16 * 1000 * 0xffffu / + STM32L4_LSE_FREQUENCY; #else # error "No clock for RTC!" #endif @@ -1713,7 +1731,9 @@ int stm32l4_rtc_setperiodic(FAR const struct timespec *period, wakeupcb_t callba regval &= ~RTC_CR_WUTE; putreg32(regval, STM32L4_RTC_CR); - /* Poll WUTWF until it is set in RTC_ISR (takes around 2 RTCCLK clock cycles) */ + /* Poll WUTWF until it is set in RTC_ISR (takes around 2 RTCCLK + * clock cycles) + */ ret = -ETIMEDOUT; for (timeout = 0; timeout < SYNCHRO_TIMEOUT; timeout++) @@ -1809,7 +1829,9 @@ int stm32l4_rtc_cancelperiodic(void) regval &= ~(RTC_CR_WUTE | RTC_CR_WUTIE); putreg32(regval, STM32L4_RTC_CR); - /* Poll WUTWF until it is set in RTC_ISR (takes around 2 RTCCLK clock cycles) */ + /* Poll WUTWF until it is set in RTC_ISR (takes around 2 RTCCLK + * clock cycles) + */ ret = -ETIMEDOUT; for (timeout = 0; timeout < SYNCHRO_TIMEOUT; timeout++)