ARMv7-M SMP: Applied the latest changes for ARMv7A-SMP
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@ -53,6 +53,7 @@
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#include "up_arch.h"
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#include "sched/sched.h"
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#include "irq/irq.h"
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#include "up_internal.h"
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/****************************************************************************
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@ -319,6 +320,12 @@ static void up_dumpstate(void)
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#endif
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#ifdef CONFIG_SMP
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/* Show the CPU number */
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_alert("CPU%d:\n", up_cpu_index());
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#endif
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/* Then dump the registers (if available) */
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up_registerdump();
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@ -351,6 +358,12 @@ static void _up_assert(int errorcode)
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(void)up_irq_save();
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for (; ; )
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{
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#ifdef CONFIG_SMP
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/* Try (again) to stop activity on other CPUs */
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(void)spin_trylock(&g_cpu_irqlock);
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#endif
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#ifdef CONFIG_ARCH_LEDS
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board_autoled_on(LED_PANIC);
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up_mdelay(250);
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@ -165,6 +165,19 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
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#ifdef CONFIG_BUILD_PROTECTED
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CURRENT_REGS[REG_LR] = EXC_RETURN_PRIVTHR;
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#endif
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#ifdef CONFIG_SMP
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/* In an SMP configuration, the interrupt disable logic also
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* involves spinlocks that are configured per the TCB irqcount
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* field. This is logically equivalent to enter_critical_section().
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* The matching call to leave_critical_section() will be
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* performed in up_sigdeliver().
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*/
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DEBUGASSERT(tcb->irqcount < INT16_MAX);
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tcb->irqcount++;
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#endif
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/* And make sure that the saved context in the TCB is the same
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* as the interrupt return context.
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*/
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@ -211,6 +224,19 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver)
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#ifdef CONFIG_BUILD_PROTECTED
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tcb->xcp.regs[REG_LR] = EXC_RETURN_PRIVTHR;
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#endif
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#ifdef CONFIG_SMP
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/* In an SMP configuration, the interrupt disable logic also
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* involves spinlocks that are configured per the TCB irqcount
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* field. This is logically equivalent to enter_critical_section();
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* The matching leave_critical_section will be performed in
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* The matching call to leave_critical_section() will be performed
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* in up_sigdeliver().
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*/
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DEBUGASSERT(tcb->irqcount < INT16_MAX);
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tcb->irqcount++;
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#endif
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}
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}
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@ -124,9 +124,9 @@ void up_sigdeliver(void)
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/* Then restore the task interrupt state */
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#ifdef CONFIG_ARMV7M_USEBASEPRI
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up_irq_restore((uint8_t)regs[REG_BASEPRI]);
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leave_critical_section((uint8_t)regs[REG_BASEPRI]);
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#else
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up_irq_restore((uint16_t)regs[REG_PRIMASK]);
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leave_critical_section((uint16_t)regs[REG_PRIMASK]);
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#endif
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/* Deliver the signal */
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@ -136,9 +136,18 @@ void up_sigdeliver(void)
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/* Output any debug messages BEFORE restoring errno (because they may
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* alter errno), then disable interrupts again and restore the original
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* errno that is needed by the user logic (it is probably EINTR).
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*
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* REVISIT: In SMP mode up_irq_save() probably only disables interrupts
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* on the local CPU. We do not want to call enter_critical_section()
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* here, however, because we don't want this state to stick after the
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* call to up_fullcontextrestore().
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*
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* I would prefer that all interrupts are disabled when
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* up_fullcontextrestore() is called, but that may not be necessary.
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*/
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sinfo("Resuming\n");
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(void)up_irq_save();
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rtcb->pterrno = saved_errno;
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