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Merge remote-tracking branch 'origin/master' into usbhub

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This commit is contained in:
Gregory Nutt 2015-05-02 11:39:08 -06:00
commit 84983b0ab2
4 changed files with 264 additions and 249 deletions
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6
ChangeLog
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@ -10278,3 +10278,9 @@
stm32f37xxx_memorymap.h: Added missing EXTI definitions for the STM32
F3; Correct an error the port D base address in the STM32 F30x and F37x
memory maps. From Greg Meiste (2015-05-01).
* arch/arm/src/lpc17xx/lpc176x_gpio.c: Reorder steps when an output
GPIO is configured in order to avoid transient bad values from being
output. From Hal Glenn (2015-05-02).
* arch/arm/src/stm32/stm32_otgfsdev.c and stm32_otghsdev.c: Add
protection in the event that out-of-bound enpoint numbers are
received. From David Sidrane (2015-05-02).

15
arch/arm/src/lpc17xx/lpc176x_gpio.c
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@ -479,13 +479,6 @@ static inline int lpc17_configoutput(lpc17_pinset_t cfgset, unsigned int port,
(void)lpc17_configinput(DEFAULT_INPUT, port, pin);
/* Now, reconfigure the pin as an output */
fiobase = g_fiobase[port];
regval = getreg32(fiobase + LPC17_FIO_DIR_OFFSET);
regval |= (1 << pin);
putreg32(regval, fiobase + LPC17_FIO_DIR_OFFSET);
/* Check for open drain output */
if ((cfgset & GPIO_OPEN_DRAIN) != 0)
@ -505,6 +498,14 @@ static inline int lpc17_configoutput(lpc17_pinset_t cfgset, unsigned int port,
lpc17_gpiowrite(cfgset, ((cfgset & GPIO_VALUE) != GPIO_VALUE_ZERO));
/* Now, reconfigure the pin as an output */
fiobase = g_fiobase[port];
regval = getreg32(fiobase + LPC17_FIO_DIR_OFFSET);
regval |= (1 << pin);
putreg32(regval, fiobase + LPC17_FIO_DIR_OFFSET);
return OK;
}

4
arch/arm/src/stm32/stm32_otgfsdev.c
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@ -3124,6 +3124,9 @@ static inline void stm32_rxinterrupt(FAR struct stm32_usbdev_s *priv)
/* Decode status fields */
epphy = (regval & OTGFS_GRXSTSD_EPNUM_MASK) >> OTGFS_GRXSTSD_EPNUM_SHIFT;
if (epphy < STM32_NENDPOINTS)
{
privep = &priv->epout[epphy];
/* Handle the RX event according to the packet status field */
@ -3251,6 +3254,7 @@ static inline void stm32_rxinterrupt(FAR struct stm32_usbdev_s *priv)
}
break;
}
}
/* Enable the Rx Status Queue Level interrupt */

4
arch/arm/src/stm32/stm32_otghsdev.c
View File

@ -3124,6 +3124,9 @@ static inline void stm32_rxinterrupt(FAR struct stm32_usbdev_s *priv)
/* Decode status fields */
epphy = (regval & OTGHS_GRXSTSD_EPNUM_MASK) >> OTGHS_GRXSTSD_EPNUM_SHIFT;
if (epphy < STM32_NENDPOINTS)
{
privep = &priv->epout[epphy];
/* Handle the RX event according to the packet status field */
@ -3251,6 +3254,7 @@ static inline void stm32_rxinterrupt(FAR struct stm32_usbdev_s *priv)
}
break;
}
}
/* Enable the Rx Status Queue Level interrupt */