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SAML21. With these changes, the board now builds without error

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This commit is contained in:
Gregory Nutt 2015-05-22 10:36:37 -06:00
parent c5f5628875
commit 84cc27c57d
2 changed files with 15 additions and 14 deletions
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16
configs/samd20-xplained/include/board.h
View File

@ -179,7 +179,7 @@
* BOARD_DFLL_FINEVALUE - Value
*
* Closed loop mode only:
* BOARD_DFLL_GCLKGEN - See GCLK_CLKCTRL_GEN* definitions
* BOARD_DFLL_GCLKGEN - GCLK index
* BOARD_DFLL_MULTIPLIER - Value
* BOARD_DFLL_MAXCOARSESTEP - Value
* BOARD_DFLL_MAXFINESTEP - Value
@ -199,7 +199,7 @@
/* DFLL closed loop mode configuration */
#define BOARD_DFLL_SRCGCLKGEN GCLK_CLKCTRL_GEN1
#define BOARD_DFLL_SRCGCLKGEN 1
#define BOARD_DFLL_MULTIPLIER 6
#define BOARD_DFLL_QUICKLOCK 1
#define BOARD_DFLL_TRACKAFTERFINELOCK 1
@ -359,7 +359,7 @@
* to all SERCOM modules.
*/
#define BOARD_SERCOM_SLOW_GCLKGEN (GCLK_CLKCTRL_GEN0 >> GCLK_CLKCTRL_GEN_SHIFT)
#define BOARD_SERCOM_SLOW_GCLKGEN 0
/* SERCOM0 SPI is available on EXT1
*
@ -371,7 +371,7 @@
* 18 PA7 SERCOM0 PAD3 SPI SCK
*/
#define BOARD_SERCOM0_GCLKGEN GCLK_CLKCTRL_GEN0
#define BOARD_SERCOM0_GCLKGEN 0
#define BOARD_SERCOM0_MUXCONFIG (SPI_CTRLA_DOPO_DOPAD231 | SPI_CTRLA_DIPAD0)
#define BOARD_SERCOM0_PINMAP_PAD0 PORT_SERCOM0_PAD0_2 /* SPI_MISO */
#define BOARD_SERCOM0_PINMAP_PAD1 0 /* microSD_SS */
@ -390,7 +390,7 @@
* 18 PA19 SERCOM1 PAD3 SPI SCK
*/
#define BOARD_SERCOM1_GCLKGEN GCLK_CLKCTRL_GEN0
#define BOARD_SERCOM1_GCLKGEN 0
#define BOARD_SERCOM1_MUXCONFIG (SPI_CTRLA_DOPO_DOPAD231 | SPI_CTRLA_DIPAD0)
#define BOARD_SERCOM1_PINMAP_PAD0 PORT_SERCOM1_PAD0_1 /* SPI_MISO */
#define BOARD_SERCOM1_PINMAP_PAD1 0 /* microSD_SS */
@ -408,7 +408,7 @@
* PA25 SERCOM3 / USART RXD
*/
#define BOARD_SERCOM3_GCLKGEN GCLK_CLKCTRL_GEN0
#define BOARD_SERCOM3_GCLKGEN 0
#define BOARD_SERCOM3_MUXCONFIG (USART_CTRLA_RXPAD3 | USART_CTRLA_TXPAD2)
#define BOARD_SERCOM3_PINMAP_PAD0 0
#define BOARD_SERCOM3_PINMAP_PAD1 0
@ -432,7 +432,7 @@
* configurations.
*/
#define BOARD_SERCOM4_GCLKGEN GCLK_CLKCTRL_GEN0
#define BOARD_SERCOM4_GCLKGEN 0
#if defined(CONFIG_SAMD20_XPLAINED_USART4_EXT1)
# define BOARD_SERCOM4_MUXCONFIG (USART_CTRLA_RXPAD1 | USART_CTRLA_TXPAD0)
@ -466,7 +466,7 @@
* 18 PB23 SERCOM5 PAD3 SPI SCK
*/
#define BOARD_SERCOM5_GCLKGEN GCLK_CLKCTRL_GEN0
#define BOARD_SERCOM5_GCLKGEN 0
#define BOARD_SERCOM5_MUXCONFIG (SPI_CTRLA_DOPO_DOPAD231 | SPI_CTRLA_DIPAD0)
#define BOARD_SERCOM5_PINMAP_PAD0 PORT_SERCOM5_PAD0_1 /* SPI_MISO */
#define BOARD_SERCOM5_PINMAP_PAD1 0 /* microSD_SS */

13
configs/saml21-xplained/include/board.h
View File

@ -413,7 +413,8 @@
* to all SERCOM modules.
*/
#define BOARD_SERCOM_SLOW_GCLKGEN (GCLK_CLKCTRL_GEN0 >> GCLK_CLKCTRL_GEN_SHIFT)
#define BOARD_SERCOM_SLOW_GCLKGEN 0
#define BOARD_SERCOM_SLOW_GCLKCHAN GCLK_CHAN_SERCOM0_SLOW
/* SERCOM0 SPI is available on EXT1
*
@ -425,7 +426,7 @@
* 18 PA7 SERCOM0 PAD3 SPI SCK
*/
#define BOARD_SERCOM0_GCLKGEN GCLK_CLKCTRL_GEN0
#define BOARD_SERCOM0_GCLKGEN 0
#define BOARD_SERCOM0_MUXCONFIG (SPI_CTRLA_DOPO_DOPAD231 | SPI_CTRLA_DIPAD0)
#define BOARD_SERCOM0_PINMAP_PAD0 PORT_SERCOM0_PAD0_2 /* SPI_MISO */
#define BOARD_SERCOM0_PINMAP_PAD1 0 /* SPI_SS (not used) */
@ -444,7 +445,7 @@
* 20 VCC VCC VCC N/A
*/
#define BOARD_SERCOM1_GCLKGEN GCLK_CLKCTRL_GEN0
#define BOARD_SERCOM1_GCLKGEN 0
#define BOARD_SERCOM1_MUXCONFIG (USART_CTRLA_TXPAD2 | USART_CTRLA_RXPAD3)
#define BOARD_SERCOM1_PINMAP_PAD0 0 /* (not used) */
#define BOARD_SERCOM1_PINMAP_PAD1 0 /* (not used) */
@ -462,7 +463,7 @@
* PA23 SERCOM3 PAD[1] / USART RXD
*/
#define BOARD_SERCOM3_GCLKGEN GCLK_CLKCTRL_GEN0
#define BOARD_SERCOM3_GCLKGEN 0
#define BOARD_SERCOM3_MUXCONFIG (USART_CTRLA_RXPAD1 | USART_CTRLA_TXPAD0_2)
#define BOARD_SERCOM3_PINMAP_PAD0 PORT_SERCOM3_PAD0_1 /* USART TX */
#define BOARD_SERCOM3_PINMAP_PAD1 PORT_SERCOM3_PAD1_1 /* USART RX */
@ -481,7 +482,7 @@
* 20 VCC VCC VCC N/A
*/
#define BOARD_SERCOM4_GCLKGEN GCLK_CLKCTRL_GEN0
#define BOARD_SERCOM4_GCLKGEN 0
#define BOARD_SERCOM4_MUXCONFIG (USART_CTRLA_RXPAD1 | USART_CTRLA_TXPAD0_2)
#define BOARD_SERCOM4_PINMAP_PAD0 PORT_SERCOM4_PAD0_3 /* USART TX */
@ -501,7 +502,7 @@
* 18 PB23 SERCOM5 PAD3 SPI SCK
*/
#define BOARD_SERCOM5_GCLKGEN GCLK_CLKCTRL_GEN0
#define BOARD_SERCOM5_GCLKGEN 0
#define BOARD_SERCOM5_MUXCONFIG (SPI_CTRLA_DOPO_DOPAD231 | SPI_CTRLA_DIPAD0)
#define BOARD_SERCOM5_PINMAP_PAD0 PORT_SERCOM5_PAD0_1 /* SPI_MISO */
#define BOARD_SERCOM5_PINMAP_PAD1 0 /* SPI_SS (not used) */