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Add support for ram vectors to the ARMv7-M architecture

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git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@5756 42af7a65-404d-4744-a932-0658087f49c3
This commit is contained in:
patacongo 2013-03-18 21:10:08 +00:00
parent 730dc3e202
commit 854dbf19e5
22 changed files with 587 additions and 48 deletions
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5
ChangeLog
View File

@ -4371,4 +4371,7 @@
because UART TX is almost always available, but it does become an
if the UART uses hardware flow control or if the a "lower half" is
something like the USB CDC/ACM driver that may need to block for
significant amounts of time.
significant amounts of time (2013-03-18).
* arch/arm/src/armv7-h/ram_vectors.h, up_ramvec_*.c, arch/arm/src/*/*_irq.c,
and Make.defs: Add support for modifiable interrupt vectors in RAM
(2013-03-18).

12
arch/Kconfig
View File

@ -300,6 +300,18 @@ config ARCH_RAMFUNCS
so that FLASH can be reconfigured while the MCU executes out of
SRAM.
config ARCH_HAVE_RAMVECTORS
bool
default n
config ARCH_RAMVECTORS
bool "Support RAM interrupt vectors"
default n
depends on ARCH_HAVE_RAMVECTORS
---help---
If ARCH_RAMVECTORS is defined, then the architecture will support
modifiable vectors in a RAM-based vector table.
comment "Board Settings"
config BOARD_LOOPSPERMSEC

2
arch/arm/Kconfig
View File

@ -143,10 +143,12 @@ config ARCH_CORTEXM0
config ARCH_CORTEXM3
bool
select ARCH_IRQPRIO
select ARCH_HAVE_RAMVECTORS
config ARCH_CORTEXM4
bool
select ARCH_IRQPRIO
select ARCH_HAVE_RAMVECTORS
config ARCH_FAMILY
string

123
arch/arm/src/armv7-m/ram_vectors.h Normal file
View File

@ -0,0 +1,123 @@
/************************************************************************************
* arch/arm/src/armv7-m/ram_vectors.h
*
* Copyright (C) 2013 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
************************************************************************************/
#ifndef __ARCH_ARM_SRC_COMMON_ARMV7_M_RAM_VECTORS_H
#define __ARCH_ARM_SRC_COMMON_ARMV7_M_RAM_VECTORS_H
/************************************************************************************
* Included Files
************************************************************************************/
#include <nuttx/config.h>
/* If CONFIG_ARMV7M_CMNVECTOR is defined then the number of peripheral interrupts
* is provided in chip.h.
*/
#include "chip.h"
#include "up_internal.h"
#ifdef CONFIG_ARCH_RAMVECTORS
/************************************************************************************
* Pre-processor Definitions
************************************************************************************/
/* This logic currently only works if CONFIG_ARMV7M_CMNVECTOR is defined. That is
* because CONFIG_ARMV7M_CMNVECTOR is needed to induce chip.h into giving us the
* number of peripheral interrupts. "Oh want a tangled web we weave..."
*/
#ifndef CONFIG_ARMV7M_CMNVECTOR
# error "This logic requires CONFIG_ARMV7M_CMNVECTOR"
#endif
/* This, then is the size of the vector table (in 4-byte entries). This size
* includes the IDLE stack pointer which lies at the beginning of
* the table.
*/
#define ARMV7M_VECTAB_SIZE (ARMV7M_PERIPHERAL_INTERRUPTS)
/************************************************************************************
* Public Data
************************************************************************************/
/* If CONFIG_ARCH_RAMVECTORS is defined, then the ARM logic must provide
* ARM-specific implementations of irq_initialize(), irq_attach(), and
* irq_dispatch. In this case, it is also assumed that the ARM vector
* table resides in RAM, has the the name up_ram_vectors, and has been
* properly positioned and aligned in memory by the linker script.
*/
extern up_vector_t g_ram_vectors[ARMV7M_VECTAB_SIZE]
__attribute__((section(".ram_vectors")));
/************************************************************************************
* Public Function Prototypes
************************************************************************************/
/****************************************************************************
* Name: up_ramvec_initialize
*
* Description:
* Copy vectors to RAM an configure the NVIC to use the RAM vectors.
*
****************************************************************************/
void up_ramvec_initialize(void);
/****************************************************************************
* Name: exception_common
*
* Description:
* This is the default, common vector handling entrypoint.
*
****************************************************************************/
void exception_common(void);
/****************************************************************************
* Name: up_ramvec_attach
*
* Description:
* Configure the ram vector table so that IRQ number 'irq' will be
* dipatched by hardware to 'vector'
*
****************************************************************************/
int up_ramvec_attach(int irq, up_vector_t vector);
#endif /* CONFIG_ARCH_RAMVECTORS */
#endif /* __ARCH_ARM_SRC_COMMON_ARMV7_M_RAM_VECTORS_H */

125
arch/arm/src/armv7-m/up_ramvec_attach.c Normal file
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@ -0,0 +1,125 @@
/****************************************************************************
* arch/arm/irq/up_ramvec_attach.c
*
* Copyright (C) 2013 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <nuttx/irq.h>
#include <nuttx/arch.h>
#include "ram_vectors.h"
#ifdef CONFIG_ARCH_RAMVECTORS
/****************************************************************************
* Pre-processor Definitions
****************************************************************************/
/****************************************************************************
* Private Type Declarations
****************************************************************************/
/****************************************************************************
* Global Variables
****************************************************************************/
/****************************************************************************
* Private Variables
****************************************************************************/
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* Public Functions
****************************************************************************/
/* Common exception entrypoint */
void exception_common(void);
/****************************************************************************
* Name: up_ramvec_attach
*
* Description:
* Configure the ram vector table so that IRQ number 'irq' will be
* dipatched by hardware to 'vector'
*
****************************************************************************/
int up_ramvec_attach(int irq, up_vector_t vector)
{
int ret = ERROR;
if ((unsigned)irq < ARMV7M_PERIPHERAL_INTERRUPTS)
{
irqstate_t flags;
/* If the new vector is NULL, then the vector is being detached. In
* this case, disable the itnerrupt and direct any interrupts to the
* common exception handler.
*/
flags = irqsave();
if (vector == NULL)
{
/* Disable the interrupt if we can before detaching it. We might
* not be able to do this for all interrupts.
*/
up_disable_irq(irq);
/* Detaching the vector really means re-attaching it to the
* common exception handler.
*/
vector = exception_common;
}
/* Save the new vector in the vector table. */
g_ram_vectors[irq] = vector;
irqrestore(flags);
ret = OK;
}
return ret;
}
#endif /* !CONFIG_ARCH_RAMVECTORS */

124
arch/arm/src/armv7-m/up_ramvec_initialize.c Normal file
View File

@ -0,0 +1,124 @@
/****************************************************************************
* arm/arm/src/armv7-m/up_ramvec_initialize.c
*
* Copyright (C) 2013 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <nuttx/arch.h>
#include <nuttx/irq.h>
#include "nvic.h"
#include "ram_vectors.h"
#include "up_arch.h"
#include "up_internal.h"
#ifdef CONFIG_ARCH_RAMVECTORS
/****************************************************************************
* Definitions
****************************************************************************/
/****************************************************************************
* Private Type Declarations
****************************************************************************/
/****************************************************************************
* Global Variables
****************************************************************************/
/* If CONFIG_ARCH_RAMVECTORS is defined, then the ARM logic must provide
* ARM-specific implementations of up_ramvec_initialize(), irq_attach(), and
* irq_dispatch. In this case, it is also assumed that the ARM vector
* table resides in RAM, has the the name up_ram_vectors, and has been
* properly positioned and aligned in memory by the linker script.
*/
up_vector_t g_ram_vectors[ARMV7M_VECTAB_SIZE]
__attribute__((section(".ram_vectors")));
/****************************************************************************
* Private Variables
****************************************************************************/
/****************************************************************************
* Private Function Prototypes
****************************************************************************/
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: up_ramvec_initialize
*
* Description:
* Copy vectors to RAM an configure the NVIC to use the RAM vectors.
*
****************************************************************************/
void up_ramvec_initialize(void)
{
const up_vector_t *src;
up_vector_t *dest;
int i;
/* The vector table must be aligned */
DEBUGASSERT(((uintptr)g_ram_vectors & 0x3f) == 0);
/* Copy the ROM vector table at address zero to RAM vector table.
*
* This must be done BEFORE the MPU is enable if the MPU is being used to
* protect against NULL pointer references.
*/
src = (const CODE up_vector_t *)0;
dest = g_ram_vectors;
for (i = 0; i < ARMV7M_VECTAB_SIZE; i++)
{
*dest++ = *src++;
}
/* Now configure the NVIC to use the new vector table. Bit 29 indicates
* that the vector table is in RAM.
*/
putreg32((uint32_t)g_ram_vectors | (1 << 29), NVIC_VECTAB);
}
#endif /* !CONFIG_ARCH_RAMVECTORS */

4
arch/arm/src/kinetis/Make.defs
View File

@ -50,6 +50,10 @@ CMN_CSRCS = up_allocateheap.c up_assert.c up_blocktask.c up_copystate.c \
up_doirq.c up_hardfault.c up_svcall.c up_checkstack.c \
up_vfork.c
ifeq ($(CONFIG_ARCH_RAMVECTORS),y)
CMN_CSRCS += up_ramvec_initialize.c up_ramvec_attach.c
endif
ifeq ($(CONFIG_ARCH_MEMCPY),y)
CMN_ASRCS += up_memcpy.S
endif

9
arch/arm/src/kinetis/kinetis_irq.c
View File

@ -48,6 +48,7 @@
#include <arch/irq.h>
#include "nvic.h"
#include "ram_vectors.h"
#include "up_arch.h"
#include "os_internal.h"
#include "up_internal.h"
@ -322,6 +323,14 @@ void up_irqinitialize(void)
putreg32(0, NVIC_IRQ64_95_ENABLE);
putreg32(0, NVIC_IRQ96_127_ENABLE);
/* If CONFIG_ARCH_RAMVECTORS is defined, then we are using a RAM-based
* vector table that requires special initialization.
*/
#ifdef CONFIG_ARCH_RAMVECTORS
up_ramvec_initialize();
#endif
/* Set all interrrupts (and exceptions) to the default priority */
putreg32(DEFPRIORITY32, NVIC_SYSH4_7_PRIORITY);

4
arch/arm/src/lm/Make.defs
View File

@ -46,6 +46,10 @@ CMN_CSRCS = up_allocateheap.c up_assert.c up_blocktask.c up_copystate.c \
up_usestack.c up_doirq.c up_hardfault.c up_svcall.c \
up_vfork.c
ifeq ($(CONFIG_ARCH_RAMVECTORS),y)
CMN_CSRCS += up_ramvec_initialize.c up_ramvec_attach.c
endif
ifeq ($(CONFIG_ARCH_MEMCPY),y)
CMN_ASRCS += up_memcpy.S
endif

9
arch/arm/src/lm/lm_irq.c
View File

@ -48,6 +48,7 @@
#include <arch/irq.h>
#include "nvic.h"
#include "ram_vectors.h"
#include "up_arch.h"
#include "os_internal.h"
#include "up_internal.h"
@ -292,6 +293,14 @@ void up_irqinitialize(void)
putreg32(0, NVIC_IRQ0_31_ENABLE);
putreg32(0, NVIC_IRQ32_63_ENABLE);
/* If CONFIG_ARCH_RAMVECTORS is defined, then we are using a RAM-based
* vector table that requires special initialization.
*/
#ifdef CONFIG_ARCH_RAMVECTORS
up_ramvec_initialize();
#endif
/* Set all interrrupts (and exceptions) to the default priority */
putreg32(DEFPRIORITY32, NVIC_SYSH4_7_PRIORITY);

4
arch/arm/src/lpc17xx/Make.defs
View File

@ -59,6 +59,10 @@ CMN_ASRCS += up_exception.S
CMN_CSRCS += up_vectors.c
endif
ifeq ($(CONFIG_ARCH_RAMVECTORS),y)
CMN_CSRCS += up_ramvec_initialize.c up_ramvec_attach.c
endif
ifeq ($(CONFIG_ARCH_MEMCPY),y)
CMN_ASRCS += up_memcpy.S
endif

9
arch/arm/src/lpc17xx/lpc17_irq.c
View File

@ -48,6 +48,7 @@
#include <arch/irq.h>
#include "nvic.h"
#include "ram_vectors.h"
#include "up_arch.h"
#include "os_internal.h"
#include "up_internal.h"
@ -290,6 +291,14 @@ void up_irqinitialize(void)
putreg32(0, NVIC_IRQ0_31_ENABLE);
/* If CONFIG_ARCH_RAMVECTORS is defined, then we are using a RAM-based
* vector table that requires special initialization.
*/
#ifdef CONFIG_ARCH_RAMVECTORS
up_ramvec_initialize();
#endif
/* Set all interrrupts (and exceptions) to the default priority */
putreg32(DEFPRIORITY32, NVIC_SYSH4_7_PRIORITY);

4
arch/arm/src/lpc43xx/Make.defs
View File

@ -51,6 +51,10 @@ CMN_ASRCS += up_exception.S
CMN_CSRCS += up_vectors.c
endif
ifeq ($(CONFIG_ARCH_RAMVECTORS),y)
CMN_CSRCS += up_ramvec_initialize.c up_ramvec_attach.c
endif
ifeq ($(CONFIG_ARCH_MEMCPY),y)
CMN_ASRCS += up_memcpy.S
endif

8
arch/arm/src/lpc43xx/lpc43_irq.c
View File

@ -49,6 +49,7 @@
#include "chip.h"
#include "nvic.h"
#include "ram_vectors.h"
#include "up_arch.h"
#include "os_internal.h"
#include "up_internal.h"
@ -309,9 +310,16 @@ void up_irqinitialize(void)
* positioned in SRAM or in external FLASH, then we may need to reset
* the interrupt vector so that it refers to the table in SRAM or in
* external FLASH.
*
* If CONFIG_ARCH_RAMVECTORS is defined, then we are using a RAM-based
* vector table that requires special initialization.
*/
#ifdef CONFIG_ARCH_RAMVECTORS
up_ramvec_initialize();
#else
putreg32((uint32_t)_vectors, NVIC_VECTAB);
#endif
/* Set all interrupts (and exceptions) to the default priority */

4
arch/arm/src/sam3u/Make.defs
View File

@ -51,6 +51,10 @@ CMN_CSRCS += up_hardfault.c up_svcall.c up_vfork.c
# Configuration-dependent common files
ifeq ($(CONFIG_ARCH_RAMVECTORS),y)
CMN_CSRCS += up_ramvec_initialize.c up_ramvec_attach.c
endif
ifeq ($(CONFIG_ARCH_MEMCPY),y)
CMN_ASRCS += up_memcpy.S
endif

11
arch/arm/src/sam3u/sam3u_irq.c
View File

@ -48,6 +48,7 @@
#include <arch/irq.h>
#include "nvic.h"
#include "ram_vectors.h"
#include "up_arch.h"
#include "os_internal.h"
#include "up_internal.h"
@ -280,9 +281,15 @@ void up_irqinitialize(void)
putreg32(0, NVIC_IRQ0_31_ENABLE);
/* Set up the vector table address */
/* Set up the vector table address.
*
* If CONFIG_ARCH_RAMVECTORS is defined, then we are using a RAM-based
* vector table that requires special initialization.
*/
#ifdef CONFIG_SAM3U_DFU
#if defined(CONFIG_ARCH_RAMVECTORS)
up_ramvec_initialize();
#elif defined(CONFIG_STM32_DFU)
putreg32((uint32_t)sam3u_vectors, NVIC_VECTAB);
#endif

4
arch/arm/src/stm32/Make.defs
View File

@ -56,6 +56,10 @@ CMN_ASRCS += up_exception.S
CMN_CSRCS += up_vectors.c
endif
ifeq ($(CONFIG_ARCH_RAMVECTORS),y)
CMN_CSRCS += up_ramvec_initialize.c up_ramvec_attach.c
endif
ifeq ($(CONFIG_ARCH_MEMCPY),y)
CMN_ASRCS += up_memcpy.S
endif

8
arch/arm/src/stm32/stm32_irq.c
View File

@ -48,6 +48,7 @@
#include <arch/irq.h>
#include "nvic.h"
#include "ram_vectors.h"
#include "up_arch.h"
#include "os_internal.h"
#include "up_internal.h"
@ -302,9 +303,14 @@ void up_irqinitialize(void)
* at address 0x0800:0000. If we are using the STMicro DFU bootloader, then
* the vector table will be offset to a different location in FLASH and we
* will need to set the NVIC vector location to this alternative location.
*
* If CONFIG_ARCH_RAMVECTORS is defined, then we are using a RAM-based
* vector table that requires special initialization.
*/
#ifdef CONFIG_STM32_DFU
#if defined(CONFIG_ARCH_RAMVECTORS)
up_ramvec_initialize();
#elif defined(CONFIG_STM32_DFU)
putreg32((uint32_t)stm32_vectors, NVIC_VECTAB);
#endif

120
configs/stm32f4discovery/ostest/defconfig
View File

@ -16,7 +16,6 @@ CONFIG_HOST_WINDOWS=y
CONFIG_WINDOWS_CYGWIN=y
# CONFIG_WINDOWS_MSYS is not set
# CONFIG_WINDOWS_OTHER is not set
# CONFIG_WINDOWS_MKLINK is not set
#
# Build Configuration
@ -70,26 +69,36 @@ CONFIG_ARCH="arm"
# CONFIG_ARCH_CHIP_DM320 is not set
# CONFIG_ARCH_CHIP_IMX is not set
# CONFIG_ARCH_CHIP_KINETIS is not set
# CONFIG_ARCH_CHIP_LM3S is not set
# CONFIG_ARCH_CHIP_LM is not set
# CONFIG_ARCH_CHIP_LPC17XX is not set
# CONFIG_ARCH_CHIP_LPC214X is not set
# CONFIG_ARCH_CHIP_LPC2378 is not set
# CONFIG_ARCH_CHIP_LPC31XX is not set
# CONFIG_ARCH_CHIP_LPC43XX is not set
# CONFIG_ARCH_CHIP_NUC1XX is not set
# CONFIG_ARCH_CHIP_SAM3U is not set
CONFIG_ARCH_CHIP_STM32=y
# CONFIG_ARCH_CHIP_STR71X is not set
CONFIG_ARCH_CORTEXM4=y
CONFIG_ARCH_FAMILY="armv7-m"
CONFIG_ARCH_CHIP="stm32"
# CONFIG_ARMV7M_USEBASEPRI is not set
CONFIG_ARCH_HAVE_CMNVECTOR=y
# CONFIG_ARMV7M_CMNVECTOR is not set
# CONFIG_ARCH_FPU is not set
CONFIG_ARCH_HAVE_MPU=y
# CONFIG_ARMV7M_MPU is not set
CONFIG_ARCH_IRQPRIO=y
CONFIG_BOARD_LOOPSPERMSEC=16717
# CONFIG_ARCH_CALIBRATION is not set
#
# ARMV7M Configuration Options
#
# CONFIG_ARMV7M_TOOLCHAIN_ATOLLIC is not set
# CONFIG_ARMV7M_TOOLCHAIN_BUILDROOT is not set
# CONFIG_ARMV7M_TOOLCHAIN_CODEREDW is not set
CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y
# CONFIG_ARMV7M_TOOLCHAIN_DEVKITARM is not set
# CONFIG_ARMV7M_TOOLCHAIN_GNU_EABI is not set
# CONFIG_ARMV7M_TOOLCHAIN_RAISONANCE is not set
# CONFIG_SERIAL_TERMIOS is not set
#
@ -114,6 +123,18 @@ CONFIG_BOARD_LOOPSPERMSEC=16717
# CONFIG_ARCH_CHIP_STM32F105VBT7 is not set
# CONFIG_ARCH_CHIP_STM32F107VC is not set
# CONFIG_ARCH_CHIP_STM32F207IG is not set
# CONFIG_ARCH_CHIP_STM32F302CB is not set
# CONFIG_ARCH_CHIP_STM32F302CC is not set
# CONFIG_ARCH_CHIP_STM32F302RB is not set
# CONFIG_ARCH_CHIP_STM32F302RC is not set
# CONFIG_ARCH_CHIP_STM32F302VB is not set
# CONFIG_ARCH_CHIP_STM32F302VC is not set
# CONFIG_ARCH_CHIP_STM32F303CB is not set
# CONFIG_ARCH_CHIP_STM32F303CC is not set
# CONFIG_ARCH_CHIP_STM32F303RB is not set
# CONFIG_ARCH_CHIP_STM32F303RC is not set
# CONFIG_ARCH_CHIP_STM32F303VB is not set
# CONFIG_ARCH_CHIP_STM32F303VC is not set
# CONFIG_ARCH_CHIP_STM32F405RG is not set
# CONFIG_ARCH_CHIP_STM32F405VG is not set
# CONFIG_ARCH_CHIP_STM32F405ZG is not set
@ -124,13 +145,6 @@ CONFIG_ARCH_CHIP_STM32F407VG=y
# CONFIG_ARCH_CHIP_STM32F407IE is not set
# CONFIG_ARCH_CHIP_STM32F407IG is not set
CONFIG_STM32_STM32F40XX=y
# CONFIG_STM32_CODESOURCERYW is not set
CONFIG_STM32_CODESOURCERYL=y
# CONFIG_STM32_ATOLLIC_LITE is not set
# CONFIG_STM32_ATOLLIC_PRO is not set
# CONFIG_STM32_DEVKITARM is not set
# CONFIG_STM32_RAISONANCE is not set
# CONFIG_STM32_BUILDROOT is not set
# CONFIG_STM32_DFU is not set
#
@ -191,6 +205,7 @@ CONFIG_STM32_USART2=y
#
# Alternate Pin Mapping
#
# CONFIG_STM32_FLASH_PREFETCH is not set
# CONFIG_STM32_JTAG_DISABLE is not set
# CONFIG_STM32_JTAG_FULL_ENABLE is not set
# CONFIG_STM32_JTAG_NOJNTRST_ENABLE is not set
@ -198,21 +213,45 @@ CONFIG_STM32_JTAG_SW_ENABLE=y
# CONFIG_STM32_FORCEPOWER is not set
# CONFIG_ARCH_BOARD_STM32_CUSTOM_CLOCKCONFIG is not set
# CONFIG_STM32_CCMEXCLUDE is not set
CONFIG_STM32_USART=y
#
# U[S]ART Configuration
#
# CONFIG_USART2_RS485 is not set
# CONFIG_STM32_USART_SINGLEWIRE is not set
#
# USB Host Configuration
#
#
# USB Device Configuration
#
#
# External Memory Configuration
#
#
# Architecture Options
#
# CONFIG_ARCH_NOINTC is not set
# CONFIG_ARCH_VECNOTIRQ is not set
# CONFIG_ARCH_DMA is not set
CONFIG_ARCH_IRQPRIO=y
# CONFIG_CUSTOM_STACK is not set
# CONFIG_ADDRENV is not set
CONFIG_ARCH_HAVE_VFORK=y
CONFIG_ARCH_STACKDUMP=y
# CONFIG_ENDIAN_BIG is not set
# CONFIG_ARCH_HAVE_RAMFUNCS is not set
#
# Board Settings
#
CONFIG_BOARD_LOOPSPERMSEC=16717
# CONFIG_ARCH_CALIBRATION is not set
CONFIG_DRAM_START=0x20000000
CONFIG_DRAM_SIZE=114688
CONFIG_ARCH_HAVE_INTERRUPTSTACK=y
@ -250,10 +289,12 @@ CONFIG_ARCH_HAVE_IRQBUTTONS=y
#
# RTOS Features
#
# CONFIG_BOARD_INITIALIZE is not set
CONFIG_MSEC_PER_TICK=10
CONFIG_RR_INTERVAL=200
# CONFIG_SCHED_INSTRUMENTATION is not set
CONFIG_TASK_NAME_SIZE=0
# CONFIG_SCHED_HAVE_PARENT is not set
# CONFIG_JULIAN_TIME is not set
CONFIG_START_YEAR=2009
CONFIG_START_MONTH=9
@ -264,8 +305,8 @@ CONFIG_DEV_CONSOLE=y
# CONFIG_FDCLONE_DISABLE is not set
# CONFIG_FDCLONE_STDIO is not set
CONFIG_SDCLONE_DISABLE=y
# CONFIG_SCHED_WORKQUEUE is not set
# CONFIG_SCHED_WAITPID is not set
# CONFIG_SCHED_STARTHOOK is not set
# CONFIG_SCHED_ATEXIT is not set
# CONFIG_SCHED_ONEXIT is not set
CONFIG_USER_ENTRYPOINT="ostest_main"
@ -275,9 +316,15 @@ CONFIG_DISABLE_OS_API=y
# CONFIG_DISABLE_PTHREAD is not set
# CONFIG_DISABLE_SIGNALS is not set
# CONFIG_DISABLE_MQUEUE is not set
CONFIG_DISABLE_MOUNTPOINT=y
CONFIG_DISABLE_ENVIRON=y
CONFIG_DISABLE_POLL=y
#
# Signal Numbers
#
CONFIG_SIG_SIGUSR1=1
CONFIG_SIG_SIGUSR2=2
CONFIG_SIG_SIGALARM=3
CONFIG_SIG_SIGCONDTIMEDOUT=16
#
# Sizes of configurable things (0 disables)
@ -297,7 +344,6 @@ CONFIG_PREALLOC_TIMERS=4
#
# Stack and heap information
#
# CONFIG_CUSTOM_STACK is not set
CONFIG_IDLETHREAD_STACKSIZE=1024
CONFIG_USERMAIN_STACKSIZE=2048
CONFIG_PTHREAD_STACK_MIN=256
@ -306,6 +352,7 @@ CONFIG_PTHREAD_STACK_DEFAULT=2048
#
# Device Drivers
#
CONFIG_DISABLE_POLL=y
CONFIG_DEV_NULL=y
# CONFIG_DEV_ZERO is not set
# CONFIG_LOOP is not set
@ -333,7 +380,6 @@ CONFIG_DEV_LOWCONSOLE=y
# CONFIG_16550_UART is not set
CONFIG_ARCH_HAVE_USART2=y
CONFIG_MCU_SERIAL=y
CONFIG_STANDARD_SERIAL=y
CONFIG_USART2_SERIAL_CONSOLE=y
# CONFIG_NO_SERIAL_CONSOLE is not set
@ -371,11 +417,13 @@ CONFIG_USART2_2STOP=0
#
# File system configuration
#
CONFIG_DISABLE_MOUNTPOINT=y
# CONFIG_FS_RAMMAP is not set
#
# System Logging
#
# CONFIG_SYSLOG_ENABLE is not set
# CONFIG_SYSLOG is not set
#
@ -386,6 +434,7 @@ CONFIG_USART2_2STOP=0
#
# Memory Management
#
# CONFIG_MM_MULTIHEAP is not set
# CONFIG_MM_SMALL is not set
CONFIG_MM_REGIONS=2
# CONFIG_GRAN is not set
@ -396,11 +445,17 @@ CONFIG_MM_REGIONS=2
# CONFIG_BINFMT_DISABLE is not set
# CONFIG_NXFLAT is not set
# CONFIG_ELF is not set
# CONFIG_BUILTIN is not set
# CONFIG_PIC is not set
CONFIG_SYMTAB_ORDEREDBYNAME=y
#
# Library Routines
#
#
# Standard C Library Options
#
CONFIG_STDIO_BUFFER_SIZE=64
CONFIG_STDIO_LINEBUFFER=y
CONFIG_NUNGET_CHARS=2
@ -411,6 +466,9 @@ CONFIG_NUNGET_CHARS=2
# CONFIG_EOL_IS_LF is not set
# CONFIG_EOL_IS_BOTH_CRLF is not set
CONFIG_EOL_IS_EITHER_CRLF=y
# CONFIG_LIBC_EXECFUNCS is not set
CONFIG_POSIX_SPAWN_PROXY_STACKSIZE=1024
CONFIG_TASK_SPAWN_DEFAULT_STACKSIZE=2048
# CONFIG_LIBC_STRERROR is not set
# CONFIG_LIBC_PERROR_STDOUT is not set
CONFIG_ARCH_LOWPUTC=y
@ -418,9 +476,16 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
# CONFIG_ARCH_ROMGETC is not set
# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
#
# Non-standard Library Support
#
# CONFIG_SCHED_WORKQUEUE is not set
# CONFIG_LIB_KBDCODEC is not set
#
# Basic CXX Support
#
# CONFIG_C99_BOOL8 is not set
# CONFIG_HAVE_CXX is not set
#
@ -428,16 +493,14 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
#
#
# Named Applications
# Built-In Applications
#
# CONFIG_BUILTIN is not set
#
# Examples
#
# CONFIG_EXAMPLES_BUTTONS is not set
# CONFIG_EXAMPLES_CAN is not set
# CONFIG_EXAMPLES_CDCACM is not set
# CONFIG_EXAMPLES_COMPOSITE is not set
# CONFIG_EXAMPLES_DHCPD is not set
# CONFIG_EXAMPLES_ELF is not set
@ -447,12 +510,12 @@ CONFIG_LIB_SENDFILE_BUFSIZE=512
# CONFIG_EXAMPLES_HELLOXX is not set
# CONFIG_EXAMPLES_JSON is not set
# CONFIG_EXAMPLES_HIDKBD is not set
# CONFIG_EXAMPLES_KEYPADTEST is not set
# CONFIG_EXAMPLES_IGMP is not set
# CONFIG_EXAMPLES_LCDRW is not set
# CONFIG_EXAMPLES_MM is not set
# CONFIG_EXAMPLES_MOUNT is not set
# CONFIG_EXAMPLES_MODBUS is not set
# CONFIG_EXAMPLES_NETTEST is not set
# CONFIG_EXAMPLES_NSH is not set
# CONFIG_EXAMPLES_NULL is not set
# CONFIG_EXAMPLES_NX is not set
@ -473,6 +536,7 @@ CONFIG_EXAMPLES_OSTEST_RR_RUNS=10
# CONFIG_EXAMPLES_PASHELLO is not set
# CONFIG_EXAMPLES_PIPE is not set
# CONFIG_EXAMPLES_POLL is not set
# CONFIG_EXAMPLES_POSIXSPAWN is not set
# CONFIG_EXAMPLES_QENCODER is not set
# CONFIG_EXAMPLES_RGMP is not set
# CONFIG_EXAMPLES_ROMFS is not set
@ -488,11 +552,11 @@ CONFIG_EXAMPLES_OSTEST_RR_RUNS=10
# CONFIG_EXAMPLES_USBMSC is not set
# CONFIG_EXAMPLES_USBTERM is not set
# CONFIG_EXAMPLES_WATCHDOG is not set
# CONFIG_EXAMPLES_WLAN is not set
#
# Interpreters
# Graphics Support
#
# CONFIG_TIFF is not set
#
# Interpreters
@ -522,11 +586,7 @@ CONFIG_EXAMPLES_OSTEST_RR_RUNS=10
# CONFIG_NETUTILS_WEBCLIENT is not set
#
# ModBus
#
#
# FreeModbus
# FreeModBus
#
# CONFIG_MODBUS is not set
@ -581,3 +641,7 @@ CONFIG_EXAMPLES_OSTEST_RR_RUNS=10
# Sysinfo
#
# CONFIG_SYSTEM_SYSINFO is not set
#
# USB Monitor
#

6
include/nuttx/arch.h
View File

@ -894,9 +894,9 @@ void sched_process_timer(void);
* Name: irq_dispatch
*
* Description:
* This function must be called from the achitecture-
* specific logic in order to dispatch an interrupt to
* the appropriate, registered handling logic.
* This function must be called from the achitecture-specific logic in
* order to dispatch an interrupt to the appropriate, registered handling
* logic.
*
***************************************************************************/

27
include/nuttx/irq.h
View File

@ -1,7 +1,7 @@
/****************************************************************************
* include/nuttx/irq.h
*
* Copyright (C) 2007-2011 Gregory Nutt. All rights reserved.
* Copyright (C) 2007-2011, 2013 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
@ -47,6 +47,9 @@
/****************************************************************************
* Pre-Processor Definitions
****************************************************************************/
/* IRQ detach is a convenience definition. Detaching an interrupt handler
* is equivalent to setting a NULL interrupt handler.
*/
#ifndef __ASSEMBLY__
# define irq_detach(isr) irq_attach(isr, NULL)
@ -70,19 +73,29 @@ typedef int (*xcpt_t)(int irq, FAR void *context);
* Public Variables
****************************************************************************/
/****************************************************************************
* Public Function Prototypes
****************************************************************************/
#ifndef __ASSEMBLY__
#ifdef __cplusplus
#define EXTERN extern "C"
extern "C" {
extern "C"
{
#else
#define EXTERN extern
#endif
EXTERN int irq_attach(int irq, xcpt_t isr);
/****************************************************************************
* Public Function Prototypes
****************************************************************************/
/****************************************************************************
* Name: irq_attach
*
* Description:
* Configure the IRQ subsystem so that IRQ number 'irq' is dispatched to
* 'isr'
*
****************************************************************************/
int irq_attach(int irq, xcpt_t isr);
#undef EXTERN
#ifdef __cplusplus

9
sched/irq_internal.h
View File

@ -1,7 +1,7 @@
/****************************************************************************
* sched/irq_internal.h
*
* Copyright (C) 2007, 2008 Gregory Nutt. All rights reserved.
* Copyright (C) 2007, 2008, 2013 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
@ -66,13 +66,14 @@ extern FAR xcpt_t g_irqvector[NR_IRQS+1];
#ifdef __cplusplus
#define EXTERN extern "C"
extern "C" {
extern "C"
{
#else
#define EXTERN extern
#endif
EXTERN void weak_function irq_initialize(void);
EXTERN int irq_unexpected_isr(int irq, FAR void *context);
void weak_function irq_initialize(void);
int irq_unexpected_isr(int irq, FAR void *context);
#undef EXTERN
#ifdef __cplusplus