SAMA5D3x-EK: At support for the AT25 serial FLASH
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@ -89,7 +89,7 @@
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* Name: sam_spiinitialize
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*
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* Description:
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* Called to configure SPI chip select GPIO pins for the SAM3U10E-EVAL board.
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* Called to configure SPI chip select GPIO pins for the SAM3U-EK board.
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*
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************************************************************************************/
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@ -62,7 +62,6 @@ README
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Contents
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========
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- PIO Muliplexing
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- Development Environment
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- GNU Toolchain Options
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- IDEs
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@ -74,14 +73,10 @@ Contents
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- Creating and Using NORBOOT
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- Buttons and LEDs
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- Serial Consoles
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- Serial FLASH
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- SAMA5D3x-EK Configuration Options
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- Configurations
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PIO Muliplexing
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===============
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To be provided
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Development Environment
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=======================
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@ -513,6 +508,25 @@ Serial Consoles
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- Jumper JP16 not fitted: CDC is enabled
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- Jumper JP16 fitted : CDC is disabled"
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Serial FLASH
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============
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Both the Ronetix and Embest versions of the SAMAD3x CPU modules include an
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Atmel AT25DF321A, 32-megabit, 2.7-volt SPI serial flash. The SPI
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connection is as follows:
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AT25DF321A SAMA5
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--------------- -----------------------------------------------
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SI PD11 SPI0_MOSI
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SO PD10 SPI0_MIS0
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SCK PD12 SPI0_SPCK
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/CS PD13 via NL17SZ126 if JP1 is closed (See below)
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JP1 and JP2 seem to related to /CS on the Ronetix board, but the usage is
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less clear. For the Embest module, JP1 must be closed to connect /CS to
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PD13; on the Ronetix schematic, JP11 seems only to bypass a resistor (may
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not be populated?). I think closing JP1 is correct in either case.
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SAMA5D3x-EK Configuration Options
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=================================
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@ -915,6 +929,24 @@ Configurations
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If the CPU speed changes, then so must the NOR and SDRAM
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initialization!
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7. The Embest or Ronetix CPU module includes an Atmel AT25DF321A,
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32-megabit, 2.7-volt SPI serial flash. Support for that serial
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FLASH can be enabled by modifying the NuttX configuration as
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follows:
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System Type -> SAMA5 Peripheral Support
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CONFIG_SAMA5_SPI0=y : Enable SPI0
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Device Drivers -> Memory Technology Device (MTD) Support
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CONFIG_SPI=y : Enable SPI support
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CONFIG_SPI_EXCHANGE=y : Support the exchange method
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Device Drivers -> SPI Driver Support
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CONFIG_MTD=y : Enable MTD support
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CONFIG_MTD_AT25=y : Enable the AT25 driver
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CONFIG_AT25_SPIMODE=0 : Use SPI mode 0
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CONFIG_AT25_SPIFREQUENCY=20000000 : Use SPI frequency 20MHz
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2013-7-31: I have been unable to execute this configuration from NOR
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FLASH by closing the BMS jumper (J9). As far as I can tell, this
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jumper does nothing on my board??? I have been using the norboot
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@ -46,6 +46,14 @@ ifeq ($(CONFIG_HAVE_CXX),y)
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CSRCS += sam_cxxinitialize.c
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endif
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ifeq ($(CONFIG_SAMA5_SPI0),y)
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CSRCS += sam_spi.c
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else
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ifeq ($(CONFIG_SAMA5_SPI1),y)
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CSRCS += sam_spi.c
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endif
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endif
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ifeq ($(CONFIG_SAMA5_DDRCS),y)
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CSRCS += sam_sdram.c
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endif
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@ -67,6 +67,17 @@
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void sam_boardinitialize(void)
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{
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/* Configure SPI chip selects if 1) SPI is enable, and 2) the weak function
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* sam_spiinitialize() has been brought into the link.
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*/
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#if defined(CONFIG_SAMA5_SPI0) || defined(CONFIG_SAMA5_SPI1)
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if (sam_spiinitialize)
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{
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sam_spiinitialize();
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}
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#endif
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#if defined(CONFIG_SAMA5_DDRCS) && !defined(CONFIG_SAMA5_BOOT_SDRAM)
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/* Configure SDRAM if (1) SDRAM has been enalbled in the NuttX configuration and
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216
configs/sama5d3x-ek/src/sam_spi.c
Normal file
216
configs/sama5d3x-ek/src/sam_spi.c
Normal file
@ -0,0 +1,216 @@
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/************************************************************************************
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* configs/sama5d3x-ek/src/up_spi.c
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*
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* Copyright (C) 2013 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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************************************************************************************/
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/************************************************************************************
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* Included Files
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************************************************************************************/
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#include <nuttx/config.h>
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#include <stdint.h>
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#include <stdbool.h>
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#include <debug.h>
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#include <errno.h>
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#include <nuttx/spi/spi.h>
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#include <arch/board/board.h>
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#include "up_arch.h"
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#include "chip.h"
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#include "sam_gpio.h"
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#include "sam_spi.h"
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#include "sama5d3x-ek.h"
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#if defined(CONFIG_SAMA5_SPI0) || defined(CONFIG_SAMA5_SPI1)
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/************************************************************************************
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* Definitions
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************************************************************************************/
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/* Enables debug output from this file (needs CONFIG_DEBUG too) */
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#undef SPI_DEBUG /* Define to enable debug */
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#undef SPI_VERBOSE /* Define to enable verbose debug */
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#ifdef SPI_DEBUG
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# define spidbg lldbg
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# ifdef SPI_VERBOSE
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# define spivdbg lldbg
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# else
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# define spivdbg(x...)
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# endif
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#else
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# undef SPI_VERBOSE
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# define spidbg(x...)
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# define spivdbg(x...)
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#endif
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/************************************************************************************
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* Private Functions
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************************************************************************************/
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/************************************************************************************
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* Public Functions
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************************************************************************************/
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/************************************************************************************
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* Name: sam_spiinitialize
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*
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* Description:
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* Called to configure SPI chip select GPIO pins for the SAMA5D3x-EK board.
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*
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************************************************************************************/
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void weak_function sam_spiinitialize(void)
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{
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#ifdef CONFIG_SAMA5_SPI0
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#ifdef CONFIG_MTD_AT25
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/* The AT25 serial FLASH connects using NPCS0 */
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sam_configgpio(GPIO_AT25_NPCS0);
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#endif
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#endif
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#ifdef CONFIG_SAMA5_SPI1
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#endif
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}
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/****************************************************************************
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* Name: sam_spi[0|1]select, sam_spi[0|1]status, and sam_spi[0|1]cmddata
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*
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* Description:
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* These external functions must be provided by board-specific logic. They
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* include:
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*
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* o sam_spi[0|1]select is a functions tomanage the board-specific chip selects
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* o sam_spi[0|1]status and sam_spi[0|1]cmddata: Implementations of the status
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* and cmddata methods of the SPI interface defined by struct spi_ops_
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* (see include/nuttx/spi/spi.h). All other methods including
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* up_spiinitialize()) are provided by common SAM3/4 logic.
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*
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* To use this common SPI logic on your board:
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*
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* 1. Provide logic in sam_boardinitialize() to configure SPI chip select
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* pins.
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* 2. Provide sam_spi[0|1]select() and sam_spi[0|1]status() functions in your board-
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* specific logic. These functions will perform chip selection and
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* status operations using GPIOs in the way your board is configured.
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* 2. If CONFIG_SPI_CMDDATA is defined in the NuttX configuration, provide
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* sam_spi[0|1]cmddata() functions in your board-specific logic. This
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* function will perform cmd/data selection operations using GPIOs in
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* the way your board is configured.
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* 3. Add a call to up_spiinitialize() in your low level application
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* initialization logic
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* 4. The handle returned by up_spiinitialize() may then be used to bind the
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* SPI driver to higher level logic (e.g., calling
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* mmcsd_spislotinitialize(), for example, will bind the SPI driver to
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* the SPI MMC/SD driver).
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*
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****************************************************************************/
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/****************************************************************************
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* Name: sam_spi[0|1]select
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*
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* Description:
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* PIO chip select pins may be programmed by the board specific logic in
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* one of two different ways. First, the pins may be programmed as SPI
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* peripherals. In that case, the pins are completely controlled by the
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* SPI driver. This method still needs to be provided, but it may be only
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* a stub.
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*
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* An alternative way to program the PIO chip select pins is as a normal
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* GPIO output. In that case, the automatic control of the CS pins is
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* bypassed and this function must provide control of the chip select.
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* NOTE: In this case, the GPIO output pin does *not* have to be the
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* same as the NPCS pin normal associated with the chip select number.
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*
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* Input Parameters:
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* devid - Identifies the (logical) device
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* selected - TRUE:Select the device, FALSE:De-select the device
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*
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* Returned Values:
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* None
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*
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****************************************************************************/
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#ifdef CONFIG_SAMA5_SPI0
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void sam_spi0select(enum spi_dev_e devid, bool selected)
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{
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#ifdef CONFIG_MTD_AT25
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/* The AT25 serial FLASH connects using NPCS0 */
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if (devid == SPIDEV_FLASH)
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{
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sam_gpiowrite(GPIO_AT25_NPCS0, !selected);
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}
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#endif
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}
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#endif
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#ifdef CONFIG_SAMA5_SPI1
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void sam_spi1select(enum spi_dev_e devid, bool selected)
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{
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}
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#endif
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/****************************************************************************
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* Name: sam_spi[0|1]status
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*
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* Description:
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* Return status information associated with the SPI device.
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*
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* Input Parameters:
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* devid - Identifies the (logical) device
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*
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* Returned Values:
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* Bit-encoded SPI status (see include/nuttx/spi/spi.h.
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*
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****************************************************************************/
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#ifdef CONFIG_SAMA5_SPI0
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uint8_t sam_spi0status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
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{
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return 0;
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}
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#endif
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#ifdef CONFIG_SAMA5_SPI0
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uint8_t sam_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
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{
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return 0;
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}
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#endif
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#endif /* CONFIG_SAMA5_SPI0 || CONFIG_SAMA5_SPI1 */
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@ -94,6 +94,28 @@
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GPIO_INT_BOTHEDGES | GPIO_PORT_PIOE | GPIO_PIN27)
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#define IRQ_USER1 SAM_IRQ_PE27
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/* SPI Chip Selects *****************************************************************/
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/* Both the Ronetix and Embest versions of the SAMAD3x CPU modules include an
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* Atmel AT25DF321A, 32-megabit, 2.7-volt SPI serial flash. The SPI
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* connection is as follows:
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*
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* AT25DF321A SAMA5
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* --------------- -----------------------------------------------
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* SI PD11 SPI0_MOSI
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* SO PD10 SPI0_MIS0
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* SCK PD12 SPI0_SPCK
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* /CS PD13 via NL17SZ126 if JP1 is closed (See below)
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*
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* JP1 and JP2 seem to related to /CS on the Ronetix board, but the usage is
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* less clear. For the Embest module, JP1 must be closed to connect /CS to
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* PD13; on the Ronetix schematic, JP11 seems only to bypass a resistor (may
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* not be populated?). I think closing JP1 is correct in either case.
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*/
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#define GPIO_AT25_NPCS0 (GPIO_OUTPUT | GPIO_CFG_PULLUP | GPIO_OUTPUT_SET | \
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GPIO_PORT_PIOD | GPIO_PIN13)
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#define AT25_CSNUM 0
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/************************************************************************************
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* Public Types
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************************************************************************************/
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@ -108,6 +130,18 @@
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* Public Functions
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************************************************************************************/
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/************************************************************************************
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* Name: sam_spiinitialize
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*
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* Description:
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* Called to configure SPI chip select PIO pins for the SAMA4D3x-EK board.
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*
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************************************************************************************/
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#if defined(CONFIG_SAMA5_SPI0) || defined(CONFIG_SAMA5_SPI1)
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void weak_function sam_spiinitialize(void);
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#endif
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/************************************************************************************
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* Name: board_sdram_config
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*
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