ARMv7-A GIC: Move debug logic to a separate file; fix some errors in debug logic.
This commit is contained in:
Gregory Nutt
parent
37cacc6178
commit
855c9a5225
@ -41,11 +41,8 @@
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#include <sys/types.h>
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#include <stdint.h>
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#include <stdint.h>
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#include <syslog.h>
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#include <assert.h>
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#include <errno.h>
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#include <debug.h>
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#include <nuttx/arch.h>
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#include <arch/irq.h>
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@ -56,306 +53,6 @@
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#ifdef CONFIG_ARMV7A_HAVE_GICv2
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/****************************************************************************
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* Private Functions
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****************************************************************************/
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/****************************************************************************
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* Name: arm_gic_nlines
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*
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* Description:
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* Return the number of interrupt lines supported by this GIC
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* implementation (include both PPIs (32) and SPIs).
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*
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* Input Parameters:
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* None
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*
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* Returned Value:
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* The number of interrupt lines.
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*
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****************************************************************************/
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static inline unsigned int arm_gic_nlines(void)
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{
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uint32_t regval;
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uint32_t field;
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/* Get the number of interrupt lines. */
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regval = getreg32(GIC_ICDICTR);
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field = (regval & GIC_ICDICTR_ITLINES_MASK) >> GIC_ICDICTR_ITLINES_SHIFT;
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return (field + 1) << 5;
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}
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/****************************************************************************
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* Name: arm_gic_dump_cpu
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*
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* Description:
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* Dump CPU interface registers.
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*
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* Input Parameters:
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* all - True: Dump all IRQs; False: Dump only registers for this IRQ
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* irq - if all == false, then dump only this IRQ.
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* nlines - Number of interrupts to dump if all == true;
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*
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* Returned Value:
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* None.
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*
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****************************************************************************/
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#ifdef CONFIG_DEBUG_IRQ
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static inline void arm_gic_dump_cpu(bool all, int irq, int nlines)
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{
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lowsyslog(LOG_INFO, " CPU Interface Registers:\n");
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lowsyslog(LOG_INFO, " ICR: %08x PMR: %08x BPR: %08x IAR: %08x\n",
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getreg32(GIC_ICCICR), getreg32(GIC_ICCPMR),
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getreg32(GIC_ICCBPR), getreg32(GIC_ICCIAR));
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lowsyslog(LOG_INFO, " RPR: %08x HPIR: %08x ABPR: %08x\n",
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getreg32(GIC_ICCRPR), getreg32(GIC_ICCHPIR),
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getreg32(GIC_ICCABPR));
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lowsyslog(LOG_INFO, " AIAR: %08x AHPIR: %08x IDR: %08x\n",
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getreg32(GIC_ICCAIAR), getreg32(GIC_ICCAHPIR),
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getreg32(GIC_ICCIDR));
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lowsyslog(LOG_INFO, " APR1: %08x APR2: %08x APR3: %08x APR4: %08x\n",
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getreg32(GIC_ICCAPR1), getreg32(GIC_ICCAPR2),
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getreg32(GIC_ICCAPR3), getreg32(GIC_ICCAPR4));
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lowsyslog(LOG_INFO, " NSAPR1: %08x NSAPR2: %08x NSAPR3: %08x NSAPR4: %08x\n",
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getreg32(GIC_ICCNSAPR1), getreg32(GIC_ICCNSAPR2),
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getreg32(GIC_ICCNSAPR3), getreg32(GIC_ICCNSAPR4));
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}
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#endif
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/****************************************************************************
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* Name: arm_gic_dumpregs
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*
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* Description:
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* Dump registers with 4x8-bit per interrupt
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*
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* Input Parameters:
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* regaddr - First register address
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* nlines - Number of interrupt lines
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* incr - IRQs per 32-bit word
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*
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* Returned Value:
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* None.
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*
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****************************************************************************/
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#ifdef CONFIG_DEBUG_IRQ
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static void arm_gic_dumpregs(uintptr_t regaddr, int nlines, int incr)
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{
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unsigned int i;
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incr <<= 2;
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for (i = 0; i < nlines; i += incr)
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{
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lowsyslog(LOG_INFO, " %08x %08x %08x %08x\n",
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getreg32(regaddr), getreg32(regaddr + 4),
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getreg32(regaddr + 8), getreg32(regaddr + 12));
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}
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}
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#endif
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/****************************************************************************
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* Name: arm_gic_dump4
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*
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* Description:
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* Dump registers with 4x8-bit per interrupt
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*
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* Input Parameters:
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* name - Register name
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* regaddr - First register address
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* nlines - Number of interrupt lines
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*
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* Returned Value:
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* None.
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*
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****************************************************************************/
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#ifdef CONFIG_DEBUG_IRQ
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static inline void arm_gic_dump4(const char *name, uintptr_t regaddr,
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int nlines)
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{
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lowsyslog(LOG_INFO, " %s\n", name);
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arm_gic_dumpregs(regaddr, nlines, 4);
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}
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#endif
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/****************************************************************************
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* Name: arm_gic_dump8
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*
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* Description:
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* Dump registers with 8x4-bit per interrupt
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*
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* Input Parameters:
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* name - Register name
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* regaddr - First register address
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* nlines - Number of interrupt lines
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*
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* Returned Value:
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* None.
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*
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****************************************************************************/
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#ifdef CONFIG_DEBUG_IRQ
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static inline void arm_gic_dump8(const char *name, uintptr_t regaddr,
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int nlines)
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{
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lowsyslog(LOG_INFO, " %s\n", name);
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arm_gic_dumpregs(regaddr, nlines, 8);
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}
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#endif
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/****************************************************************************
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* Name: arm_gic_dump16
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*
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* Description:
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* Dump registers with 16 x 2-bit per interrupt
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*
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* Input Parameters:
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* name - Register name
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* regaddr - First register address
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* nlines - Number of interrupt lines
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*
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* Returned Value:
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* None.
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*
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****************************************************************************/
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#ifdef CONFIG_DEBUG_IRQ
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static inline void arm_gic_dump16(const char *name, uintptr_t regaddr,
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int nlines)
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{
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lowsyslog(LOG_INFO, " %s\n", name);
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arm_gic_dumpregs(regaddr, nlines, 16);
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}
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#endif
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/****************************************************************************
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* Name: arm_gic_dump32
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*
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* Description:
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* Dump registers with 32 x 1-bit per interrupt
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*
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* Input Parameters:
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* name - Register name
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* regaddr - First register address
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* nlines - Number of interrupt lines
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*
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* Returned Value:
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* None.
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*
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****************************************************************************/
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#ifdef CONFIG_DEBUG_IRQ
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static inline void arm_gic_dump32(const char *name, uintptr_t regaddr,
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int nlines)
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{
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lowsyslog(LOG_INFO, " %s\n", name);
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arm_gic_dumpregs(regaddr, nlines, 32);
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}
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#endif
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/****************************************************************************
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* Name: arm_gic_dump_distributor
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*
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* Description:
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* Dump distributor interface registers.
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*
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* Input Parameters:
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* all - True: Dump all IRQs; False: Dump only registers for this IRQ
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* irq - if all == false, then dump only this IRQ.
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* nlines - Number of interrupts to dump if all == true;
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*
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* Returned Value:
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* None.
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*
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****************************************************************************/
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#ifdef CONFIG_DEBUG_IRQ
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static inline void arm_gic_dump_distributor(bool all, int irq, int nlines)
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{
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lowsyslog(LOG_INFO, " Distributor Registers:\n");
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lowsyslog(LOG_INFO, " DCR: %08x ICTR: %08x IIDR: %08x PPISR: %08x\n",
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getreg32(GIC_ICDDCR), getreg32(GIC_ICDICTR),
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getreg32(GIC_ICDIIDR), getreg32(GIC_ICDPPISR));
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if (all)
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{
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arm_gic_dump32("ISR:", GIC_ICDISR(0), nlines);
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arm_gic_dump32("ISER/ICER:", GIC_ICDISER(0), nlines);
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arm_gic_dump32("ISPR/ICPR:", GIC_ICDISPR(0), nlines);
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arm_gic_dump32("SAR/CAR:", GIC_ICDSAR(0), nlines);
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arm_gic_dump4("IPR:", GIC_ICDIPR(0), nlines);
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arm_gic_dump4("IPTR:", GIC_ICDIPTR(0), nlines);
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arm_gic_dump16("ICFR:", GIC_ICDICFR(0), nlines);
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arm_gic_dump32("SPISR:", GIC_ICDSPISR(0), nlines);
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arm_gic_dump32("NSACR:", GIC_ICDNSACR(0), nlines);
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arm_gic_dump8("SCPR/SSPR:", GIC_ICDSCPR(0), nlines);
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}
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else
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{
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lowsyslog(LOG_INFO, " ISR: %08x ISER: %08x ISPR: %08x SAR: %08x\n",
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getreg32(GIC_ICDISR(irq)), getreg32(GIC_ICDISER(irq)),
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getreg32(GIC_ICDISPR(irq)), getreg32(GIC_ICDSAR(irq)));
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lowsyslog(LOG_INFO, " IPR: %08x IPTR: %08x ICFR: %08x SPISR: %08x\n",
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getreg32(GIC_ICDIPR(irq)), getreg32(GIC_ICDIPTR(irq)),
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getreg32(GIC_ICDICFR(irq)), getreg32(GIC_ICDSPISR(irq)));
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lowsyslog(LOG_INFO, " NSACR: %08x SCPR: %08x\n",
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getreg32(GIC_ICDNSACR(irq)), getreg32(GIC_ICDSCPR(irq)));
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}
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lowsyslog(LOG_INFO, " PIDR:\n");
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lowsyslog(LOG_INFO, " %08x %08x %08x %08x\n",
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getreg32(GIC_ICDPIDR(0)), getreg32(GIC_ICDPIDR(1)),
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getreg32(GIC_ICDPIDR(2)), getreg32(GIC_ICDPIDR(3)));
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lowsyslog(LOG_INFO, " %08x %08x %08x %08x\n",
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getreg32(GIC_ICDPIDR(4)), getreg32(GIC_ICDPIDR(5)),
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getreg32(GIC_ICDPIDR(6)));
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lowsyslog(LOG_INFO, " CIDR:\n");
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lowsyslog(LOG_INFO, " %08x %08x %08x %08x\n",
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getreg32(GIC_ICDCIDR(0)), getreg32(GIC_ICDCIDR(1)),
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getreg32(GIC_ICDCIDR(2)), getreg32(GIC_ICDCIDR(3)));
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}
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#endif
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/****************************************************************************
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* Name: arm_gic_dump
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*
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* Description:
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* Return the number of interrupt lines supported by this GIC
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* implementation (include both PPIs (32) and SPIs).
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*
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* Input Parameters:
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* all - True: Dump all IRQs; False: Dump only registers for this IRQ
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* irq - if all == false, then dump only this IRQ.
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*
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* Returned Value:
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* The number of interrupt lines.
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*
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****************************************************************************/
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#ifdef CONFIG_DEBUG_IRQ
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static void arm_gic_dump(const char *msg, bool all, int irq)
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{
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unsigned int nlines = arm_gic_nlines();
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if (all)
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{
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lowsyslog(LOG_INFO, "GIC: %s NLINES=%u\n", msg, nlines);
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}
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else
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{
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lowsyslog(LOG_INFO, "GIC: %s IRQ=%d\n", msg, irq);
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}
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arm_gic_dump_cpu(all, irq, nlines);
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arm_gic_dump_distributor(all, irq, nlines);
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}
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#else
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# define arm_gic_dump(m,a,i)
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#endif
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/****************************************************************************
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* Public Functions
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****************************************************************************/
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@ -658,6 +355,8 @@ uint32_t *arm_decodeirq(uint32_t *regs)
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regval = getreg32(GIC_ICCIAR);
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irq = (regval & GIC_ICCIAR_INTID_MASK) >> GIC_ICCIAR_INTID_SHIFT;
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gicllvdbg("irq=%d\n", irq);
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/* Ignore spurions IRQs. ICCIAR will report 1023 if there is no pending
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* interrupt.
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*/
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@ -792,40 +491,4 @@ int up_prioritize_irq(int irq, int priority)
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return -EINVAL;
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}
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/****************************************************************************
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* Name: arm_cpu_sgi
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*
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* Description:
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* Perform a Software Generated Interrupt (SGI). If CONFIG_SMP is
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* selected, then the SGI is sent to all CPUs specified in the CPU set.
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* That set may include the current CPU.
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*
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* If CONFIG_SMP is not selected, the cpuset is ignored and SGI is sent
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* only to the current CPU.
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*
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* Input Paramters
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* sgi - The SGI interrupt ID (0-15)
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* cpuset - The set of CPUs to receive the SGI
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*
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* Returned Value:
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* OK is always returned at present.
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*
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****************************************************************************/
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int arm_cpu_sgi(int sgi, unsigned int cpuset)
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{
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uint32_t regval;
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#ifdef CONFIG_SMP
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regval = GIC_ICDSGIR_INTID(sgi) | GIC_ICDSGIR_CPUTARGET(cpuset) |
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GIC_ICDSGIR_TGTFILTER_LIST;
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#else
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regval = GIC_ICDSGIR_INTID(sgi) | GIC_ICDSGIR_CPUTARGET(0) |
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GIC_ICDSGIR_TGTFILTER_THIS;
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#endif
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putreg32(regval, GIC_ICDSGIR);
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return OK;
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}
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#endif /* CONFIG_ARMV7A_HAVE_GICv2 */
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309
arch/arm/src/armv7-a/arm_gicv2_dump.c
Normal file
309
arch/arm/src/armv7-a/arm_gicv2_dump.c
Normal file
@ -0,0 +1,309 @@
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/****************************************************************************
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* arch/arm/src/armv7-a/arm_gicv2_dump.c
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*
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* Copyright (C) 2016 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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****************************************************************************/
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <stdint.h>
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#include <syslog.h>
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#include "up_arch.h"
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#include "gic.h"
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#if defined(CONFIG_ARMV7A_HAVE_GICv2) && defined(CONFIG_DEBUG_IRQ)
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/****************************************************************************
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* Private Functions
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****************************************************************************/
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/****************************************************************************
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* Name: arm_gic_dump_cpu
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*
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* Description:
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* Dump CPU interface registers.
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*
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* Input Parameters:
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* all - True: Dump all IRQs; False: Dump only registers for this IRQ
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* irq - if all == false, then dump only this IRQ.
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* nlines - Number of interrupts to dump if all == true;
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*
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* Returned Value:
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* None.
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*
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****************************************************************************/
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static inline void arm_gic_dump_cpu(bool all, int irq, int nlines)
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{
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lowsyslog(LOG_INFO, " CPU Interface Registers:\n");
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lowsyslog(LOG_INFO, " ICR: %08x PMR: %08x BPR: %08x IAR: %08x\n",
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getreg32(GIC_ICCICR), getreg32(GIC_ICCPMR),
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getreg32(GIC_ICCBPR), getreg32(GIC_ICCIAR));
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lowsyslog(LOG_INFO, " RPR: %08x HPIR: %08x ABPR: %08x\n",
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getreg32(GIC_ICCRPR), getreg32(GIC_ICCHPIR),
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getreg32(GIC_ICCABPR));
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lowsyslog(LOG_INFO, " AIAR: %08x AHPIR: %08x IDR: %08x\n",
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getreg32(GIC_ICCAIAR), getreg32(GIC_ICCAHPIR),
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getreg32(GIC_ICCIDR));
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lowsyslog(LOG_INFO, " APR1: %08x APR2: %08x APR3: %08x APR4: %08x\n",
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||||
getreg32(GIC_ICCAPR1), getreg32(GIC_ICCAPR2),
|
||||
getreg32(GIC_ICCAPR3), getreg32(GIC_ICCAPR4));
|
||||
lowsyslog(LOG_INFO, " NSAPR1: %08x NSAPR2: %08x NSAPR3: %08x NSAPR4: %08x\n",
|
||||
getreg32(GIC_ICCNSAPR1), getreg32(GIC_ICCNSAPR2),
|
||||
getreg32(GIC_ICCNSAPR3), getreg32(GIC_ICCNSAPR4));
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: arm_gic_dumpregs
|
||||
*
|
||||
* Description:
|
||||
* Dump registers with 4x8-bit per interrupt
|
||||
*
|
||||
* Input Parameters:
|
||||
* regaddr - First register address
|
||||
* nlines - Number of interrupt lines
|
||||
* incr - IRQs per 32-bit word
|
||||
*
|
||||
* Returned Value:
|
||||
* None.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
static void arm_gic_dumpregs(uintptr_t regaddr, int nlines, int incr)
|
||||
{
|
||||
unsigned int i;
|
||||
|
||||
incr <<= 2;
|
||||
for (i = 0; i < nlines; i += incr, regaddr += 16)
|
||||
{
|
||||
lowsyslog(LOG_INFO, " %08x %08x %08x %08x\n",
|
||||
getreg32(regaddr), getreg32(regaddr + 4),
|
||||
getreg32(regaddr + 8), getreg32(regaddr + 12));
|
||||
}
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: arm_gic_dump4
|
||||
*
|
||||
* Description:
|
||||
* Dump registers with 4x8-bit per interrupt
|
||||
*
|
||||
* Input Parameters:
|
||||
* name - Register name
|
||||
* regaddr - First register address
|
||||
* nlines - Number of interrupt lines
|
||||
*
|
||||
* Returned Value:
|
||||
* None.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
static inline void arm_gic_dump4(const char *name, uintptr_t regaddr,
|
||||
int nlines)
|
||||
{
|
||||
lowsyslog(LOG_INFO, " %s[%08lx]\n", name, (unsigned long)regaddr);
|
||||
arm_gic_dumpregs(regaddr, nlines, 4);
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: arm_gic_dump8
|
||||
*
|
||||
* Description:
|
||||
* Dump registers with 8x4-bit per interrupt
|
||||
*
|
||||
* Input Parameters:
|
||||
* name - Register name
|
||||
* regaddr - First register address
|
||||
* nlines - Number of interrupt lines
|
||||
*
|
||||
* Returned Value:
|
||||
* None.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
static inline void arm_gic_dump8(const char *name, uintptr_t regaddr,
|
||||
int nlines)
|
||||
{
|
||||
lowsyslog(LOG_INFO, " %s[%08lx]\n", name, (unsigned long)regaddr);
|
||||
arm_gic_dumpregs(regaddr, nlines, 8);
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: arm_gic_dump16
|
||||
*
|
||||
* Description:
|
||||
* Dump registers with 16 x 2-bit per interrupt
|
||||
*
|
||||
* Input Parameters:
|
||||
* name - Register name
|
||||
* regaddr - First register address
|
||||
* nlines - Number of interrupt lines
|
||||
*
|
||||
* Returned Value:
|
||||
* None.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
static inline void arm_gic_dump16(const char *name, uintptr_t regaddr,
|
||||
int nlines)
|
||||
{
|
||||
lowsyslog(LOG_INFO, " %s[%08lx]\n", name, (unsigned long)regaddr);
|
||||
arm_gic_dumpregs(regaddr, nlines, 16);
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: arm_gic_dump32
|
||||
*
|
||||
* Description:
|
||||
* Dump registers with 32 x 1-bit per interrupt
|
||||
*
|
||||
* Input Parameters:
|
||||
* name - Register name
|
||||
* regaddr - First register address
|
||||
* nlines - Number of interrupt lines
|
||||
*
|
||||
* Returned Value:
|
||||
* None.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
static inline void arm_gic_dump32(const char *name, uintptr_t regaddr,
|
||||
int nlines)
|
||||
{
|
||||
lowsyslog(LOG_INFO, " %s[%08lx]\n", name, (unsigned long)regaddr);
|
||||
arm_gic_dumpregs(regaddr, nlines, 32);
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: arm_gic_dump_distributor
|
||||
*
|
||||
* Description:
|
||||
* Dump distributor interface registers.
|
||||
*
|
||||
* Input Parameters:
|
||||
* all - True: Dump all IRQs; False: Dump only registers for this IRQ
|
||||
* irq - if all == false, then dump only this IRQ.
|
||||
* nlines - Number of interrupts to dump if all == true;
|
||||
*
|
||||
* Returned Value:
|
||||
* None.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
static inline void arm_gic_dump_distributor(bool all, int irq, int nlines)
|
||||
{
|
||||
lowsyslog(LOG_INFO, " Distributor Registers:\n");
|
||||
lowsyslog(LOG_INFO, " DCR: %08x ICTR: %08x IIDR: %08x PPISR: %08x\n",
|
||||
getreg32(GIC_ICDDCR), getreg32(GIC_ICDICTR),
|
||||
getreg32(GIC_ICDIIDR), getreg32(GIC_ICDPPISR));
|
||||
|
||||
if (all)
|
||||
{
|
||||
arm_gic_dump32("ISR", GIC_ICDISR(0), nlines);
|
||||
arm_gic_dump32("ISER/ICER", GIC_ICDISER(0), nlines);
|
||||
arm_gic_dump32("ISPR/ICPR", GIC_ICDISPR(0), nlines);
|
||||
arm_gic_dump32("SAR/CAR", GIC_ICDSAR(0), nlines);
|
||||
arm_gic_dump4("IPR", GIC_ICDIPR(0), nlines);
|
||||
arm_gic_dump4("IPTR", GIC_ICDIPTR(0), nlines);
|
||||
arm_gic_dump16("ICFR", GIC_ICDICFR(0), nlines);
|
||||
arm_gic_dump32("SPISR", GIC_ICDSPISR(0), nlines);
|
||||
arm_gic_dump32("NSACR", GIC_ICDNSACR(0), nlines);
|
||||
arm_gic_dump8("SCPR/SSPR", GIC_ICDSCPR(0), nlines);
|
||||
}
|
||||
else
|
||||
{
|
||||
lowsyslog(LOG_INFO, " ISR: %08x ISER: %08x ISPR: %08x SAR: %08x\n",
|
||||
getreg32(GIC_ICDISR(irq)), getreg32(GIC_ICDISER(irq)),
|
||||
getreg32(GIC_ICDISPR(irq)), getreg32(GIC_ICDSAR(irq)));
|
||||
lowsyslog(LOG_INFO, " IPR: %08x IPTR: %08x ICFR: %08x SPISR: %08x\n",
|
||||
getreg32(GIC_ICDIPR(irq)), getreg32(GIC_ICDIPTR(irq)),
|
||||
getreg32(GIC_ICDICFR(irq)), getreg32(GIC_ICDSPISR(irq)));
|
||||
lowsyslog(LOG_INFO, " NSACR: %08x SCPR: %08x\n",
|
||||
getreg32(GIC_ICDNSACR(irq)), getreg32(GIC_ICDSCPR(irq)));
|
||||
}
|
||||
|
||||
lowsyslog(LOG_INFO, " PIDR[%08lx]:\n", (unsigned long)GIC_ICDPIDR(0));
|
||||
lowsyslog(LOG_INFO, " %08x %08x %08x %08x\n",
|
||||
getreg32(GIC_ICDPIDR(0)), getreg32(GIC_ICDPIDR(1)),
|
||||
getreg32(GIC_ICDPIDR(2)), getreg32(GIC_ICDPIDR(3)));
|
||||
lowsyslog(LOG_INFO, " %08x %08x %08x %08x\n",
|
||||
getreg32(GIC_ICDPIDR(4)), getreg32(GIC_ICDPIDR(5)),
|
||||
getreg32(GIC_ICDPIDR(6)));
|
||||
lowsyslog(LOG_INFO, " CIDR[%08lx]:\n", (unsigned long)GIC_ICDCIDR(0));
|
||||
lowsyslog(LOG_INFO, " %08x %08x %08x %08x\n",
|
||||
getreg32(GIC_ICDCIDR(0)), getreg32(GIC_ICDCIDR(1)),
|
||||
getreg32(GIC_ICDCIDR(2)), getreg32(GIC_ICDCIDR(3)));
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Public Functions
|
||||
****************************************************************************/
|
||||
|
||||
/****************************************************************************
|
||||
* Name: arm_gic_dump
|
||||
*
|
||||
* Description:
|
||||
* Dump GIC registers to the SYSLOG device
|
||||
*
|
||||
* Input Parameters:
|
||||
* msg - Message to print with the register data
|
||||
* all - True: Dump all IRQs; False: Dump only registers for this IRQ
|
||||
* irq - if all == false, then dump only this IRQ.
|
||||
*
|
||||
* Returned Value:
|
||||
* None.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
void arm_gic_dump(const char *msg, bool all, int irq)
|
||||
{
|
||||
unsigned int nlines = arm_gic_nlines();
|
||||
|
||||
if (all)
|
||||
{
|
||||
lowsyslog(LOG_INFO, "GIC: %s NLINES=%u\n", msg, nlines);
|
||||
}
|
||||
else
|
||||
{
|
||||
lowsyslog(LOG_INFO, "GIC: %s IRQ=%d\n", msg, irq);
|
||||
}
|
||||
|
||||
arm_gic_dump_cpu(all, irq, nlines);
|
||||
arm_gic_dump_distributor(all, irq, nlines);
|
||||
}
|
||||
|
||||
#endif /* CONFIG_ARMV7A_HAVE_GICv2 && CONFIG_DEBUG_IRQ */
|
||||
@ -49,8 +49,12 @@
|
||||
****************************************************************************/
|
||||
|
||||
#include "nuttx/config.h"
|
||||
|
||||
#include <sys/types.h>
|
||||
#include <stdint.h>
|
||||
|
||||
#include "mpcore.h"
|
||||
#include "up_arch.h"
|
||||
|
||||
#ifdef CONFIG_ARMV7A_HAVE_GICv2
|
||||
|
||||
@ -588,17 +592,100 @@
|
||||
|
||||
#define GIC_IRQ_SPI 32 /* First SPI interrupt ID */
|
||||
|
||||
/* General Macro Definitions ************************************************/
|
||||
/* Debug */
|
||||
|
||||
#ifdef CONFIG_DEBUG_IRQ
|
||||
# define gicdbg(format, ...) dbg(format, ##__VA_ARGS__)
|
||||
# define giclldbg(format, ...) lldbg(format, ##__VA_ARGS__)
|
||||
# define gicvdbg(format, ...) vdbg(format, ##__VA_ARGS__)
|
||||
# define gicllvdbg(format, ...) llvdbg(format, ##__VA_ARGS__)
|
||||
#else
|
||||
# define gicdbg(x...)
|
||||
# define giclldbg(x...)
|
||||
# define gicvdbg(x...)
|
||||
# define gicllvdbg(x...)
|
||||
#endif
|
||||
|
||||
/****************************************************************************
|
||||
* Inline Functions
|
||||
****************************************************************************/
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
|
||||
/****************************************************************************
|
||||
* Name: arm_gic_nlines
|
||||
*
|
||||
* Description:
|
||||
* Return the number of interrupt lines supported by this GIC
|
||||
* implementation (include both PPIs (32) and SPIs).
|
||||
*
|
||||
* Input Parameters:
|
||||
* None
|
||||
*
|
||||
* Returned Value:
|
||||
* The number of interrupt lines.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
static inline unsigned int arm_gic_nlines(void)
|
||||
{
|
||||
uint32_t regval;
|
||||
uint32_t field;
|
||||
|
||||
/* Get the number of interrupt lines. */
|
||||
|
||||
regval = getreg32(GIC_ICDICTR);
|
||||
field = (regval & GIC_ICDICTR_ITLINES_MASK) >> GIC_ICDICTR_ITLINES_SHIFT;
|
||||
return (field + 1) << 5;
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Name: arm_cpu_sgi
|
||||
*
|
||||
* Description:
|
||||
* Perform a Software Generated Interrupt (SGI). If CONFIG_SMP is
|
||||
* selected, then the SGI is sent to all CPUs specified in the CPU set.
|
||||
* That set may include the current CPU.
|
||||
*
|
||||
* If CONFIG_SMP is not selected, the cpuset is ignored and SGI is sent
|
||||
* only to the current CPU.
|
||||
*
|
||||
* Input Paramters
|
||||
* sgi - The SGI interrupt ID (0-15)
|
||||
* cpuset - The set of CPUs to receive the SGI
|
||||
*
|
||||
* Returned Value:
|
||||
* OK is always returned at present.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
static inline int arm_cpu_sgi(int sgi, unsigned int cpuset)
|
||||
{
|
||||
uint32_t regval;
|
||||
|
||||
#ifdef CONFIG_SMP
|
||||
regval = GIC_ICDSGIR_INTID(sgi) | GIC_ICDSGIR_CPUTARGET(cpuset) |
|
||||
GIC_ICDSGIR_TGTFILTER_LIST;
|
||||
#else
|
||||
regval = GIC_ICDSGIR_INTID(sgi) | GIC_ICDSGIR_CPUTARGET(0) |
|
||||
GIC_ICDSGIR_TGTFILTER_THIS;
|
||||
#endif
|
||||
|
||||
putreg32(regval, GIC_ICDSGIR);
|
||||
return OK;
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* Public Function Prototypes
|
||||
****************************************************************************/
|
||||
|
||||
#ifndef __ASSEMBLY__
|
||||
#ifdef __cplusplus
|
||||
#define EXTERN extern "C"
|
||||
# define EXTERN extern "C"
|
||||
extern "C"
|
||||
{
|
||||
#else
|
||||
#define EXTERN extern
|
||||
# define EXTERN extern
|
||||
#endif
|
||||
|
||||
/****************************************************************************
|
||||
@ -652,28 +739,6 @@ void arm_gic_initialize(void);
|
||||
|
||||
uint32_t *arm_decodeirq(uint32_t *regs);
|
||||
|
||||
/****************************************************************************
|
||||
* Name: arm_cpu_sgi
|
||||
*
|
||||
* Description:
|
||||
* Perform a Software Generated Interrupt (SGI). If CONFIG_SMP is
|
||||
* selected, then the SGI is sent to all CPUs specified in the CPU set.
|
||||
* That set may include the current CPU.
|
||||
*
|
||||
* If CONFIG_SMP is not selected, the cpuset is ignored and SGI is sent
|
||||
* only to the current CPU.
|
||||
*
|
||||
* Input Paramters
|
||||
* sgi - The SGI interrupt ID (0-15)
|
||||
* cpuset - The set of CPUs to receive the SGI
|
||||
*
|
||||
* Returned Value:
|
||||
* OK is always retured at present.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
int arm_cpu_sgi(int sgi, unsigned int cpuset);
|
||||
|
||||
/****************************************************************************
|
||||
* Name: arm_start_handler
|
||||
*
|
||||
@ -718,6 +783,28 @@ int arm_start_handler(int irq, FAR void *context);
|
||||
int arm_pause_handler(int irq, FAR void *context);
|
||||
#endif
|
||||
|
||||
/****************************************************************************
|
||||
* Name: arm_gic_dump
|
||||
*
|
||||
* Description:
|
||||
* Dump GIC registers to the SYSLOG device
|
||||
*
|
||||
* Input Parameters:
|
||||
* msg - Message to print with the register data
|
||||
* all - True: Dump all IRQs; False: Dump only registers for this IRQ
|
||||
* irq - if all == false, then dump only this IRQ.
|
||||
*
|
||||
* Returned Value:
|
||||
* None.
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#ifdef CONFIG_DEBUG_IRQ
|
||||
void arm_gic_dump(const char *msg, bool all, int irq);
|
||||
#else
|
||||
# define arm_gic_dump(m,a,i)
|
||||
#endif
|
||||
|
||||
#undef EXTERN
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
|
||||
@ -80,6 +80,10 @@ ifeq ($(CONFIG_SMP),y)
|
||||
CMN_CSRCS += arm_cpuindex.c arm_cpustart.c arm_cpupause.c
|
||||
endif
|
||||
|
||||
ifeq ($(CONFIG_DEBUG_IRQ),y)
|
||||
CMN_CSRCS += arm_gicv2_dump.c
|
||||
endif
|
||||
|
||||
# Use common heap allocation for now (may need to be customized later)
|
||||
|
||||
CMN_CSRCS += up_allocateheap.c
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user