This commit adds support for the MAX3421E to the viewtool-stm32107 board support

Squashed commit of the following:

    configs/viewtool-stm32f107:  Clean up some compilation errors.  Now all builds correctly and is ready for test.

    arch/arm/src/stm32:  Do not condition building STM32 USB host logic on CONFIG_USBHOST.  That then precludes building STM32 platforms with external USB host chips like the MAX3421E.  Add an new, STM32-internal variable CONFIG_STM32_USBHOST that does the same job without such side-effects.

    configs/viewtool-stm32f107:  Add support for MAX3421E USB host.
This commit is contained in:
Gregory Nutt 2018-07-13 10:34:33 -06:00
parent 50347a1068
commit 859d032938
12 changed files with 558 additions and 24 deletions

View File

@ -2478,16 +2478,22 @@ config STM32_OPAMP4
default n
depends on STM32_HAVE_OPAMP4
config STM32_USBHOST
bool
default n
config STM32_OTGFS
bool "OTG FS"
default n
depends on STM32_HAVE_OTGFS
select STM32_USBHOST
select USBHOST_HAVE_ASYNCH if USBHOST
config STM32_OTGHS
bool "OTG HS"
default n
depends on STM32_STM32F205 || STM32_STM32F207 || STM32_STM32F4XXX || STM32_STM32F429
select STM32_USBHOST
select USBHOST_HAVE_ASYNCH if USBHOST
config STM32_PWR
@ -7971,46 +7977,41 @@ config STM32_ETHMAC_REGDEBUG
endmenu # Ethernet MAC configuration
menu "USB FS Host Configuration"
depends on STM32_OTGFS
config STM32_OTGFS_RXFIFO_SIZE
int "Rx Packet Size"
default 128
depends on USBHOST && STM32_OTGFS
---help---
Size of the RX FIFO in 32-bit words. Default 128 (512 bytes)
config STM32_OTGFS_NPTXFIFO_SIZE
int "Non-periodic Tx FIFO Size"
default 96
depends on USBHOST && STM32_OTGFS
---help---
Size of the non-periodic Tx FIFO in 32-bit words. Default 96 (384 bytes)
config STM32_OTGFS_PTXFIFO_SIZE
int "Periodic Tx FIFO size"
default 128
depends on USBHOST && STM32_OTGFS
---help---
Size of the periodic Tx FIFO in 32-bit words. Default 96 (384 bytes)
config STM32_OTGFS_DESCSIZE
int "Descriptor Size"
default 128
depends on USBHOST && STM32_OTGFS
---help---
Maximum size to allocate for descriptor memory descriptor. Default: 128
config STM32_OTGFS_SOFINTR
bool "Enable SOF interrupts"
default n
depends on USBHOST && STM32_OTGFS
---help---
Enable SOF interrupts. Why would you ever want to do that?
config STM32_OTGFS_VBUS_CONTROL
bool "Enable VBus Control"
default y
depends on USBHOST && STM32_OTGFS
---help---
Enable VBus control. Used when the board has VBus sensing and
a power switch for the OTG FS USB port. Disable this config
@ -8019,39 +8020,35 @@ config STM32_OTGFS_VBUS_CONTROL
endmenu
menu "USB HS Host Configuration"
depends on STM32_OTGHS
config STM32_OTGHS_RXFIFO_SIZE
int "Rx Packet Size"
default 128
depends on USBHOST && STM32_OTGHS
---help---
Size of the RX FIFO in 32-bit words. Default 128 (512 bytes)
config STM32_OTGHS_NPTXFIFO_SIZE
int "Non-periodic Tx FIFO Size"
default 96
depends on USBHOST && STM32_OTGHS
---help---
Size of the non-periodic Tx FIFO in 32-bit words. Default 96 (384 bytes)
config STM32_OTGHS_PTXFIFO_SIZE
int "Periodic Tx FIFO size"
default 128
depends on USBHOST && STM32_OTGHS
---help---
Size of the periodic Tx FIFO in 32-bit words. Default 96 (384 bytes)
config STM32_OTGHS_DESCSIZE
int "Descriptor Size"
default 128
depends on USBHOST && STM32_OTGHS
---help---
Maximum size to allocate for descriptor memory descriptor. Default: 128
config STM32_OTGHS_SOFINTR
bool "Enable SOF interrupts"
default n
depends on USBHOST && STM32_OTGHS
---help---
Enable SOF interrupts. Why would you ever want to do that?
@ -8062,14 +8059,14 @@ menu "USB Host Debug Configuration"
config STM32_USBHOST_REGDEBUG
bool "Register-Level Debug"
default n
depends on USBHOST && DEBUG_USB_INFO && (STM32_OTGFS || STM32_OTGHS)
depends on STM32_USBHOST && DEBUG_USB_INFO
---help---
Enable very low-level register access debug.
config STM32_USBHOST_PKTDUMP
bool "Packet Dump Debug"
default n
depends on USBHOST && DEBUG_USB_INFO && (STM32_OTGFS || STM32_OTGHS)
depends on STM32_USBHOST && DEBUG_USB_INFO
---help---
Dump all incoming and outgoing USB packets.

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@ -144,16 +144,13 @@ CHIP_CSRCS += stm32_otghsdev.c
endif
endif
ifeq ($(CONFIG_USBHOST),y)
ifeq ($(CONFIG_STM32_USBHOST),y)
ifeq ($(CONFIG_STM32_OTGFS),y)
CHIP_CSRCS += stm32_otgfshost.c
endif
ifeq ($(CONFIG_STM32_OTGHS),y)
CHIP_CSRCS += stm32_otghshost.c
endif
endif
ifeq ($(CONFIG_USBHOST),y)
ifeq ($(CONFIG_USBHOST_TRACE),y)
CHIP_CSRCS += stm32_usbhost.c
else

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@ -49,7 +49,7 @@ config VIEWTOOL_FT80X_SPI1
config VIEWTOOL_FT80X_SPI2
bool "FT80x on SPI2"
depends on STM32_SPI3
depends on STM32_SPI2
endchoice # FT80x SPI Selection
@ -59,9 +59,42 @@ config VIEWTOOL_FT80X_INITFREQUENCY
range 400000 11000000
config VIEWTOOL_FT80X_OPFREQUENCY
int "FT80x initialization frequency"
int "FT80x operational frequency"
default 20000000
range 400000 30000000
endif # LCD_FT80X_SPI && ((STM32_SPI1 && !STM32_SPI1_REMAP) || STM32_SPI2)
if USBHOST_MAX3421E && ((STM32_SPI1 && !STM32_SPI1_REMAP) || STM32_SPI2)
choice
prompt "MAX3421E SPI Selection"
default VIEWTOOL_MAX3421E_SPI1 if STM32_SPI1 && !STM32_SPI1_REMAP && !VIEWTOOL_FT80X_SPI1
default VIEWTOOL_MAX3421E_SPI2 if STM32_SPI2 && (!STM32_SPI1 || STM32_SPI1_REMAP) && !VIEWTOOL_FT80X_SPI2
config VIEWTOOL_MAX3421E_SPI1
bool "MAX3421E on SPI1"
depends on STM32_SPI1 && !STM32_SPI1_REMAP && !VIEWTOOL_FT80X_SPI1
config VIEWTOOL_MAX3421E_SPI2
bool "MAX3421E on SPI2"
depends on STM32_SPI2 && !VIEWTOOL_FT80X_SPI2
endchoice # MAX3421E SPI Selection
config VIEWTOOL_MAX3421E_FREQUENCY
int "MAX3421E operational frequency"
default 20000000
range 400000 26000000
config VIEWTOOL_MAX3421E_CONNMON_STACKSIZE
int "MAX3421E USB connection monitor stack size"
default 2048
config VIEWTOOL_MAX3421E_CONNMON_PRIORITY
int "MAX3421E USB connection monitor priority"
default 100
range 1 255
endif # USBHOST_MAX3421E && ((STM32_SPI1 && !STM32_SPI1_REMAP) || STM32_SPI2)
endif # ARCH_BOARD_VIEWTOOL_STM32F107

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@ -31,6 +31,7 @@ Contents
o Freescale MPL115A barometer sensor
o LCD/Touchscreen Interface
o FT80x Integration
o MAX3421E Integration
o Toolchains
- NOTE about Windows native toolchains
o Configurations
@ -697,6 +698,38 @@ FT80x Integration
CONFIG_LCD_FT80X_AUDIO_NOSHUTDOWN=y
CONFIG_EXAMPLES_FT80X_DEVPATH="/dev/ft801"
MAX3421E Integration
====================
Using SPI1on J8 pins 7-12, discretes on J18
------ ----------- -----------
NAME VIEWTOOL STM32
------ ----------- -----------
CS# J8 Pin 12 PA4/NSS1
SCK J8 Pin 11 PA5/SCK1
MISO J8 Pin 9 PA6/MISO1
MOSI J8 Pin 10 PA7/MOSI1
INT# J18 Pin 6 PC5
RST# J18 Pin 8 PA1
VBUS J18 Pin 10 PA0
3.3V J8 Pin 7
GND J8 Pin 8
Using SPI2 on J8 pins 1-6, discretes on J18
------ ----------- -----------
NAME VIEWTOOL STM32
------ ----------- -----------
CS# J8 Pin 6 PB12/NSS2
SCK J8 Pin 5 PB13/SCK2
MISO J8 Pin 3 PB14/MISO2
MOSI J8 Pin 4 PB15/MOSI2
INT# J18 Pin 6 PC5
RST# J18 Pin 8 PA1
VBUS J18 Pin 10 PA0
3.3V J8 Pin 1
GND J8 Pin 2
Toolchains
==========

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@ -88,4 +88,10 @@ else ifeq ($(CONFIG_VIEWTOOL_FT80X_SPI2),y)
CSRCS += stm32_ft80x.c
endif
ifeq ($(CONFIG_VIEWTOOL_MAX3421E_SPI1),y)
CSRCS += stm32_max3421e.c
else ifeq ($(CONFIG_VIEWTOOL_MAX3421E_SPI2),y)
CSRCS += stm32_max3421e.c
endif
include $(TOPDIR)/configs/Board.mk

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@ -201,6 +201,14 @@ int stm32_bringup(void)
}
#endif
#if defined(CONFIG_VIEWTOOL_MAX3421E_SPI1) || defined(CONFIG_VIEWTOOL_MAX3421E_SPI2)
ret = stm32_max3421e_setup();
if (ret < 0)
{
syslog(LOG_ERR, "ERROR: stm32_ft80x_setup failed: %d\n", ret);
}
#endif
UNUSED(ret);
return OK;
}

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@ -262,8 +262,7 @@ static void ft80x_destroy(FAR const struct ft80x_config_s *lower)
*
* Description:
* This function is called by board-bringup logic to configure the
* touchscreen device. This function will register the driver as
* /dev/inputN where N is the minor device number.
* FT80x GUI device.
*
* Input Parameters:
* None

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@ -0,0 +1,389 @@
/************************************************************************************
* configs/viewtools-stm32f107/src/stm32_max3421e.c
*
* Copyright (C) 2018 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
************************************************************************************/
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <sys/types.h>
#include <stdint.h>
#include <stdbool.h>
#include <stdio.h>
#include <assert.h>
#include <errno.h>
#include <debug.h>
#include <nuttx/irq.h>
#include <nuttx/board.h>
#include <nuttx/kthread.h>
#include <nuttx/spi/spi.h>
#include <nuttx/usb/usbhost.h>
#include <nuttx/usb/max3421e.h>
#ifdef CONFIG_RNDIS
# include <nuttx/usb/rndis.h>
#endif
#include "up_arch.h"
#include "stm32_gpio.h"
#include "stm32_spi.h"
#include "viewtool_stm32f107.h"
#if defined(CONFIG_VIEWTOOL_MAX3421E_SPI1) || defined(CONFIG_VIEWTOOL_MAX3421E_SPI2)
/****************************************************************************
* Private Types
****************************************************************************/
struct viewtool_max3421elower_s
{
/* Standard MAX3421E interface */
struct max3421e_lowerhalf_s config;
/* Extensions for the viewtool board */
xcpt_t handler;
FAR void *arg;
};
/****************************************************************************
* Private Function Prototypes
****************************************************************************/
/* IRQ/GPIO access callbacks. These operations all hidden behind callbacks
* to isolate the MAX3421E driver from differences in GPIO interrupt handling
* by varying boards and MCUs.
*
* Interrupts should be configured on the falling edge of nINT.
*
* attach - Attach the ADS7843E interrupt handler to the GPIO interrupt
* enable - Enable or disable the GPIO interrupt
* acknowledge - Acknowledge/clear any pending GPIO interrupt as necessary.
*/
static int max3421e_attach(FAR const struct max3421e_lowerhalf_s *lower,
xcpt_t isr, FAR void *arg);
static void max3421e_enable(FAR const struct max3421e_lowerhalf_s *lower,
bool enable);
static void max3421e_acknowledge(FAR const struct max3421e_lowerhalf_s *lower);
/****************************************************************************
* Private Data
****************************************************************************/
/* A reference to a structure of this type must be passed to the MAX3421E
* driver. This structure provides information about the configuration
* of the MAX3421E and provides some board-specific hooks.
*
* Memory for this structure is provided by the caller. It is not copied
* by the driver and is presumed to persist while the driver is active. The
* memory must be writable because, under certain circumstances, the driver
* may modify certain values.
*/
static struct viewtool_max3421elower_s g_max3421e_lower =
{
.config =
{
.spi = NULL, /* SPI device instance */
.frequency = CONFIG_VIEWTOOL_MAX3421E_FREQUENCY, /* SPI frequency < 26MHz */
.mode = SPIDEV_MODE0, /* SPI Mode 0 */
.devid = 0, /* Only one MAX3421E on SPI bus */
.intconfig = 0, /* Falling edge-sensitive. */
.attach = max3421e_attach, /* Attach interrupt handler */
.enable = max3421e_enable, /* Enable interrupt */
.acknowledge = max3421e_acknowledge, /* Acknowledge/clear interrupt */
},
};
static FAR struct usbhost_connection_s *g_usbconn;
/****************************************************************************
* Private Functions
****************************************************************************/
/****************************************************************************
* IRQ/GPIO access callbacks. These operations all hidden behind
* callbacks to isolate the MAX3421E driver from differences in GPIO
* interrupt handling by varying boards and MCUs. If possible,
* interrupts should be configured on both rising and falling edges
* so that contact and loss-of-contact events can be detected.
*
* attach - Attach the ADS7843E interrupt handler to the GPIO interrupt
* enable - Enable or disable the GPIO interrupt
* acknowledge - Acknowledge/clear any pending GPIO interrupt as necessary.
*
****************************************************************************/
static int max3421e_attach(FAR const struct max3421e_lowerhalf_s *lower,
xcpt_t isr, FAR void *arg)
{
FAR struct viewtool_max3421elower_s *priv =
(FAR struct viewtool_max3421elower_s *)lower;
if (isr != NULL)
{
/* Just save the address of the handler for now. The new handler will
* be attached when the interrupt is next enabled.
*/
uinfo("Attaching %p\n", isr);
priv->handler = isr;
priv->arg = arg;
}
else
{
uinfo("Detaching %p\n", priv->handler);
max3421e_enable(lower, false);
priv->handler = NULL;
priv->arg = NULL;
}
return OK;
}
static void max3421e_enable(FAR const struct max3421e_lowerhalf_s *lower,
bool enable)
{
FAR struct viewtool_max3421elower_s *priv =
(FAR struct viewtool_max3421elower_s *)lower;
irqstate_t flags;
/* Attach and enable, or detach and disable. Enabling and disabling GPIO
* interrupts is a multi-step process so the safest thing is to keep
* interrupts disabled during the reconfiguration.
*/
flags = enter_critical_section();
if (enable && priv->handler)
{
/* Configure the EXTI interrupt using the saved handler */
(void)stm32_gpiosetevent(GPIO_MAX3421E_INT, false, true, true,
priv->handler, priv->arg);
}
else
{
/* Configure the EXTI interrupt with a NULL handler to disable it.
*
* REVISIT: There is a problem here... interrupts received while
* the EXTI is de-configured will not pend but will be lost.
*/
(void)stm32_gpiosetevent(GPIO_MAX3421E_INT, false, false, false,
NULL, NULL);
}
leave_critical_section(flags);
}
static void max3421e_acknowledge(FAR const struct max3421e_lowerhalf_s *lower)
{
/* Does nothing */
}
/*****************************************************************************
* Name: usbhost_detect
*
* Description:
* Wait for USB devices to be connected.
****************************************************************************/
static int usbhost_detect(int argc, FAR char *argv[])
{
FAR struct usbhost_hubport_s *hport;
uinfo("Starting USB detect thread\n");
for (;;)
{
CONN_WAIT(g_usbconn, &hport);
if (hport->connected)
{
CONN_ENUMERATE(g_usbconn, hport);
}
}
return 0;
}
/****************************************************************************
* Public Functions
****************************************************************************/
/****************************************************************************
* Name: stm32_max3421e_setup
*
* Description:
* This function is called by board-bringup logic to configure the
* MAX3421E USB host.
*
* Input Parameters:
* None
*
* Returned Value:
* Zero is returned on success. Otherwise, a negated errno value is
* returned to indicate the nature of the failure.
*
****************************************************************************/
int stm32_max3421e_setup(void)
{
FAR struct spi_dev_s *spi;
pid_t monpid;
int ret;
/* Configure the MAX3421E interrupt pin and VBUS pins as an inputs and the
* reset pin as an output. Device is initially in reset.
*/
(void)stm32_configgpio(GPIO_MAX3421E_INT);
(void)stm32_configgpio(GPIO_MAX3421E_RST);
(void)stm32_configgpio(GPIO_MAX3421E_VBUS);
/* Get an instance of the SPI interface for the touchscreen chip select */
spi = stm32_spibus_initialize(MAX3421E_SPIBUS);
if (spi == NULL)
{
lcderr("ERROR: Failed to initialize SPI%d\n", MAX3421E_SPIBUS);
return -ENODEV;
}
#ifdef CONFIG_USBHOST_MSC
uinfo("INFO: Initializing USB MSC class\n");
ret = usbhost_msc_initialize();
if (ret < 0)
{
uerr("ERROR: Failed to register mass storage class: %d\n", ret);
}
#endif
#ifdef CONFIG_USBHOST_CDACM
uinfo("INFO: Initializing CDCACM usb class\n");
ret = usbhost_cdacm_initialize();
if (ret < 0)
{
uerr("ERROR: Failed to register CDC/ACM serial class: %d\n", ret);
}
#endif
#ifdef CONFIG_USBHOST_HIDKBD
uinfo("INFO: Initializing HID Keyboard usb class\n");
ret = usbhost_kbdinit();
if (ret < 0)
{
uerr("ERROR: Failed to register the KBD class: %d\n", ret);
}
#endif
#ifdef CONFIG_USBHOST_HIDMOUSE
uinfo("INFO: Initializing HID Mouse usb class\n");
ret = usbhost_mouse_init();
if (ret < 0)
{
uerr("ERROR: Failed to register the mouse class: %d\n", ret);
}
#endif
#ifdef CONFIG_USBHOST_HUB
uinfo("INFO: Initializing USB HUB class\n");
ret = usbhost_hub_initialize()
if (ret < 0)
{
uerr("ERROR: Failed to register hub class: %d\n", ret);
}
#endif
#if defined(CONFIG_RNDIS) && defined(CONFIG_NSH_MACADDR)
{
uint8_t mac[6];
mac[0] = 0xaa; /* TODO */
mac[1] = (CONFIG_NSH_MACADDR >> (8 * 4)) & 0xff;
mac[2] = (CONFIG_NSH_MACADDR >> (8 * 3)) & 0xff;
mac[3] = (CONFIG_NSH_MACADDR >> (8 * 2)) & 0xff;
mac[4] = (CONFIG_NSH_MACADDR >> (8 * 1)) & 0xff;
mac[5] = (CONFIG_NSH_MACADDR >> (8 * 0)) & 0xff;
ret = usbdev_rndis_initialize(mac);
if (ret < 0)
{
uerr("ERROR: Failed to register RNDIS class: %d\n", ret);
}
}
#endif
/* Take the MAX3412E out of reset */
stm32_gpiowrite(GPIO_MAX3421E_RST, true);
/* Initialize and register the MAX3421E device */
g_max3421e_lower.config.spi = spi;
g_usbconn = max3421e_usbhost_initialize(&g_max3421e_lower.config);
if (g_usbconn == NULL)
{
uerr("ERROR: Failed to register MAX3421E device\n");
return -ENODEV;
}
/* Start the USB connection monitor kernel thread */
monpid = kthread_create("MAX3421E ConnMon",
CONFIG_VIEWTOOL_MAX3421E_CONNMON_PRIORITY,
CONFIG_VIEWTOOL_MAX3421E_CONNMON_STACKSIZE,
usbhost_detect, NULL);
if (monpid < 0)
{
uerr("ERROR: Failed to start connection monitor: %d\n", monpid);
}
return OK;
}
#endif /* CONFIG_VIEWTOOL_MAX3421E_SPI1 || CONFIG_VIEWTOOL_MAX3421E_SPI2 */

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@ -91,6 +91,12 @@ void weak_function stm32_spidev_initialize(void)
(void)stm32_configgpio(GPIO_FT80X_CS);
#endif
#if defined(CONFIG_VIEWTOOL_MAX3421E_SPI1) || defined(CONFIG_VIEWTOOL_MAX3421E_SPI2)
/* Configure the MAX3421E CS pin as an input */
(void)stm32_configgpio(GPIO_MAX3421E_CS);
#endif
}
/****************************************************************************
@ -131,6 +137,15 @@ void stm32_spi1select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected)
stm32_gpiowrite(GPIO_FT80X_CS, !selected);
}
else
#endif
#ifdef CONFIG_VIEWTOOL_MAX3421E_SPI1
/* Select/de-select the MAX3421E */
if (devid == SPIDEV_USBHOST(0))
{
stm32_gpiowrite(GPIO_MAX3421E_CS, !selected);
}
else
#endif
{
spierr("ERROR: Unrecognized devid: %08lx\n", (unsigned long)devid);
@ -165,6 +180,15 @@ void stm32_spi2select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected)
stm32_gpiowrite(GPIO_FT80X_CS, !selected);
}
else
#endif
#ifdef CONFIG_VIEWTOOL_MAX3421E_SPI2
/* Select/de-select the MAX3421E */
if (devid == SPIDEV_USBHOST(0))
{
stm32_gpiowrite(GPIO_MAX3421E_CS, !selected);
}
else
#endif
{
spierr("ERROR: Unrecognized devid: %08lx\n", (unsigned long)devid);

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@ -326,6 +326,34 @@
#define GPIO_FT80_PD (GPIO_OUTPUT | GPIO_CNF_OUTPP | GPIO_MODE_50MHz | \
GPIO_OUTPUT_CLEAR | GPIO_PORTC| GPIO_PIN5)
/* MAX3421E USB HOST Discrete I/O (See README.txt for details):
*
* ------ ----------- --------------------
* NAME VIEWTOOL STM32
* ------ ----------- --------------------
* CS# J8 Pin 12 PA4/NSS1 (For SPI1)
* CS# J8 Pin 6 PB12/NSS2 (For SPI2)
* INT# J18 Pin 6 PC5
* RST# J18 Pin 8 PA1
* VBUS J18 Pin 10 PA0
*/
#if defined(CONFIG_VIEWTOOL_MAX3421E_SPI1)
# define MAX3421E_SPIBUS 1
# define GPIO_MAX3421E_CS (GPIO_OUTPUT | GPIO_CNF_OUTPP | GPIO_MODE_50MHz | \
GPIO_OUTPUT_SET | GPIO_PORTA | GPIO_PIN4)
#elif defined(CONFIG_VIEWTOOL_MAX3421E_SPI2)
# define MAX3421E_SPIBUS 2
# define GPIO_MAX3421E_CS (GPIO_OUTPUT | GPIO_CNF_OUTPP | GPIO_MODE_50MHz | \
GPIO_OUTPUT_SET | GPIO_PORTB | GPIO_PIN12)
#endif
#define GPIO_MAX3421E_INT (GPIO_INPUT | GPIO_CNF_INFLOAT | GPIO_MODE_INPUT | \
GPIO_EXTI | GPIO_PORTC | GPIO_PIN5)
#define GPIO_MAX3421E_RST (GPIO_OUTPUT | GPIO_CNF_OUTPP | GPIO_MODE_50MHz | \
GPIO_OUTPUT_CLEAR | GPIO_PORTA| GPIO_PIN1)
#define GPIO_MAX3421E_VBUS (GPIO_INPUT | GPIO_CNF_INFLOAT | GPIO_MODE_INPUT | \
GPIO_EXTI | GPIO_PORTA | GPIO_PIN0)
/****************************************************************************
* Public Functions
****************************************************************************/
@ -448,8 +476,7 @@ int stm32_mpl115ainitialize(FAR const char *devpath);
*
* Description:
* This function is called by board-bringup logic to configure the
* touchscreen device. This function will register the driver as
* /dev/inputN where N is the minor device number.
* FT80x GUI device.
*
* Input Parameters:
* None
@ -464,5 +491,25 @@ int stm32_mpl115ainitialize(FAR const char *devpath);
int stm32_ft80x_setup(void);
#endif
/****************************************************************************
* Name: stm32_max3421e_setup
*
* Description:
* This function is called by board-bringup logic to configure the
* MAX3421E USB host.
*
* Input Parameters:
* None
*
* Returned Value:
* Zero is returned on success. Otherwise, a negated errno value is
* returned to indicate the nature of the failure.
*
****************************************************************************/
#if defined(CONFIG_VIEWTOOL_MAX3421E_SPI1) || defined(CONFIG_VIEWTOOL_MAX3421E_SPI2)
int stm32_max3421e_setup(void);
#endif
#endif /* __ASSEMBLY__ */
#endif /* __CONFIGS_VIEWTOOL_STM32F107_SRC_H */

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@ -55,7 +55,7 @@
****************************************************************************/
/****************************************************************************
* Name: aio_read
* Name: aio_cancel
*
* Description:
* The aio_cancel() function attempts to cancel one or more asynchronous

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@ -343,3 +343,4 @@ if [ ! -z `which gmake 2>/dev/null` ]; then
fi
${MAKE_BIN} olddefconfig 1>/dev/null