Typo fixes.
This commit is contained in:
parent
70ce4b4fc1
commit
85ceb7920e
@ -56,7 +56,7 @@ Header Files
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The interface to the binary loader is described in the header file
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The interface to the binary loader is described in the header file
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``include/nuttx/binfmt/binfmt.h``.
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``include/nuttx/binfmt/binfmt.h``.
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A brief summary of the data structurs and interfaces prototyped in that
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A brief summary of the data structures and interfaces prototyped in that
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header file are listed below.
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header file are listed below.
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Data Structures
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Data Structures
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@ -553,7 +553,7 @@ static inline void up_enablebreaks(struct up_dev_s *priv, bool enable)
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/****************************************************************************
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/****************************************************************************
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* Name: am335x_uart0config, uart1config, uart2config, ..., uart5config
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* Name: am335x_uart0config, uart1config, uart2config, ..., uart5config
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*
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*
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* Descrption:
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* Description:
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* Configure the UART
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* Configure the UART
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*
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*
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****************************************************************************/
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****************************************************************************/
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@ -219,7 +219,7 @@ void arm_gic_initialize(void)
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*
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*
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* NOTE: Only for processors that operate in both secure and non-secure
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* NOTE: Only for processors that operate in both secure and non-secure
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* state.
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* state.
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* REVISIT: This is here only for superstituous reasons. I don't think
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* REVISIT: This is here only for superstitious reasons. I don't think
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* I need this setting in this configuration.
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* I need this setting in this configuration.
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*/
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*/
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@ -170,7 +170,7 @@ static int backtrace_branch(unsigned long top, unsigned long sp,
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* The up call up_backtrace_init_code_regions() will set the start
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* The up call up_backtrace_init_code_regions() will set the start
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* and end addresses of the customized program sections, this method
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* and end addresses of the customized program sections, this method
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* will help the different boards to configure the current text
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* will help the different boards to configure the current text
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* sections for some complicate platfroms
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* sections for some complicate platforms
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*
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*
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* Input Parameters:
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* Input Parameters:
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* regions The start and end address of the text segment
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* regions The start and end address of the text segment
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@ -81,7 +81,7 @@
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LPC17_40_PWM1_CHANNEL6)
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LPC17_40_PWM1_CHANNEL6)
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#if CONFIG_PWM_NCHANNELS > LPC17_40_PWM1_NCHANNELS
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#if CONFIG_PWM_NCHANNELS > LPC17_40_PWM1_NCHANNELS
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# error "PWM subystem has more channels then physical channels enabled"
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# error "PWM subsystem has more channels then physical channels enabled"
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#endif
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#endif
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/****************************************************************************
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/****************************************************************************
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@ -83,13 +83,13 @@
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# define I2C_STAT_MXSLAWNAK (4 << I2C_STAT_SHIFT) /* SLA+W transmitted + NAK received */
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# define I2C_STAT_MXSLAWNAK (4 << I2C_STAT_SHIFT) /* SLA+W transmitted + NAK received */
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# define I2C_STAT_MXDATAACK (5 << I2C_STAT_SHIFT) /* Data transmitted + ACK received */
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# define I2C_STAT_MXDATAACK (5 << I2C_STAT_SHIFT) /* Data transmitted + ACK received */
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# define I2C_STAT_MXDATANAK (6 << I2C_STAT_SHIFT) /* Data transmitted + NAK received */
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# define I2C_STAT_MXDATANAK (6 << I2C_STAT_SHIFT) /* Data transmitted + NAK received */
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# define I2C_STAT_MXARBLOST (7 << I2C_STAT_SHIFT) /* Abritration lost in SLA+W or data */
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# define I2C_STAT_MXARBLOST (7 << I2C_STAT_SHIFT) /* Arbitration lost in SLA+W or data */
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/* Master receive mode */
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/* Master receive mode */
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# define I2C_STAT_MRSTART (0 << I2C_STAT_SHIFT) /* Start transmitted */
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# define I2C_STAT_MRSTART (0 << I2C_STAT_SHIFT) /* Start transmitted */
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# define I2C_STAT_MRRSTART (2 << I2C_STAT_SHIFT) /* Repeated start transmitted */
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# define I2C_STAT_MRRSTART (2 << I2C_STAT_SHIFT) /* Repeated start transmitted */
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# define I2C_STAT_MRARBLOST (7 << I2C_STAT_SHIFT) /* Abritration lost in NAK bit */
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# define I2C_STAT_MRARBLOST (7 << I2C_STAT_SHIFT) /* Arbitration lost in NAK bit */
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# define I2C_STAT_MRSLARACK (8 << I2C_STAT_SHIFT) /* SLA+R transmitted + ACK received */
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# define I2C_STAT_MRSLARACK (8 << I2C_STAT_SHIFT) /* SLA+R transmitted + ACK received */
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# define I2C_STAT_MRSLARNAK (9 << I2C_STAT_SHIFT) /* SLA+R transmitted + NAK received */
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# define I2C_STAT_MRSLARNAK (9 << I2C_STAT_SHIFT) /* SLA+R transmitted + NAK received */
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# define I2C_STAT_MRDATAACK (10 << I2C_STAT_SHIFT) /* Data received + send ACK */
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# define I2C_STAT_MRDATAACK (10 << I2C_STAT_SHIFT) /* Data received + send ACK */
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@ -18,8 +18,8 @@
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*
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*
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****************************************************************************/
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****************************************************************************/
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#ifndef _BLE_CONROLLER_H_
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#ifndef _BLE_CONTROLLER_H_
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#define _BLE_CONROLLER_H_
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#define _BLE_CONTROLLER_H_
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/****************************************************************************
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/****************************************************************************
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* Included Files
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* Included Files
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@ -423,7 +423,7 @@ typedef struct
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uint32_t accessAddr; /* saved synchronization word to be used by Slave */
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uint32_t accessAddr; /* saved synchronization word to be used by Slave */
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uint32_t initCRC; /* connection CRC initialization value (24 bits) */
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uint32_t initCRC; /* connection CRC initialization value (24 bits) */
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uint8_t sleepClkAccuracy; /* peer's sleep clock accurracy; used by own device to determine timer drift */
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uint8_t sleepClkAccuracy; /* peer's sleep clock accuracy; used by own device to determine timer drift */
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connParam_t curParam;
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connParam_t curParam;
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/* current connection parameters */
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/* current connection parameters */
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@ -97,7 +97,7 @@ void bt_coex_handle_cmd_complete_evt(uint16_t opcode, uint16_t cause,
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total_len--;
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total_len--;
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if (total_len <= 1)
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if (total_len <= 1)
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{
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{
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printf("bt_coex_handle_cmd_complete_evt: not reprot to wifi");
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printf("bt_coex_handle_cmd_complete_evt: not report to wifi");
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return ;
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return ;
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}
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}
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@ -883,7 +883,7 @@ struct i2c_slave_s *s32k1xx_i2cbus_slave_initialize(int port)
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*
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*
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* Description:
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* Description:
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* Decrease the reference counter of the I2C slave device. When there are
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* Decrease the reference counter of the I2C slave device. When there are
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* no more references left the I2C slave device is unitialized.
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* no more references left the I2C slave device is uninitialized.
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*
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*
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* Input Parameters:
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* Input Parameters:
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* dev - Device structure as returned by s32k1xx_i2cbus_slave_initialize().
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* dev - Device structure as returned by s32k1xx_i2cbus_slave_initialize().
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@ -68,7 +68,7 @@ struct i2c_slave_s *s32k1xx_i2cbus_slave_initialize(int port);
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*
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*
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* Description:
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* Description:
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* Decrease the reference counter of the I2C slave device. When there are
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* Decrease the reference counter of the I2C slave device. When there are
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* no more references left the I2C slave device is unitialized.
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* no more references left the I2C slave device is uninitialized.
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*
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*
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* Input Parameters:
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* Input Parameters:
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* dev - Device structure as returned by s32k1xx_i2cbus_slave_initialize().
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* dev - Device structure as returned by s32k1xx_i2cbus_slave_initialize().
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@ -814,7 +814,7 @@ static int s32k1xx_dma_setup(struct uart_dev_s *dev)
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modifyreg32(priv->uartbase + S32K1XX_LPUART_BAUD_OFFSET,
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modifyreg32(priv->uartbase + S32K1XX_LPUART_BAUD_OFFSET,
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0, LPUART_BAUD_RDMAE);
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0, LPUART_BAUD_RDMAE);
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/* Enable itnerrupt on Idel and erros */
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/* Enable itnerrupt on Idel and errors */
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modifyreg32(priv->uartbase + S32K1XX_LPUART_CTRL_OFFSET, 0,
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modifyreg32(priv->uartbase + S32K1XX_LPUART_CTRL_OFFSET, 0,
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LPUART_CTRL_PEIE |
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LPUART_CTRL_PEIE |
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@ -45,7 +45,7 @@
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#define S32K3XX_MC_RGM_ERCTRL_OFFSET (0x20) /* External Reset Control Register (ERCTRL) */
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#define S32K3XX_MC_RGM_ERCTRL_OFFSET (0x20) /* External Reset Control Register (ERCTRL) */
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#define S32K3XX_MC_RGM_RDSS_OFFSET (0x24) /* Reset During Standby Status Register (RDSS) */
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#define S32K3XX_MC_RGM_RDSS_OFFSET (0x24) /* Reset During Standby Status Register (RDSS) */
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#define S32K3XX_MC_RGM_FRENTC_OFFSET (0x28) /* Functional Reset Entry Timeout Control Register (FRENTC) */
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#define S32K3XX_MC_RGM_FRENTC_OFFSET (0x28) /* Functional Reset Entry Timeout Control Register (FRENTC) */
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#define S32K3XX_MC_RGM_LPDEBUG_OFFSET (0x2c) /* Low Power Debug Control Reguster (LPDEBUG) */
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#define S32K3XX_MC_RGM_LPDEBUG_OFFSET (0x2c) /* Low Power Debug Control Register (LPDEBUG) */
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/* MC_RGM Register Addresses ************************************************/
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/* MC_RGM Register Addresses ************************************************/
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@ -165,8 +165,8 @@
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/* Reset During Standby Status Register (RDSS) */
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/* Reset During Standby Status Register (RDSS) */
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#define MC_RGM_RDSS_DES_RES (1 << 0) /* Bit 0: Destructive reset event occured during standby mode (DES_RES) */
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#define MC_RGM_RDSS_DES_RES (1 << 0) /* Bit 0: Destructive reset event occurred during standby mode (DES_RES) */
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#define MC_RGM_RDSS_FES_RES (1 << 1) /* Bit 1: Functional reset event occured during standby mode (FES_RES) */
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#define MC_RGM_RDSS_FES_RES (1 << 1) /* Bit 1: Functional reset event occurred during standby mode (FES_RES) */
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/* Bits 2-31: Reserved */
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/* Bits 2-31: Reserved */
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/* Functional Reset Entry Timeout Control Register (FRENTC) */
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/* Functional Reset Entry Timeout Control Register (FRENTC) */
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@ -175,7 +175,7 @@
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#define MC_RGM_FRENTC_FRET_TIMEOUT_SHIFT (1) /* Bits 1-31: Functional Reset Entry Timer Value (FRET_TIMEOUT) */
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#define MC_RGM_FRENTC_FRET_TIMEOUT_SHIFT (1) /* Bits 1-31: Functional Reset Entry Timer Value (FRET_TIMEOUT) */
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#define MC_RGM_FRENTC_FRET_TIMEOUT_MASK (0x7fffffff << MC_RGM_FRENTC_FRET_TIMEOUT_SHIFT)
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#define MC_RGM_FRENTC_FRET_TIMEOUT_MASK (0x7fffffff << MC_RGM_FRENTC_FRET_TIMEOUT_SHIFT)
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/* Low Power Debug Control Reguster (LPDEBUG) */
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/* Low Power Debug Control Register (LPDEBUG) */
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#define MC_RGM_LPDEBUG_LP_DBG_EN (1 << 0) /* Bit 0: Low-Power Debug Enable (LP_DBG_EN) */
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#define MC_RGM_LPDEBUG_LP_DBG_EN (1 << 0) /* Bit 0: Low-Power Debug Enable (LP_DBG_EN) */
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/* Bits 1-31: Reserved */
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/* Bits 1-31: Reserved */
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@ -123,7 +123,7 @@ tc32_switchcontext:
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tmov r3, r13
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tmov r3, r13
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tstorer r3, [r0]
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tstorer r3, [r0]
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/* r0 = r1 = next task tcb->regs (actualy sp) */
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/* r0 = r1 = next task tcb->regs (actually sp) */
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tmov r0, r1
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tmov r0, r1
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@ -66,7 +66,7 @@
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* Pre-processor Definitions
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* Pre-processor Definitions
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****************************************************************************/
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****************************************************************************/
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/* Oscilator reference frequency */
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/* Oscillator reference frequency */
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#define FOSCREF (2500000U)
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#define FOSCREF (2500000U)
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@ -186,7 +186,7 @@
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#define TWI_STAT_TX_SAW_ACK (0xd0) /* Second Address byte+Write bit transmitted,ACK received */
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#define TWI_STAT_TX_SAW_ACK (0xd0) /* Second Address byte+Write bit transmitted,ACK received */
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#define TWI_STAT_TX_SAW_NAK (0xd8) /* Second Address byte+Write bit transmitted,ACK not received */
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#define TWI_STAT_TX_SAW_NAK (0xd8) /* Second Address byte+Write bit transmitted,ACK not received */
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#define TWI_STAT_IDLE (0xf8) /* No relevant status infomation,INT_FLAG = 0 */
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#define TWI_STAT_IDLE (0xf8) /* No relevant status information,INT_FLAG = 0 */
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/****************************************************************************
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/****************************************************************************
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* Public Types
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* Public Types
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@ -927,7 +927,7 @@ static void arm_gic_initialize(void)
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*
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*
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* NOTE: Only for processors that operate in both secure and non-secure
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* NOTE: Only for processors that operate in both secure and non-secure
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* state.
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* state.
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* REVISIT: This is here only for superstituous reasons. I don't think
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* REVISIT: This is here only for superstitious reasons. I don't think
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* I need this setting in this configuration.
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* I need this setting in this configuration.
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*/
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*/
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@ -43,7 +43,7 @@
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* has been created. This function is called to initialize
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* has been created. This function is called to initialize
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* the processor specific portions of the new TCB.
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* the processor specific portions of the new TCB.
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*
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*
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* This function must setup the intial architecture registers
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* This function must setup the initial architecture registers
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* and/or stack so that execution will begin at tcb->start
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* and/or stack so that execution will begin at tcb->start
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* on the next context switch.
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* on the next context switch.
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*
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*
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@ -32,7 +32,7 @@
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* Pre-processor Definitions
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* Pre-processor Definitions
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****************************************************************************/
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****************************************************************************/
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/* disable psu function temporily */
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/* disable psu function temporarily */
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#define CONFIG_XC5_PSU_ENABLE
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#define CONFIG_XC5_PSU_ENABLE
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@ -49,7 +49,7 @@
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* has been created. This function is called to initialize
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* has been created. This function is called to initialize
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* the processor specific portions of the new TCB.
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* the processor specific portions of the new TCB.
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*
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*
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* This function must setup the intial architecture registers
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* This function must setup the initial architecture registers
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* and/or stack so that execution will begin at tcb->start
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* and/or stack so that execution will begin at tcb->start
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* on the next context switch.
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* on the next context switch.
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*
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*
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@ -32,7 +32,7 @@
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* Pre-processor Definitions
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* Pre-processor Definitions
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****************************************************************************/
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****************************************************************************/
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/* disable psu function temporily */
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/* disable psu function temporarily */
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#define CEVAXM6_PSU_ENABLE 0
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#define CEVAXM6_PSU_ENABLE 0
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@ -269,7 +269,7 @@ int bl602_dma_channel_start(uint8_t channel_id)
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/* Unmask interrupts for:
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/* Unmask interrupts for:
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* - DMA_INT_TCOMPLETED
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* - DMA_INT_TCOMPLETED
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* - DMA_INT_ERR
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* - DMA_INT_ERR
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* Note it is expected that the TC interupt to be enabled prior to this
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* Note it is expected that the TC interrupt to be enabled prior to this
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* function call if needed as it is nominally controlled via the LLI
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* function call if needed as it is nominally controlled via the LLI
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* mechanism.
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* mechanism.
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*/
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*/
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@ -333,7 +333,7 @@ int bl602_dma_channel_stop(uint8_t channel_id)
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* Name: riscv_dma_initialize
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* Name: riscv_dma_initialize
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*
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*
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* Description:
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* Description:
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* Intialize DMA controller.
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* Initialize DMA controller.
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*
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*
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* Input Parameters:
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* Input Parameters:
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* None
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* None
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@ -370,7 +370,7 @@ void weak_function riscv_dma_initialize(void)
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putreg32(0, BL602_DMA_CH_N_REG(BL602_DMA_CONFIG_OFFSET, ch));
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putreg32(0, BL602_DMA_CH_N_REG(BL602_DMA_CONFIG_OFFSET, ch));
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}
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}
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/* Attach DMA tranfer complete interrupt handler */
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/* Attach DMA transfer complete interrupt handler */
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irq_attach(BL602_IRQ_DMA_ALL, bl602_dma_int_handler, NULL);
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irq_attach(BL602_IRQ_DMA_ALL, bl602_dma_int_handler, NULL);
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up_enable_irq(BL602_IRQ_DMA_ALL);
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up_enable_irq(BL602_IRQ_DMA_ALL);
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@ -213,7 +213,7 @@ int bl602_dma_channel_stop(uint8_t channel_id);
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* Name: bl602_dma_init
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* Name: bl602_dma_init
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*
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*
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* Description:
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* Description:
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* Intialize DMA controller.
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* Initialize DMA controller.
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*
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*
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* Input Parameters:
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* Input Parameters:
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* None
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* None
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@ -58,16 +58,16 @@ bl602_start:
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la a0, __boot2_pt_addr_src
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la a0, __boot2_pt_addr_src
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la a1, __boot2_pt_addr_start
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la a1, __boot2_pt_addr_start
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la a2, __boot2_pt_addr_end
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la a2, __boot2_pt_addr_end
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bgeu a1, a2, bl602_entry_load_boot2_partiton_address_end
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bgeu a1, a2, bl602_entry_load_boot2_partition_address_end
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bl602_entry_load_boot2_partiton_address_loop:
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bl602_entry_load_boot2_partition_address_loop:
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lw t0, (a0)
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lw t0, (a0)
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sw t0, (a1)
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sw t0, (a1)
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addi a0, a0, 4
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addi a0, a0, 4
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addi a1, a1, 4
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addi a1, a1, 4
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bltu a1, a2, bl602_entry_load_boot2_partiton_address_loop
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bltu a1, a2, bl602_entry_load_boot2_partition_address_loop
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bl602_entry_load_boot2_partiton_address_end:
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bl602_entry_load_boot2_partition_address_end:
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/* Load boot2 flashCfg address */
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/* Load boot2 flashCfg address */
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@ -89,9 +89,9 @@ void bl602_hbn_clear_rtc_int(void);
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*
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*
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* Input Parameters:
|
* Input Parameters:
|
||||||
* delay: RTC interrupt delay 32 clocks
|
* delay: RTC interrupt delay 32 clocks
|
||||||
* compval_low: RTC interrupt commpare value low 32 bits
|
* compval_low: RTC interrupt compare value low 32 bits
|
||||||
* compval_high: RTC interrupt commpare value high 32 bits
|
* compval_high: RTC interrupt compare value high 32 bits
|
||||||
* comp_mode: RTC interrupt commpare
|
* comp_mode: RTC interrupt compare
|
||||||
*
|
*
|
||||||
* Returned Value:
|
* Returned Value:
|
||||||
* None.
|
* None.
|
||||||
|
@ -47,7 +47,7 @@
|
|||||||
* l3 = trap type
|
* l3 = trap type
|
||||||
*
|
*
|
||||||
* NOTE: By an executive defined convention, trap type is between 0 and 255 if
|
* NOTE: By an executive defined convention, trap type is between 0 and 255 if
|
||||||
* it is an asynchonous trap and 256 and 511 if it is synchronous.
|
* it is an asynchronous trap and 256 and 511 if it is synchronous.
|
||||||
*/
|
*/
|
||||||
|
|
||||||
.align 4
|
.align 4
|
||||||
|
@ -29,7 +29,7 @@
|
|||||||
#define RTRAP(_vector, _handler) mov %g0, %l0 ; sethi %hi(_handler), %l4 ; jmp %l4+%lo(_handler); mov _vector, %l3
|
#define RTRAP(_vector, _handler) mov %g0, %l0 ; sethi %hi(_handler), %l4 ; jmp %l4+%lo(_handler); mov _vector, %l3
|
||||||
#define TRAP(_vector, _handler) mov %psr, %l0; sethi %hi(_handler), %l4 ; jmp %l4+%lo(_handler); mov _vector, %l3
|
#define TRAP(_vector, _handler) mov %psr, %l0; sethi %hi(_handler), %l4 ; jmp %l4+%lo(_handler); mov _vector, %l3
|
||||||
|
|
||||||
/* Unexcpected trap will halt the processor by forcing it to error state */
|
/* Unexpected trap will halt the processor by forcing it to error state */
|
||||||
#define BAD_TRAP ta 0; nop; nop; nop;
|
#define BAD_TRAP ta 0; nop; nop; nop;
|
||||||
#define SOFT_TRAP BAD_TRAP /* Software trap. Treat as BAD_TRAP */
|
#define SOFT_TRAP BAD_TRAP /* Software trap. Treat as BAD_TRAP */
|
||||||
|
|
||||||
@ -87,7 +87,7 @@ _hardreset:
|
|||||||
RTRAP(0,__start); ! 00 reset trap
|
RTRAP(0,__start); ! 00 reset trap
|
||||||
BAD_TRAP; ! 01 instruction_access_exception
|
BAD_TRAP; ! 01 instruction_access_exception
|
||||||
BAD_TRAP; ! 02 illegal_instruction
|
BAD_TRAP; ! 02 illegal_instruction
|
||||||
BAD_TRAP; ! 03 priveleged_instruction
|
BAD_TRAP; ! 03 privileged_instruction
|
||||||
TRAP(4,_fpdis_enable); ! 04 fp_disabled
|
TRAP(4,_fpdis_enable); ! 04 fp_disabled
|
||||||
WOTRAP(5,_window_overflow); ! 05 window_overflow
|
WOTRAP(5,_window_overflow); ! 05 window_overflow
|
||||||
WUTRAP(6,_window_underflow); ! 06 window_underflow
|
WUTRAP(6,_window_underflow); ! 06 window_underflow
|
||||||
@ -312,7 +312,7 @@ __start:
|
|||||||
ldd [%g1], %f30
|
ldd [%g1], %f30
|
||||||
nop
|
nop
|
||||||
|
|
||||||
! initial cache controler
|
! initial cache controller
|
||||||
set BM3803_REG, %g1
|
set BM3803_REG, %g1
|
||||||
set 0x81000f,%g2 !open dcache,icache, dcache snoop,icache burst
|
set 0x81000f,%g2 !open dcache,icache, dcache snoop,icache burst
|
||||||
! set 0x80000f,%g2 !open dcache,icache, dcache snoop
|
! set 0x80000f,%g2 !open dcache,icache, dcache snoop
|
||||||
|
@ -148,7 +148,7 @@ static void bm3803_oneshot_handler(void *arg)
|
|||||||
* lower An instance of the lower-half oneshot state structure. This
|
* lower An instance of the lower-half oneshot state structure. This
|
||||||
* structure must have been previously initialized via a call to
|
* structure must have been previously initialized via a call to
|
||||||
* oneshot_initialize();
|
* oneshot_initialize();
|
||||||
* ts The location in which to return the maxumum delay.
|
* ts The location in which to return the maximum delay.
|
||||||
*
|
*
|
||||||
* Returned Value:
|
* Returned Value:
|
||||||
* Zero (OK) is returned on success; a negated errno value is returned
|
* Zero (OK) is returned on success; a negated errno value is returned
|
||||||
|
@ -47,7 +47,7 @@
|
|||||||
* l3 = trap type
|
* l3 = trap type
|
||||||
*
|
*
|
||||||
* NOTE: By an executive defined convention, trap type is between 0 and 255 if
|
* NOTE: By an executive defined convention, trap type is between 0 and 255 if
|
||||||
* it is an asynchonous trap and 256 and 511 if it is synchronous.
|
* it is an asynchronous trap and 256 and 511 if it is synchronous.
|
||||||
*/
|
*/
|
||||||
|
|
||||||
.align 4
|
.align 4
|
||||||
|
@ -29,7 +29,7 @@
|
|||||||
#define RTRAP(_vector, _handler) mov %g0, %l0 ; sethi %hi(_handler), %l4 ; jmp %l4+%lo(_handler); mov _vector, %l3
|
#define RTRAP(_vector, _handler) mov %g0, %l0 ; sethi %hi(_handler), %l4 ; jmp %l4+%lo(_handler); mov _vector, %l3
|
||||||
#define TRAP(_vector, _handler) mov %psr, %l0; sethi %hi(_handler), %l4 ; jmp %l4+%lo(_handler); mov _vector, %l3
|
#define TRAP(_vector, _handler) mov %psr, %l0; sethi %hi(_handler), %l4 ; jmp %l4+%lo(_handler); mov _vector, %l3
|
||||||
|
|
||||||
/* Unexcpected trap will halt the processor by forcing it to error state */
|
/* Unexpected trap will halt the processor by forcing it to error state */
|
||||||
#define BAD_TRAP ta 0; nop; nop; nop;
|
#define BAD_TRAP ta 0; nop; nop; nop;
|
||||||
#define SOFT_TRAP BAD_TRAP /* Software trap. Treat as BAD_TRAP */
|
#define SOFT_TRAP BAD_TRAP /* Software trap. Treat as BAD_TRAP */
|
||||||
|
|
||||||
@ -87,7 +87,7 @@ _hardreset:
|
|||||||
RTRAP(0,__start); ! 00 reset trap
|
RTRAP(0,__start); ! 00 reset trap
|
||||||
BAD_TRAP; ! 01 instruction_access_exception
|
BAD_TRAP; ! 01 instruction_access_exception
|
||||||
BAD_TRAP; ! 02 illegal_instruction
|
BAD_TRAP; ! 02 illegal_instruction
|
||||||
BAD_TRAP; ! 03 priveleged_instruction
|
BAD_TRAP; ! 03 privileged_instruction
|
||||||
TRAP(4,_fpdis_enable); ! 04 fp_disabled
|
TRAP(4,_fpdis_enable); ! 04 fp_disabled
|
||||||
WOTRAP(5,_window_overflow); ! 05 window_overflow
|
WOTRAP(5,_window_overflow); ! 05 window_overflow
|
||||||
WUTRAP(6,_window_underflow); ! 06 window_underflow
|
WUTRAP(6,_window_underflow); ! 06 window_underflow
|
||||||
@ -313,7 +313,7 @@ __start:
|
|||||||
ldd [%g1], %f30
|
ldd [%g1], %f30
|
||||||
nop
|
nop
|
||||||
|
|
||||||
! initial cache controler
|
! initial cache controller
|
||||||
set EXTER_REG, %g1
|
set EXTER_REG, %g1
|
||||||
set 0x81000f,%g2 !open dcache,icache, dcache snoop,icache burst
|
set 0x81000f,%g2 !open dcache,icache, dcache snoop,icache burst
|
||||||
! set 0x80000f,%g2 !open dcache,icache, dcache snoop
|
! set 0x80000f,%g2 !open dcache,icache, dcache snoop
|
||||||
|
@ -48,7 +48,7 @@
|
|||||||
/* Bit 1: Reserved */
|
/* Bit 1: Reserved */
|
||||||
#define X86_64_RFLAGS_PF (1 << 2) /* Bit 2: Parity Flag */
|
#define X86_64_RFLAGS_PF (1 << 2) /* Bit 2: Parity Flag */
|
||||||
/* Bit 3: Reserved */
|
/* Bit 3: Reserved */
|
||||||
#define X86_64_RFLAGS_AF (1 << 4) /* Bit 4: Auxillary carry Flag */
|
#define X86_64_RFLAGS_AF (1 << 4) /* Bit 4: Auxiliary carry Flag */
|
||||||
/* Bit 5: Reserved */
|
/* Bit 5: Reserved */
|
||||||
#define X86_64_RFLAGS_ZF (1 << 6) /* Bit 6: Zero Flag */
|
#define X86_64_RFLAGS_ZF (1 << 6) /* Bit 6: Zero Flag */
|
||||||
#define X86_64_RFLAGS_SF (1 << 7) /* Bit 7: Sign Flag */
|
#define X86_64_RFLAGS_SF (1 << 7) /* Bit 7: Sign Flag */
|
||||||
@ -295,11 +295,11 @@ begin_packed_struct struct gdt_entry_s
|
|||||||
{
|
{
|
||||||
uint16_t limit_low; /* Lower 16-bits of segment limit */
|
uint16_t limit_low; /* Lower 16-bits of segment limit */
|
||||||
uint32_t base_low:24; /* Lower 24-bits of base address */
|
uint32_t base_low:24; /* Lower 24-bits of base address */
|
||||||
uint8_t AC:1; /* 1: CPU accessed this segement */
|
uint8_t AC:1; /* 1: CPU accessed this segment */
|
||||||
uint8_t RW:1; /* 1: Data Segement 0: Code Segement */
|
uint8_t RW:1; /* 1: Data Segment 0: Code Segment */
|
||||||
uint8_t DC:1; /* Direction bit/Conforming bit. */
|
uint8_t DC:1; /* Direction bit/Conforming bit. */
|
||||||
uint8_t EX:1; /* 1: Segment can be executed */
|
uint8_t EX:1; /* 1: Segment can be executed */
|
||||||
uint8_t S:1; /* S: 0:TSS 1:Code/Data Segement */
|
uint8_t S:1; /* S: 0:TSS 1:Code/Data Segment */
|
||||||
uint8_t DPL:2; /* DPL */
|
uint8_t DPL:2; /* DPL */
|
||||||
uint8_t P:1; /* Present? 1:Segment is preset */
|
uint8_t P:1; /* Present? 1:Segment is preset */
|
||||||
uint8_t limit_high:4; /* Upper 4-bits of segment limit */
|
uint8_t limit_high:4; /* Upper 4-bits of segment limit */
|
||||||
|
@ -91,7 +91,7 @@
|
|||||||
* The contents of a non-running thread's CPENABLE register.
|
* The contents of a non-running thread's CPENABLE register.
|
||||||
* It represents the co-processors owned (and whose state is still needed)
|
* It represents the co-processors owned (and whose state is still needed)
|
||||||
* by the thread. When a thread is preempted, its CPENABLE is saved here.
|
* by the thread. When a thread is preempted, its CPENABLE is saved here.
|
||||||
* When a thread solicits a context-swtich, its CPENABLE is cleared - the
|
* When a thread solicits a context-switch, its CPENABLE is cleared - the
|
||||||
* compiler has saved the (caller-saved) co-proc state if it needs to.
|
* compiler has saved the (caller-saved) co-proc state if it needs to.
|
||||||
* When a non-running thread loses ownership of a CP, its bit is cleared.
|
* When a non-running thread loses ownership of a CP, its bit is cleared.
|
||||||
* When a thread runs, it's XTENSA_CPENABLE is loaded into the CPENABLE
|
* When a thread runs, it's XTENSA_CPENABLE is loaded into the CPENABLE
|
||||||
@ -103,7 +103,7 @@
|
|||||||
* Indicates whether the state of each co-processor is saved in the state
|
* Indicates whether the state of each co-processor is saved in the state
|
||||||
* save area. When the state of a thread is saved, only the state of
|
* save area. When the state of a thread is saved, only the state of
|
||||||
* co-procs still enabled in CPENABLE is saved. When the co-processor
|
* co-procs still enabled in CPENABLE is saved. When the co-processor
|
||||||
* state is restored, the state is only resotred for a co-processor if
|
* state is restored, the state is only restored for a co-processor if
|
||||||
* this bit is set. This bist set is cleared after after co-processor
|
* this bit is set. This bist set is cleared after after co-processor
|
||||||
* state has been restored.
|
* state has been restored.
|
||||||
*
|
*
|
||||||
|
@ -111,7 +111,7 @@ g_intstacktop:
|
|||||||
*
|
*
|
||||||
* Exit Conditions:
|
* Exit Conditions:
|
||||||
* This macro will use registers a2, a3 and a4.
|
* This macro will use registers a2, a3 and a4.
|
||||||
* a2 - Points to the, possbily, new register save area.
|
* a2 - Points to the, possibly, new register save area.
|
||||||
*
|
*
|
||||||
****************************************************************************/
|
****************************************************************************/
|
||||||
|
|
||||||
|
@ -105,7 +105,7 @@ void mpu_configure_region(uintptr_t base, size_t size,
|
|||||||
* Xtensa ISA Reference Manual B4.6.5.3:
|
* Xtensa ISA Reference Manual B4.6.5.3:
|
||||||
* The lowest address of each foregound segment
|
* The lowest address of each foregound segment
|
||||||
* must be no smaller than the lowest address of the
|
* must be no smaller than the lowest address of the
|
||||||
* preceding foregroud segment in numerical order.
|
* preceding foreground segment in numerical order.
|
||||||
*/
|
*/
|
||||||
|
|
||||||
if (region < (XCHAL_MPU_ENTRIES - 1))
|
if (region < (XCHAL_MPU_ENTRIES - 1))
|
||||||
|
@ -242,7 +242,7 @@ _double_exception_vector:
|
|||||||
break 1, 4 /* Unhandled double exception */
|
break 1, 4 /* Unhandled double exception */
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
/* Can't use excetpion_entry because there is no relationship between EPC1
|
/* Can't use exception_entry because there is no relationship between EPC1
|
||||||
* DEPC and the current level. This can be handled by a separate ifeq
|
* DEPC and the current level. This can be handled by a separate ifeq
|
||||||
* block in the macro, however this part is not used, so let's not add
|
* block in the macro, however this part is not used, so let's not add
|
||||||
* this special case until we have an application for it.
|
* this special case until we have an application for it.
|
||||||
|
@ -112,8 +112,8 @@ void up_timer_initialize(void)
|
|||||||
|
|
||||||
/* Calculate timer reload value (continuous mode)
|
/* Calculate timer reload value (continuous mode)
|
||||||
*
|
*
|
||||||
* timer_period = reload_value * divisor / system_clock_freqency
|
* timer_period = reload_value * divisor / system_clock_frequency
|
||||||
* timer_frequency = system_clock_freqency / divisor / reload_value
|
* timer_frequency = system_clock_frequency / divisor / reload_value
|
||||||
* or
|
* or
|
||||||
* reload_value = (system_clock_frequency / timer_frequency / divisor
|
* reload_value = (system_clock_frequency / timer_frequency / divisor
|
||||||
*
|
*
|
||||||
|
@ -91,7 +91,7 @@
|
|||||||
#define HAVE_PROGMEM_CHARDEV
|
#define HAVE_PROGMEM_CHARDEV
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
/* This is the on-chip progmem memroy driver minor number */
|
/* This is the on-chip progmem memory driver minor number */
|
||||||
|
|
||||||
#define PROGMEM_MTD_MINOR 0
|
#define PROGMEM_MTD_MINOR 0
|
||||||
|
|
||||||
|
@ -138,7 +138,7 @@ void sam_boardinitialize(void)
|
|||||||
* If CONFIG_BOARD_LATE_INITIALIZE is selected, then an additional
|
* If CONFIG_BOARD_LATE_INITIALIZE is selected, then an additional
|
||||||
* initialization call will be performed in the boot-up sequence to a
|
* initialization call will be performed in the boot-up sequence to a
|
||||||
* function called board_late_initialize(). board_late_initialize() will be
|
* function called board_late_initialize(). board_late_initialize() will be
|
||||||
* called immediately after up_intitialize() is called and just before the
|
* called immediately after up_initialize() is called and just before the
|
||||||
* initial application is started. This additional initialization phase
|
* initial application is started. This additional initialization phase
|
||||||
* may be used, for example, to initialize board-specific device drivers.
|
* may be used, for example, to initialize board-specific device drivers.
|
||||||
*
|
*
|
||||||
|
@ -87,7 +87,7 @@ void stm32_boardinitialize(void)
|
|||||||
* If CONFIG_BOARD_LATE_INITIALIZE is selected, then an additional
|
* If CONFIG_BOARD_LATE_INITIALIZE is selected, then an additional
|
||||||
* initialization call will be performed in the boot-up sequence to a
|
* initialization call will be performed in the boot-up sequence to a
|
||||||
* function called board_late_initialize(). board_late_initialize() will
|
* function called board_late_initialize(). board_late_initialize() will
|
||||||
* be called immediately after up_intitialize() is called and just before
|
* be called immediately after up_initialize() is called and just before
|
||||||
* the initial application is started. This additional initialization
|
* the initial application is started. This additional initialization
|
||||||
* phase may be used, for example, to initialize board-specific device
|
* phase may be used, for example, to initialize board-specific device
|
||||||
* drivers.
|
* drivers.
|
||||||
|
@ -64,7 +64,7 @@ void xmc4_board_initialize(void)
|
|||||||
* If CONFIG_BOARD_LATE_INITIALIZE is selected, then an additional
|
* If CONFIG_BOARD_LATE_INITIALIZE is selected, then an additional
|
||||||
* initialization call will be performed in the boot-up sequence to a
|
* initialization call will be performed in the boot-up sequence to a
|
||||||
* function called board_late_initialize(). board_late_initialize() will be
|
* function called board_late_initialize(). board_late_initialize() will be
|
||||||
* called immediately after up_intitialize() is called and just before the
|
* called immediately after up_initialize() is called and just before the
|
||||||
* initial application is started. This additional initialization phase
|
* initial application is started. This additional initialization phase
|
||||||
* may be used, for example, to initialize board-specific device drivers.
|
* may be used, for example, to initialize board-specific device drivers.
|
||||||
*
|
*
|
||||||
|
@ -64,7 +64,7 @@ void xmc4_board_initialize(void)
|
|||||||
* If CONFIG_BOARD_LATE_INITIALIZE is selected, then an additional
|
* If CONFIG_BOARD_LATE_INITIALIZE is selected, then an additional
|
||||||
* initialization call will be performed in the boot-up sequence to a
|
* initialization call will be performed in the boot-up sequence to a
|
||||||
* function called board_late_initialize(). board_late_initialize() will be
|
* function called board_late_initialize(). board_late_initialize() will be
|
||||||
* called immediately after up_intitialize() is called and just before the
|
* called immediately after up_initialize() is called and just before the
|
||||||
* initial application is started. This additional initialization phase
|
* initial application is started. This additional initialization phase
|
||||||
* may be used, for example, to initialize board-specific device drivers.
|
* may be used, for example, to initialize board-specific device drivers.
|
||||||
*
|
*
|
||||||
|
@ -560,7 +560,7 @@ int boardctl(unsigned int cmd, uintptr_t arg)
|
|||||||
/* CMD: BOARDIOC_OS_SYMTAB
|
/* CMD: BOARDIOC_OS_SYMTAB
|
||||||
* DESCRIPTION: Select the OS symbol table. This symbol table
|
* DESCRIPTION: Select the OS symbol table. This symbol table
|
||||||
* provides the symbol definitions exported by the OS to
|
* provides the symbol definitions exported by the OS to
|
||||||
* kernal modules.
|
* kernel modules.
|
||||||
* ARG: A pointer to an instance of struct boardioc_symtab_s
|
* ARG: A pointer to an instance of struct boardioc_symtab_s
|
||||||
* CONFIGURATION: CONFIG_BOARDCTL_OS_SYMTAB
|
* CONFIGURATION: CONFIG_BOARDCTL_OS_SYMTAB
|
||||||
* DEPENDENCIES: None
|
* DEPENDENCIES: None
|
||||||
|
@ -10,7 +10,7 @@
|
|||||||
* The implementation was written so as to conform with Netscapes SSL
|
* The implementation was written so as to conform with Netscapes SSL
|
||||||
* specification. This library and applications are
|
* specification. This library and applications are
|
||||||
* FREE FOR COMMERCIAL AND NON-COMMERCIAL USE
|
* FREE FOR COMMERCIAL AND NON-COMMERCIAL USE
|
||||||
* as long as the following conditions are aheared to.
|
* as long as the following conditions are adhered to.
|
||||||
*
|
*
|
||||||
* Copyright remains Eric Young's, and as such any Copyright notices in
|
* Copyright remains Eric Young's, and as such any Copyright notices in
|
||||||
* the code are not to be removed. If this code is used in a product,
|
* the code are not to be removed. If this code is used in a product,
|
||||||
|
@ -10,7 +10,7 @@
|
|||||||
* The implementation was written so as to conform with Netscapes SSL
|
* The implementation was written so as to conform with Netscapes SSL
|
||||||
* specification. This library and applications are
|
* specification. This library and applications are
|
||||||
* FREE FOR COMMERCIAL AND NON-COMMERCIAL USE
|
* FREE FOR COMMERCIAL AND NON-COMMERCIAL USE
|
||||||
* as long as the following conditions are aheared to.
|
* as long as the following conditions are adhered to.
|
||||||
*
|
*
|
||||||
* Copyright remains Eric Young's, and as such any Copyright notices in
|
* Copyright remains Eric Young's, and as such any Copyright notices in
|
||||||
* the code are not to be removed. If this code is used in a product,
|
* the code are not to be removed. If this code is used in a product,
|
||||||
|
@ -81,7 +81,7 @@ typedef enum altmdm_state_e
|
|||||||
ALTMDM_STATE_V4SET, /* Altcom version 4 command setting state */
|
ALTMDM_STATE_V4SET, /* Altcom version 4 command setting state */
|
||||||
ALTMDM_STATE_SLEEPSET, /* Sleep packet setting state */
|
ALTMDM_STATE_SLEEPSET, /* Sleep packet setting state */
|
||||||
ALTMDM_STATE_TXPREPARE, /* Normal packet setting state */
|
ALTMDM_STATE_TXPREPARE, /* Normal packet setting state */
|
||||||
ALTMDM_STATE_TXREQ, /* TX request signal assersion state */
|
ALTMDM_STATE_TXREQ, /* TX request signal assertion state */
|
||||||
ALTMDM_STATE_HDRSREQ, /* Waiting for Slave request signal state */
|
ALTMDM_STATE_HDRSREQ, /* Waiting for Slave request signal state */
|
||||||
ALTMDM_STATE_HDRTRX, /* SPI Header transaction state */
|
ALTMDM_STATE_HDRTRX, /* SPI Header transaction state */
|
||||||
ALTMDM_STATE_SLEEPPKT, /* Sleep Packet body size adjustment
|
ALTMDM_STATE_SLEEPPKT, /* Sleep Packet body size adjustment
|
||||||
|
@ -143,7 +143,7 @@ uint32_t altmdm_event_wait(FAR struct altmdm_event_s *evt,
|
|||||||
|
|
||||||
leave_critical_section(flags);
|
leave_critical_section(flags);
|
||||||
|
|
||||||
/* Wait for any event is occured related on the semaphore.. */
|
/* Wait for any event is occurred related on the semaphore.. */
|
||||||
|
|
||||||
if (timeout_ms > 0)
|
if (timeout_ms > 0)
|
||||||
{
|
{
|
||||||
|
@ -220,7 +220,7 @@ static int usensor_ioctl(FAR struct file *filep, int cmd,
|
|||||||
* Description:
|
* Description:
|
||||||
* This function registers usensor character node "/dev/usensor", so that
|
* This function registers usensor character node "/dev/usensor", so that
|
||||||
* application can register user sensor by this node. The node will
|
* application can register user sensor by this node. The node will
|
||||||
* manager all user sensors in this character dirver.
|
* manager all user sensors in this character driver.
|
||||||
****************************************************************************/
|
****************************************************************************/
|
||||||
|
|
||||||
int usensor_initialize(void)
|
int usensor_initialize(void)
|
||||||
|
@ -172,7 +172,7 @@ void up_alarm_set_lowerhalf(FAR struct oneshot_lowerhalf_s *lower)
|
|||||||
*
|
*
|
||||||
* Description:
|
* Description:
|
||||||
* Return the elapsed time since power-up (or, more correctly, since
|
* Return the elapsed time since power-up (or, more correctly, since
|
||||||
* the archtecture-specific timer was initialized). This function is
|
* the architecture-specific timer was initialized). This function is
|
||||||
* functionally equivalent to:
|
* functionally equivalent to:
|
||||||
*
|
*
|
||||||
* int clock_gettime(clockid_t clockid, FAR struct timespec *ts);
|
* int clock_gettime(clockid_t clockid, FAR struct timespec *ts);
|
||||||
|
@ -389,7 +389,7 @@ struct motor_phy_params_f32_s
|
|||||||
float one_by_p; /* Inverse number of motor pole pairs */
|
float one_by_p; /* Inverse number of motor pole pairs */
|
||||||
};
|
};
|
||||||
|
|
||||||
/* PMSM motor physcial parameters */
|
/* PMSM motor physical parameters */
|
||||||
|
|
||||||
struct pmsm_phy_params_f32_s
|
struct pmsm_phy_params_f32_s
|
||||||
{
|
{
|
||||||
@ -397,7 +397,7 @@ struct pmsm_phy_params_f32_s
|
|||||||
float iner; /* Rotor inertia */
|
float iner; /* Rotor inertia */
|
||||||
float ind_d; /* d-inductance */
|
float ind_d; /* d-inductance */
|
||||||
float ind_q; /* q-inductance */
|
float ind_q; /* q-inductance */
|
||||||
float one_by_iner; /* One by intertia */
|
float one_by_iner; /* One by inertia */
|
||||||
float one_by_indd; /* One by Ld */
|
float one_by_indd; /* One by Ld */
|
||||||
float one_by_indq; /* One by Lq */
|
float one_by_indq; /* One by Lq */
|
||||||
};
|
};
|
||||||
|
@ -1513,7 +1513,7 @@ void up_timer_initialize(void);
|
|||||||
*
|
*
|
||||||
* Description:
|
* Description:
|
||||||
* Return the elapsed time since power-up (or, more correctly, since
|
* Return the elapsed time since power-up (or, more correctly, since
|
||||||
* the archtecture-specific timer was initialized). This function is
|
* the architecture-specific timer was initialized). This function is
|
||||||
* functionally equivalent to:
|
* functionally equivalent to:
|
||||||
*
|
*
|
||||||
* int clock_gettime(clockid_t clockid, FAR struct timespec *ts);
|
* int clock_gettime(clockid_t clockid, FAR struct timespec *ts);
|
||||||
@ -2103,7 +2103,7 @@ char up_romgetc(FAR const char *ptr);
|
|||||||
* Name: up_mdelay and up_udelay
|
* Name: up_mdelay and up_udelay
|
||||||
*
|
*
|
||||||
* Description:
|
* Description:
|
||||||
* Some device drivers may require that the plaform-specific logic
|
* Some device drivers may require that the platform-specific logic
|
||||||
* provides these timing loops for short delays.
|
* provides these timing loops for short delays.
|
||||||
*
|
*
|
||||||
****************************************************************************/
|
****************************************************************************/
|
||||||
@ -2211,7 +2211,7 @@ void nxsched_process_cpuload_ticks(uint32_t ticks);
|
|||||||
* Name: irq_dispatch
|
* Name: irq_dispatch
|
||||||
*
|
*
|
||||||
* Description:
|
* Description:
|
||||||
* This function must be called from the achitecture-specific logic in
|
* This function must be called from the architecture-specific logic in
|
||||||
* order to dispatch an interrupt to the appropriate, registered handling
|
* order to dispatch an interrupt to the appropriate, registered handling
|
||||||
* logic.
|
* logic.
|
||||||
*
|
*
|
||||||
|
@ -550,7 +550,7 @@
|
|||||||
/* Input Terminal Types */
|
/* Input Terminal Types */
|
||||||
|
|
||||||
#define ADC_INTERM_UNDEF 0x0200 /* Undefined Type */
|
#define ADC_INTERM_UNDEF 0x0200 /* Undefined Type */
|
||||||
#define ADC_INTERM_MIC 0x0201 /* A generic microhpone */
|
#define ADC_INTERM_MIC 0x0201 /* A generic microphone */
|
||||||
#define ADC_INTERM_DESKTOP_MIC 0x0202 /* A desktop microphone */
|
#define ADC_INTERM_DESKTOP_MIC 0x0202 /* A desktop microphone */
|
||||||
#define ADC_INTERM_PERSONAL_MIC 0x0203 /* Head-mounted or clip-on microphone */
|
#define ADC_INTERM_PERSONAL_MIC 0x0203 /* Head-mounted or clip-on microphone */
|
||||||
#define ADC_INTERM_OMNI_MIC 0x0204 /* Omni-directional microphone */
|
#define ADC_INTERM_OMNI_MIC 0x0204 /* Omni-directional microphone */
|
||||||
|
@ -113,7 +113,7 @@ strcmp:
|
|||||||
* both cases the other bits in r0 are all zero. For r3 the
|
* both cases the other bits in r0 are all zero. For r3 the
|
||||||
* interesting byte is at the other end of the word, but the
|
* interesting byte is at the other end of the word, but the
|
||||||
* other bits are not necessarily zero. We need a signed result
|
* other bits are not necessarily zero. We need a signed result
|
||||||
* representing the differnece in the unsigned bytes, so for the
|
* representing the difference in the unsigned bytes, so for the
|
||||||
* little-endian case we can't just shift the interesting bits up.
|
* little-endian case we can't just shift the interesting bits up.
|
||||||
*/
|
*/
|
||||||
#ifdef __ARMEB__
|
#ifdef __ARMEB__
|
||||||
|
@ -99,7 +99,7 @@ def_fn strcmp
|
|||||||
both cases the other bits in RESULT are all zero. For DATA2 the
|
both cases the other bits in RESULT are all zero. For DATA2 the
|
||||||
interesting byte is at the other end of the word, but the
|
interesting byte is at the other end of the word, but the
|
||||||
other bits are not necessarily zero. We need a signed result
|
other bits are not necessarily zero. We need a signed result
|
||||||
representing the differnece in the unsigned bytes, so for the
|
representing the difference in the unsigned bytes, so for the
|
||||||
little-endian case we can't just shift the interesting bits
|
little-endian case we can't just shift the interesting bits
|
||||||
up. */
|
up. */
|
||||||
#ifdef __ARM_BIG_ENDIAN
|
#ifdef __ARM_BIG_ENDIAN
|
||||||
@ -113,7 +113,7 @@ def_fn strcmp
|
|||||||
|
|
||||||
|
|
||||||
#if 0
|
#if 0
|
||||||
/* The assembly code below is based on the following alogrithm. */
|
/* The assembly code below is based on the following algorithm. */
|
||||||
#ifdef __ARM_BIG_ENDIAN
|
#ifdef __ARM_BIG_ENDIAN
|
||||||
#define RSHIFT <<
|
#define RSHIFT <<
|
||||||
#define LSHIFT >>
|
#define LSHIFT >>
|
||||||
|
@ -113,7 +113,7 @@ strcmp:
|
|||||||
* both cases the other bits in r0 are all zero. For r3 the
|
* both cases the other bits in r0 are all zero. For r3 the
|
||||||
* interesting byte is at the other end of the word, but the
|
* interesting byte is at the other end of the word, but the
|
||||||
* other bits are not necessarily zero. We need a signed result
|
* other bits are not necessarily zero. We need a signed result
|
||||||
* representing the differnece in the unsigned bytes, so for the
|
* representing the difference in the unsigned bytes, so for the
|
||||||
* little-endian case we can't just shift the interesting bits up.
|
* little-endian case we can't just shift the interesting bits up.
|
||||||
*/
|
*/
|
||||||
#ifdef __ARMEB__
|
#ifdef __ARMEB__
|
||||||
|
@ -129,7 +129,7 @@ def_fn strcmp
|
|||||||
both cases the other bits in RESULT are all zero. For DATA2 the
|
both cases the other bits in RESULT are all zero. For DATA2 the
|
||||||
interesting byte is at the other end of the word, but the
|
interesting byte is at the other end of the word, but the
|
||||||
other bits are not necessarily zero. We need a signed result
|
other bits are not necessarily zero. We need a signed result
|
||||||
representing the differnece in the unsigned bytes, so for the
|
representing the difference in the unsigned bytes, so for the
|
||||||
little-endian case we can't just shift the interesting bits
|
little-endian case we can't just shift the interesting bits
|
||||||
up. */
|
up. */
|
||||||
#ifdef __ARM_BIG_ENDIAN
|
#ifdef __ARM_BIG_ENDIAN
|
||||||
@ -143,7 +143,7 @@ def_fn strcmp
|
|||||||
|
|
||||||
|
|
||||||
#if 0
|
#if 0
|
||||||
/* The assembly code below is based on the following alogrithm. */
|
/* The assembly code below is based on the following algorithm. */
|
||||||
#ifdef __ARM_BIG_ENDIAN
|
#ifdef __ARM_BIG_ENDIAN
|
||||||
#define RSHIFT <<
|
#define RSHIFT <<
|
||||||
#define LSHIFT >>
|
#define LSHIFT >>
|
||||||
|
@ -34,12 +34,12 @@
|
|||||||
*
|
*
|
||||||
* Description:
|
* Description:
|
||||||
* The task_setcanceltype() function atomically both sets the calling
|
* The task_setcanceltype() function atomically both sets the calling
|
||||||
* task's cancelability type to the indicated type and returns the
|
* task's cancellability type to the indicated type and returns the
|
||||||
* previous cancelability type at the location referenced by oldtype
|
* previous cancellability type at the location referenced by oldtype
|
||||||
* Legal values for type are TASK_CANCEL_DEFERRED and
|
* Legal values for type are TASK_CANCEL_DEFERRED and
|
||||||
* TASK_CANCEL_ASYNCHRONOUS.
|
* TASK_CANCEL_ASYNCHRONOUS.
|
||||||
*
|
*
|
||||||
* The cancelability state and type of any newly created tasks are
|
* The cancellability state and type of any newly created tasks are
|
||||||
* TASK_CANCEL_ENABLE and TASK_CANCEL_DEFERRED respectively.
|
* TASK_CANCEL_ENABLE and TASK_CANCEL_DEFERRED respectively.
|
||||||
*
|
*
|
||||||
****************************************************************************/
|
****************************************************************************/
|
||||||
|
@ -34,7 +34,7 @@
|
|||||||
* Description:
|
* Description:
|
||||||
* The task_testcancel() function creates a cancellation point in the
|
* The task_testcancel() function creates a cancellation point in the
|
||||||
* calling thread. The task_testcancel() function has no effect if
|
* calling thread. The task_testcancel() function has no effect if
|
||||||
* cancelability is disabled
|
* cancellability is disabled
|
||||||
*
|
*
|
||||||
****************************************************************************/
|
****************************************************************************/
|
||||||
|
|
||||||
|
@ -98,7 +98,7 @@ struct arp_hdr_s
|
|||||||
uint16_t ah_hwtype; /* 16-bit Hardware type (Ethernet=0x001) */
|
uint16_t ah_hwtype; /* 16-bit Hardware type (Ethernet=0x001) */
|
||||||
uint16_t ah_protocol; /* 16-bit Protocol type (IP=0x0800) */
|
uint16_t ah_protocol; /* 16-bit Protocol type (IP=0x0800) */
|
||||||
uint8_t ah_hwlen; /* 8-bit Hardware address size (6) */
|
uint8_t ah_hwlen; /* 8-bit Hardware address size (6) */
|
||||||
uint8_t ah_protolen; /* 8-bit Procotol address size (4) */
|
uint8_t ah_protolen; /* 8-bit Protocol address size (4) */
|
||||||
uint16_t ah_opcode; /* 16-bit Operation */
|
uint16_t ah_opcode; /* 16-bit Operation */
|
||||||
uint8_t ah_shwaddr[6]; /* 48-bit Sender hardware address */
|
uint8_t ah_shwaddr[6]; /* 48-bit Sender hardware address */
|
||||||
uint16_t ah_sipaddr[2]; /* 32-bit Sender IP address */
|
uint16_t ah_sipaddr[2]; /* 32-bit Sender IP address */
|
||||||
|
@ -186,7 +186,7 @@ static int bluetooth_setup(FAR struct socket *psock)
|
|||||||
* queried.
|
* queried.
|
||||||
*
|
*
|
||||||
* Returned Value:
|
* Returned Value:
|
||||||
* The set of socket cababilities is returned.
|
* The set of socket capabilities is returned.
|
||||||
*
|
*
|
||||||
****************************************************************************/
|
****************************************************************************/
|
||||||
|
|
||||||
|
@ -583,7 +583,7 @@ int devif_loopback(FAR struct net_driver_s *dev);
|
|||||||
* pkt/ipv[4|6]_input()/...
|
* pkt/ipv[4|6]_input()/...
|
||||||
* |
|
* |
|
||||||
* |
|
* |
|
||||||
* NICs io vector receive(Orignal flat buffer)
|
* NICs io vector receive(Original flat buffer)
|
||||||
*
|
*
|
||||||
* Input Parameters:
|
* Input Parameters:
|
||||||
* callback - Input callback of L3 stack
|
* callback - Input callback of L3 stack
|
||||||
|
@ -83,7 +83,7 @@ int tcp_readahead_notifier_setup(worker_t worker,
|
|||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
/* Otherwise, this is just a simple wrapper around work_notifer_setup(). */
|
/* Otherwise, this is just a simple wrapper around work_notifier_setup(). */
|
||||||
|
|
||||||
info.evtype = WORK_TCP_READAHEAD;
|
info.evtype = WORK_TCP_READAHEAD;
|
||||||
info.qid = LPWORK;
|
info.qid = LPWORK;
|
||||||
@ -139,7 +139,7 @@ int tcp_writebuffer_notifier_setup(worker_t worker,
|
|||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
/* Otherwise, this is just a simple wrapper around work_notifer_setup(). */
|
/* Otherwise, this is just a simple wrapper around work_notifier_setup(). */
|
||||||
|
|
||||||
info.evtype = WORK_TCP_WRITEBUFFER;
|
info.evtype = WORK_TCP_WRITEBUFFER;
|
||||||
info.qid = LPWORK;
|
info.qid = LPWORK;
|
||||||
@ -192,7 +192,7 @@ int tcp_disconnect_notifier_setup(worker_t worker,
|
|||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
/* Otherwise, this is just a simple wrapper around work_notifer_setup(). */
|
/* Otherwise, this is just a simple wrapper around work_notifier_setup(). */
|
||||||
|
|
||||||
info.evtype = WORK_TCP_DISCONNECT;
|
info.evtype = WORK_TCP_DISCONNECT;
|
||||||
info.qid = LPWORK;
|
info.qid = LPWORK;
|
||||||
|
Loading…
Reference in New Issue
Block a user