STM32F746G-DISCO: Getting closer to a build
This commit is contained in:
Gregory Nutt
parent
1b341a30d8
commit
869daffefa
@ -12,8 +12,10 @@
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# CONFIG_HOST_OSX is not set
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CONFIG_HOST_WINDOWS=y
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# CONFIG_HOST_OTHER is not set
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CONFIG_WINDOWS_CYGWIN=y
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# CONFIG_WINDOWS_NATIVE is not set
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CONFIG_WINDOWS_CYGWIN=y
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# CONFIG_WINDOWS_MSYS is not set
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# CONFIG_WINDOWS_OTHER is not set
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#
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# Build Configuration
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@ -81,6 +83,7 @@ CONFIG_ARCH="arm"
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# CONFIG_ARCH_CHIP_KL is not set
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# CONFIG_ARCH_CHIP_LM is not set
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# CONFIG_ARCH_CHIP_TIVA is not set
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# CONFIG_ARCH_CHIP_LPC11XX is not set
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# CONFIG_ARCH_CHIP_LPC17XX is not set
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# CONFIG_ARCH_CHIP_LPC214X is not set
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# CONFIG_ARCH_CHIP_LPC2378 is not set
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@ -89,6 +92,7 @@ CONFIG_ARCH="arm"
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# CONFIG_ARCH_CHIP_NUC1XX is not set
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# CONFIG_ARCH_CHIP_SAMA5 is not set
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# CONFIG_ARCH_CHIP_SAMD is not set
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# CONFIG_ARCH_CHIP_SAML is not set
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# CONFIG_ARCH_CHIP_SAM34 is not set
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# CONFIG_ARCH_CHIP_SAMV7 is not set
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# CONFIG_ARCH_CHIP_STM32 is not set
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@ -132,18 +136,28 @@ CONFIG_ARMV7M_TOOLCHAIN_GNU_EABIW=y
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CONFIG_ARMV7M_HAVE_STACKCHECK=y
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# CONFIG_ARMV7M_STACKCHECK is not set
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# CONFIG_ARMV7M_ITMSYSLOG is not set
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# CONFIG_SERIAL_TERMIOS is not set
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#
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# STM32 Configuration Options
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# STM32 F7 Configuration Options
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#
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# CONFIG_ARCH_CHIP_STM32F745 is not set
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CONFIG_ARCH_CHIP_STM32F746=y
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# CONFIG_ARCH_CHIP_STM32F756 is not set
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CONFIG_STM32F7_STM32F74XX=y
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# CONFIG_STM32F7_STM32F75XX is not set
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#
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# STM32 Peripheral Support
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#
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CONFIG_STM32F7_HAVE_LTDC=y
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# CONFIG_STM32F7_ADC is not set
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# CONFIG_STM32F7_CAN is not set
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# CONFIG_STM32F7_DAC is not set
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# CONFIG_STM32F7_I2C is not set
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# CONFIG_STM32F7_SAI is not set
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# CONFIG_STM32F7_SPI is not set
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CONFIG_STM32F7_USART=y
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# CONFIG_STM32F7_ADC1 is not set
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# CONFIG_STM32F7_ADC2 is not set
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# CONFIG_STM32F7_ADC3 is not set
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@ -158,8 +172,7 @@ CONFIG_STM32F7_HAVE_LTDC=y
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# CONFIG_STM32F7_DAC2 is not set
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# CONFIG_STM32F7_DCMI is not set
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# CONFIG_STM32F7_ETHMAC is not set
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CONFIG_STM32F7_FSMC=y
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# CONFIG_STM32F7_HASH is not set
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# CONFIG_STM32F7_FSMC is not set
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# CONFIG_STM32F7_I2C1 is not set
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# CONFIG_STM32F7_I2C2 is not set
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# CONFIG_STM32F7_I2C3 is not set
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@ -169,18 +182,21 @@ CONFIG_STM32F7_FSMC=y
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# CONFIG_STM32F7_OTGHS is not set
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CONFIG_STM32F7_PWR=y
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# CONFIG_STM32F7_RNG is not set
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# CONFIG_STM32F7_SDIO is not set
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# CONFIG_STM32F7_SAI1 is not set
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# CONFIG_STM32F7_SAI2 is not set
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# CONFIG_STM32F7_SDMMC1 is not set
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# CONFIG_STM32F7_SPDIFRX is not set
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# CONFIG_STM32F7_SPI1 is not set
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# CONFIG_STM32F7_SPI2 is not set
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# CONFIG_STM32F7_SPI3 is not set
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# CONFIG_STM32F7_SPI4 is not set
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# CONFIG_STM32F7_SPI5 is not set
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# CONFIG_STM32F7_SPI6 is not set
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CONFIG_STM32F7_SYSCFG=y
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# CONFIG_STM32F7_TIM1 is not set
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# CONFIG_STM32F7_TIM2 is not set
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# CONFIG_STM32F7_TIM3 is not set
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# CONFIG_STM32F7_TIM4 is not set
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# CONFIG_STM32F7_TIM5 is not set
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# CONFIG_STM32F7_TIM6 is not set
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# CONFIG_STM32F7_TIM7 is not set
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# CONFIG_STM32F7_TIM8 is not set
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@ -190,6 +206,7 @@ CONFIG_STM32F7_SYSCFG=y
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# CONFIG_STM32F7_TIM12 is not set
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# CONFIG_STM32F7_TIM13 is not set
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# CONFIG_STM32F7_TIM14 is not set
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# CONFIG_STM32F7_TIM15 is not set
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# CONFIG_STM32F7_USART1 is not set
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# CONFIG_STM32F7_USART2 is not set
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# CONFIG_STM32F7_USART3 is not set
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@ -200,47 +217,6 @@ CONFIG_STM32F7_USART6=y
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# CONFIG_STM32F7_UART8 is not set
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# CONFIG_STM32F7_IWDG is not set
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# CONFIG_STM32F7_WWDG is not set
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# CONFIG_STM32F7_NOEXT_VECTORS is not set
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#
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# Alternate Pin Mapping
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#
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# CONFIG_STM32F7_FLASH_PREFETCH is not set
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# CONFIG_STM32F7_JTAG_DISABLE is not set
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# CONFIG_STM32F7_JTAG_FULL_ENABLE is not set
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# CONFIG_STM32F7_JTAG_NOJNTRST_ENABLE is not set
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CONFIG_STM32F7_JTAG_SW_ENABLE=y
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CONFIG_STM32F7_DISABLE_IDLE_SLEEP_DURING_DEBUG=y
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# CONFIG_STM32F7_FORCEPOWER is not set
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# CONFIG_ARCH_BOARD_STM32F7_CUSTOM_CLOCKCONFIG is not set
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CONFIG_STM32F7_FSMC_SRAM=y
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CONFIG_STM32F7_USART=y
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#
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# U[S]ART Configuration
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#
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# CONFIG_USART6_RS485 is not set
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# CONFIG_SERIAL_DISABLE_REORDERING is not set
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# CONFIG_STM32F7_FLOWCONTROL_BROKEN is not set
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# CONFIG_STM32F7_USART_SINGLEWIRE is not set
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# CONFIG_STM32F7_HAVE_RTC_COUNTER is not set
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# CONFIG_STM32F7_HAVE_RTC_SUBSECONDS is not set
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#
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# USB FS Host Configuration
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#
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#
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# USB HS Host Configuration
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#
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#
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# USB Host Debug Configuration
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#
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#
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# USB Device Configuration
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#
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#
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# Architecture Options
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@ -258,6 +234,8 @@ CONFIG_ARCH_HAVE_VFORK=y
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CONFIG_ARCH_HAVE_MPU=y
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# CONFIG_ARCH_NAND_HWECC is not set
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# CONFIG_ARCH_HAVE_EXTCLK is not set
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# CONFIG_ARCH_HAVE_POWEROFF is not set
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# CONFIG_ARCH_HAVE_RESET is not set
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# CONFIG_ARCH_USE_MPU is not set
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# CONFIG_ARCH_IRQPRIO is not set
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CONFIG_ARCH_STACKDUMP=y
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@ -458,6 +436,7 @@ CONFIG_SPI_EXCHANGE=y
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# CONFIG_VIDEO_DEVICES is not set
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# CONFIG_BCH is not set
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# CONFIG_INPUT is not set
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# CONFIG_IOEXPANDER is not set
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# CONFIG_LCD is not set
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# CONFIG_MMCSD is not set
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# CONFIG_MTD is not set
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@ -502,7 +481,6 @@ CONFIG_STANDARD_SERIAL=y
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# CONFIG_SERIAL_IFLOWCONTROL is not set
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# CONFIG_SERIAL_OFLOWCONTROL is not set
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CONFIG_ARCH_HAVE_SERIAL_TERMIOS=y
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# CONFIG_SERIAL_TERMIOS is not set
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CONFIG_USART6_SERIAL_CONSOLE=y
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# CONFIG_OTHER_SERIAL_CONSOLE is not set
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# CONFIG_NO_SERIAL_CONSOLE is not set
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@ -565,6 +543,7 @@ CONFIG_FS_MQUEUE_MPATH="/var/mqueue"
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# CONFIG_FS_SMARTFS is not set
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# CONFIG_FS_BINFS is not set
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# CONFIG_FS_PROCFS is not set
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# CONFIG_FS_UNIONFS is not set
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#
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# System Logging
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@ -633,6 +612,7 @@ CONFIG_ARCH_LOWPUTC=y
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CONFIG_LIB_SENDFILE_BUFSIZE=512
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# CONFIG_ARCH_ROMGETC is not set
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# CONFIG_ARCH_OPTIMIZED_FUNCTIONS is not set
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# CONFIG_LIBC_NETDB is not set
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#
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# Non-standard Library Support
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@ -690,7 +670,6 @@ CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
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# CONFIG_EXAMPLES_NX is not set
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# CONFIG_EXAMPLES_NXTERM is not set
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# CONFIG_EXAMPLES_NXFFS is not set
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# CONFIG_EXAMPLES_NXFLAT is not set
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# CONFIG_EXAMPLES_NXHELLO is not set
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# CONFIG_EXAMPLES_NXIMAGE is not set
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# CONFIG_EXAMPLES_NXLINES is not set
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@ -710,7 +689,6 @@ CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
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# CONFIG_EXAMPLES_SMART is not set
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# CONFIG_EXAMPLES_TCPECHO is not set
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# CONFIG_EXAMPLES_TELNETD is not set
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# CONFIG_EXAMPLES_THTTPD is not set
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# CONFIG_EXAMPLES_TIFF is not set
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# CONFIG_EXAMPLES_TOUCHSCREEN is not set
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# CONFIG_EXAMPLES_WEBSERVER is not set
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@ -742,8 +720,6 @@ CONFIG_EXAMPLES_NSH_CXXINITIALIZE=y
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# CONFIG_NETUTILS_FTPC is not set
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# CONFIG_NETUTILS_JSON is not set
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# CONFIG_NETUTILS_SMTP is not set
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# CONFIG_NETUTILS_THTTPD is not set
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# CONFIG_NETUTILS_PPPD is not set
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#
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# FreeModBus
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@ -810,6 +786,7 @@ CONFIG_NSH_DISABLE_DATE=y
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# CONFIG_NSH_DISABLE_SLEEP is not set
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# CONFIG_NSH_DISABLE_TEST is not set
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# CONFIG_NSH_DISABLE_UMOUNT is not set
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# CONFIG_NSH_DISABLE_UNAME is not set
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# CONFIG_NSH_DISABLE_UNSET is not set
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# CONFIG_NSH_DISABLE_USLEEP is not set
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# CONFIG_NSH_DISABLE_WGET is not set
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@ -858,7 +835,6 @@ CONFIG_NSH_CONSOLE=y
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# CONFIG_SYSTEM_RAMTEST is not set
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CONFIG_SYSTEM_READLINE=y
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CONFIG_READLINE_ECHO=y
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# CONFIG_SYSTEM_POWEROFF is not set
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# CONFIG_SYSTEM_RAMTRON is not set
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# CONFIG_SYSTEM_SDCARD is not set
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# CONFIG_SYSTEM_SUDOKU is not set
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@ -35,13 +35,32 @@
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*
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****************************************************************************/
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/* The STM32F746NGH6 has 1024Kb of FLASH beginning at address 0x0800:0000 and
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* 320Kb of data SRAM (in addition to ITCM SRAM). SRAM is split up into three
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* blocks:
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/* The STM32F746NGH6 has 1024Kb of main FLASH memory. This FLASH memory can
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* be accessed from either the AXIM interface at address 0x0800:0000 or from
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* the ITCM interface at address 0x0020:0000.
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*
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* 1) 64Kb of DTCM SRM beginin at address 0x2000:0000
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* 1) 240Kb of SRAM1 beginning at address 0x2001:0000
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* 2) 16Kb of SRAM2 beginning at address 0x2004:c000
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* Additional information, including the option bytes, is available at at
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* FLASH at address 0x1ff0:0000 (AXIM) or 0x0010:0000 (ITCM).
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*
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* In the STM32F746NGH6, two different boot spaces can be selected through
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* the BOOT pin and the boot base address programmed in the BOOT_ADD0 and
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* BOOT_ADD1 option bytes:
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*
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* 1) BOOT=0: Boot address defined by user option byte BOOT_ADD0[15:0].
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* ST programmed value: Flash on ITCM at 0x0020:0000
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* 2) BOOT=1: Boot address defined by user option byte BOOT_ADD1[15:0].
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* ST programmed value: System bootloader at 0x0010:0000
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*
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* NuttX does not modify these option byes. On the unmodified STM32F746G
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* DISCO board, the BOOT0 pin is at ground so by default, the STM32 will boot
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* to address 0x0020:0000 in ITCM FLASH.
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*
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* The STM32F746NGH6 also has 320Kb of data SRAM (in addition to ITCM SRAM).
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* SRAM is split up into three blocks:
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*
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* 1) 64Kb of DTCM SRM begining at address 0x2000:0000
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* 2) 240Kb of SRAM1 beginning at address 0x2001:0000
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* 3) 16Kb of SRAM2 beginning at address 0x2004:c000
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*
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* When booting from FLASH, FLASH memory is aliased to address 0x0000:0000
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* where the code expects to begin execution by jumping to the entry point in
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@ -51,11 +70,11 @@
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MEMORY
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{
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itcm (rwx) : ORIGIN = 0x00000000, LENGTH = 64K
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flash (rx) : ORIGIN = 0x08000000, LENGTH = 2048K
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dtcm (rwx) : ORIGIN = 0x20000000, LENGTH = 64K
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sram1 (rwx) : ORIGIN = 0x20010000, LENGTH = 240K
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sram2 (rwx) : ORIGIN = 0x2004c000, LENGTH = 16K
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itcm (rwx) : ORIGIN = 0x00200000, LENGTH = 1024K
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flash (rx) : ORIGIN = 0x08000000, LENGTH = 1024K
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dtcm (rwx) : ORIGIN = 0x20000000, LENGTH = 64K
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sram1 (rwx) : ORIGIN = 0x20010000, LENGTH = 240K
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sram2 (rwx) : ORIGIN = 0x2004c000, LENGTH = 16K
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}
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OUTPUT_ARCH(arm)
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@ -44,7 +44,7 @@
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#include <nuttx/board.h>
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#include "stm32f7-gpio.h"
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#include "stm32_gpio.h"
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#include "stm32f746g-disco.h"
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#ifdef CONFIG_ARCH_LEDS
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@ -43,7 +43,7 @@
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#include <nuttx/arch.h>
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#include <arch/stm32/chip.h>
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#include <arch/stm32f7/chip.h>
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#include "chip.h"
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#if defined(CONFIG_HAVE_CXX) && defined(CONFIG_HAVE_CXXINITIALIZE)
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@ -42,7 +42,7 @@
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#include <stdbool.h>
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#include <debug.h>
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#include "stm32-gpio.h"
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#include "stm32_gpio.h"
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#include "stm32f746g-disco.h"
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#ifndef CONFIG_ARCH_LEDS
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