Squashed commit of the following:
arch/arm/src/max326xx/max32660/max32660_spim.c: SPI0 master mode support is complete (sans DMA and completely untested). configs/max32660-evsys/src: Add framework for SPI support.
arch/arm/src/max326xx/max32660/max32660_spim.c: Fleshes out some of the data transfer logic. More needs to be done. Also removes leveraged DMA support. It will be a long time (if ever) before DMA is supported. No point in dragging all of that bogus logic around.
This commit is contained in:
Gregory Nutt
parent
26712ef060
commit
86a67fa3e8
@ -416,3 +416,19 @@ config MAX326XX_DMA
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config MAX326XX_GPIOIRQ
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bool "GPIO Interrupt Support"
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default n
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menu "SPI Master Configuration"
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depends on MAX326XX_HAVE_SPIM
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if MAX326XX_SPIM0
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config MAX326XX_3WIRE
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bool "SP0 3-pin mode"
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default n
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---help---
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By default, 4-pin mode is supported(MISO, MOSI, SCK, SS). Selecting
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this option enables 3-pin mode (MOSI, SCK, SS).
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endif # MAX326XX_SPIM0
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endmenu # SPI Master Configuration
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@ -47,6 +47,8 @@
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* Pre-processor Definitions
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************************************************************************************/
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#define MAX326_SPI_FIFO_DEPTH 32
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/* Register Offsets *****************************************************************/
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#define MAX326_SPI_DATA_OFFSET 0x0000 /* SPI FIFO Data Register */
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@ -147,7 +149,7 @@
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#define SPI_DMA_TXFIFOLVL_SHIFT (0) /* Bits 0-4: TX FIFO Threshold Level */
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#define SPI_DMA_TXFIFOLVL_MASK (0x1f << SPI_DMA_TXFIFOLVL_SHIFT)
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# define SPI_DMA_TXFIFOLVL(n) ((uint32_t)(n) << SPI_DMA_TXFIFOLVL_SHIFT)
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# define SPI_DMA_TXFIFOLVL(n) ((uint32_t)((n) & 0x1f) << SPI_DMA_TXFIFOLVL_SHIFT)
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#define SPI_DMA_TXFIFOEN (1 << 6) /* Bit 6: TX FIFO Enabled */
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#define SPI_DMA_TXFIFOCLR (1 << 7) /* Bit 7: Clear the TX FIFO */
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#define SPI_DMA_TXFIFOCNT_SHIFT (8) /* Bits 8-13: Number of Bytes in the TX
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@ -156,7 +158,7 @@
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#define SPI_DMA_TXDMAEN (1 << 15) /* Bit 15: TX DMA Enable */
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#define SPI_DMA_RXFIFOLVL_SHIFT (16) /* Bits 16-20: RX FIFO Threshold Level */
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#define SPI_DMA_RXFIFOLVL_MASK (0x1f << SPI_DMA_RXFIFOLVL_SHIFT)
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# define SPI_DMA_RXFIFOLVL(n) ((uint32_t)(n) << SPI_DMA_RXFIFOLVL_SHIFT)
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# define SPI_DMA_RXFIFOLVL(n) ((uint32_t)((n) & 0x1f) << SPI_DMA_RXFIFOLVL_SHIFT)
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#define SPI_DMA_RXFIFOEN (1 << 22) /* Bit 22: RX FIFO Enabled */
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#define SPI_DMA_RXFIFOCLR (1 << 23) /* Bit 23: Clear the RX FIFO */
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#define SPI_DMA_RXFIFOCNT_SHIFT (24) /* Bits 24-29: Number of Bytes in the RX
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File diff suppressed because it is too large
Load Diff
@ -54,7 +54,7 @@ ifeq ($(CONFIG_ARCH_BUTTONS),y)
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CSRCS += max326_button.c
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endif
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ifeq ($(CONFIG_MAX326XX_HAVE_I2CM),y)
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ifeq ($(CONFIG_MAX326XX_HAVE_SPIM),y)
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CSRCS += max326_spi.c
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endif
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@ -83,4 +83,16 @@
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int max326_bringup(void);
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/************************************************************************************
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* Name: max326_spidev_initialize
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*
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* Description:
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* Called to configure SPI chip select GPIO pins for the MAX3660-EVSYS board.
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*
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************************************************************************************/
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#ifdef CONFIG_MAX326XX_HAVE_SPIM
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void max326_spidev_initialize(void);
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#endif
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#endif /* __CONFIG_NUCLEO_F303ZE_INCLUDE_BOARD_H */
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@ -69,6 +69,12 @@
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void max326_board_initialize(void)
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{
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#ifdef CONFIG_MAX326XX_HAVE_SPIM
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/* Configure SPI chip select pins */
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max326_spidev_initialize();
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#endif
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#ifdef CONFIG_ARCH_LEDS
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/* Configure on-board LEDs if LED support has been selected. */
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172
configs/max32660-evsys/src/max326_spi.c
Normal file
172
configs/max32660-evsys/src/max326_spi.c
Normal file
@ -0,0 +1,172 @@
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/************************************************************************************
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* configs/max32660-evsys/src/ma326_spi.c
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*
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* Copyright (C) 2018 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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************************************************************************************/
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/************************************************************************************
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* Included Files
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************************************************************************************/
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#include <nuttx/config.h>
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#include <stdint.h>
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#include <stdbool.h>
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#include <errno.h>
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#include <debug.h>
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#include <nuttx/spi/spi.h>
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#include <arch/board/board.h>
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#include "up_arch.h"
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#include "max326_spim.h"
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#include "max32660-evsys.h"
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#ifdef CONFIG_MAX326XX_HAVE_SPIM
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/************************************************************************************
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* Public Functions
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************************************************************************************/
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/************************************************************************************
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* Name: max326_spidev_initialize
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*
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* Description:
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* Called to configure SPI chip select GPIO pins for the MAX3660-EVSYS board.
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*
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************************************************************************************/
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void max326_spidev_initialize(void)
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{
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#ifdef CONFIG_MAX326XX_SPIM0
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#endif
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#ifdef CONFIG_MAX326XX_SPIM1
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#endif
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}
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/****************************************************************************
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* Name: max326_spi0/1select and max326_spi0/1status
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*
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* Description:
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* The external functions, max326_spi0/1select and max326_spi0/1status must be
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* provided by board-specific logic. They are implementations of the select
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* and status methods of the SPI interface defined by struct spi_ops_s (see
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* include/nuttx/spi/spi.h). All other methods (including max326_spibus_initialize())
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* are provided by common STM32 logic. To use this common SPI logic on your
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* board:
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*
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* 1. Provide logic in max326_boardinitialize() to configure SPI chip select
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* pins.
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* 2. Provide max326_spi0/1select() and max326_spi0/1status() functions in your
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* board-specific logic. These functions will perform chip selection and
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* status operations using GPIOs in the way your board is configured.
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* 3. Add a calls to max326_spibus_initialize() in your low level application
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* initialization logic
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* 4. The handle returned by max326_spibus_initialize() may then be used to bind the
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* SPI driver to higher level logic (e.g., calling
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* mmcsd_spislotinitialize(), for example, will bind the SPI driver to
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* the SPI MMC/SD driver).
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*
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****************************************************************************/
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#ifdef CONFIG_MAX326XX_SPIM0
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void max326_spi0select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected)
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{
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spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
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}
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uint8_t max326_spi0status(FAR struct spi_dev_s *dev, uint32_t devid)
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{
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return 0;
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}
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#endif
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#ifdef CONFIG_MAX326XX_SPIM1
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void max326_spi1select(FAR struct spi_dev_s *dev, uint32_t devid, bool selected)
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{
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spiinfo("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
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}
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uint8_t max326_spi1status(FAR struct spi_dev_s *dev, uint32_t devid)
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{
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return 0;
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}
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#endif
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/****************************************************************************
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* Name: max326_spi0/1cmddata
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*
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* Description:
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* Set or clear the SH1101A A0 or SD1306 D/C n bit to select data (true)
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* or command (false). This function must be provided by platform-specific
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* logic. This is an implementation of the cmddata method of the SPI
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* interface defined by struct spi_ops_s (see include/nuttx/spi/spi.h).
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*
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* Input Parameters:
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*
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* spi - SPI device that controls the bus the device that requires the CMD/
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* DATA selection.
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* devid - If there are multiple devices on the bus, this selects which one
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* to select cmd or data. NOTE: This design restricts, for example,
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* one one SPI display per SPI bus.
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* cmd - true: select command; false: select data
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*
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* Returned Value:
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* None
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*
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****************************************************************************/
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#ifdef CONFIG_SPI_CMDDATA
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#ifdef CONFIG_MAX326XX_SPIM0
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int max326_spi0cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd)
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{
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return -ENODEV;
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}
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#endif
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#ifdef CONFIG_MAX326XX_SPIM1
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int max326_spi1cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd)
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{
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return -ENODEV;
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}
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#endif
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#ifdef CONFIG_STM32_SPI3
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int max326_spi3cmddata(FAR struct spi_dev_s *dev, uint32_t devid, bool cmd)
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{
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return -ENODEV;
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}
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#endif
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#endif /* CONFIG_SPI_CMDDATA */
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#endif /* CONFIG_MAX326XX_HAVE_SPIM */
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