diff --git a/arch/risc-v/include/arch.h b/arch/risc-v/include/arch.h
index 1a71fd5371..b68fe154e7 100644
--- a/arch/risc-v/include/arch.h
+++ b/arch/risc-v/include/arch.h
@@ -39,10 +39,38 @@
  * Pre-processor Definitions
  ****************************************************************************/
 
+#ifdef __ASSEMBLY__
+#  define __STR(s)  s
+#else
+#  define __STR(s)  #s
+#endif
+#define __XSTR(s)   __STR(s)
+
+#if defined(CONFIG_ARCH_QPFPU)
+#  define FLOAD     __STR(flq)
+#  define FSTORE    __STR(fsq)
+#elif defined(CONFIG_ARCH_DPFPU)
+#  define FLOAD     __STR(fld)
+#  define FSTORE    __STR(fsd)
+#else
+#  define FLOAD     __STR(flw)
+#  define FSTORE    __STR(fsw)
+#endif
+
+#ifdef CONFIG_ARCH_RV32
+#  define REGLOAD   __STR(lw)
+#  define REGSTORE  __STR(sw)
+#else
+#  define REGLOAD   __STR(ld)
+#  define REGSTORE  __STR(sd)
+#endif
+
 /****************************************************************************
  * Inline functions
  ****************************************************************************/
 
+#ifndef __ASSEMBLY__
+
 /****************************************************************************
  * Name: up_getsp
  ****************************************************************************/
@@ -58,6 +86,8 @@ static inline uintptr_t up_getsp(void)
   return sp;
 }
 
+#endif
+
 /****************************************************************************
  * Public Types
  ****************************************************************************/
diff --git a/arch/risc-v/include/irq.h b/arch/risc-v/include/irq.h
index 21c5f8bd81..dd972223e0 100644
--- a/arch/risc-v/include/irq.h
+++ b/arch/risc-v/include/irq.h
@@ -35,7 +35,6 @@
 
 #include <arch/types.h>
 
-#include <nuttx/irq.h>
 #include <arch/csr.h>
 #include <arch/chip/irq.h>
 
diff --git a/arch/risc-v/src/common/riscv_exception_common.S b/arch/risc-v/src/common/riscv_exception_common.S
index 5db9dbcb5f..3daa5ce089 100644
--- a/arch/risc-v/src/common/riscv_exception_common.S
+++ b/arch/risc-v/src/common/riscv_exception_common.S
@@ -23,9 +23,9 @@
  ****************************************************************************/
 
 #include <nuttx/config.h>
-#include <arch/irq.h>
 
-#include "riscv_internal.h"
+#include <arch/arch.h>
+#include <arch/irq.h>
 
 /****************************************************************************
  * Pre-processor Definitions
diff --git a/arch/risc-v/src/common/riscv_fpu.S b/arch/risc-v/src/common/riscv_fpu.S
index 7b5fc58398..2d3de5b18c 100644
--- a/arch/risc-v/src/common/riscv_fpu.S
+++ b/arch/risc-v/src/common/riscv_fpu.S
@@ -24,10 +24,9 @@
 
 #include <nuttx/config.h>
 
+#include <arch/arch.h>
 #include <arch/irq.h>
 
-#include "riscv_internal.h"
-
 #ifdef CONFIG_ARCH_FPU
 
 /************************************************************************************
diff --git a/arch/risc-v/src/common/riscv_internal.h b/arch/risc-v/src/common/riscv_internal.h
index 3bd0542e51..34317d7fcc 100644
--- a/arch/risc-v/src/common/riscv_internal.h
+++ b/arch/risc-v/src/common/riscv_internal.h
@@ -38,32 +38,6 @@
  * Pre-processor Definitions
  ****************************************************************************/
 
-#ifdef __ASSEMBLY__
-#  define __STR(s)  s
-#else
-#  define __STR(s)  #s
-#endif
-#define __XSTR(s)   __STR(s)
-
-#if defined(CONFIG_ARCH_QPFPU)
-#  define FLOAD     __STR(flq)
-#  define FSTORE    __STR(fsq)
-#elif defined(CONFIG_ARCH_DPFPU)
-#  define FLOAD     __STR(fld)
-#  define FSTORE    __STR(fsd)
-#else
-#  define FLOAD     __STR(flw)
-#  define FSTORE    __STR(fsw)
-#endif
-
-#ifdef CONFIG_ARCH_RV32
-#  define REGLOAD   __STR(lw)
-#  define REGSTORE  __STR(sw)
-#else
-#  define REGLOAD   __STR(ld)
-#  define REGSTORE  __STR(sd)
-#endif
-
 /* This is the value used to mark the stack for subsequent stack monitoring
  * logic.
  */
diff --git a/arch/risc-v/src/common/riscv_signal_handler.S b/arch/risc-v/src/common/riscv_signal_handler.S
index d7dcea06b8..cd3e66302d 100644
--- a/arch/risc-v/src/common/riscv_signal_handler.S
+++ b/arch/risc-v/src/common/riscv_signal_handler.S
@@ -24,6 +24,7 @@
 
 #include <nuttx/config.h>
 
+#include <arch/arch.h>
 #include <arch/syscall.h>
 
 #include "riscv_internal.h"
diff --git a/arch/risc-v/src/qemu-rv/qemu_rv_head.S b/arch/risc-v/src/qemu-rv/qemu_rv_head.S
index 3dd82652c6..7c2bba94ca 100644
--- a/arch/risc-v/src/qemu-rv/qemu_rv_head.S
+++ b/arch/risc-v/src/qemu-rv/qemu_rv_head.S
@@ -23,6 +23,8 @@
  ****************************************************************************/
 
 #include <nuttx/config.h>
+
+#include <arch/arch.h>
 #include <arch/irq.h>
 
 #include "chip.h"