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arch/arm/src/am335x/ and boards/arm/am335x/beaglebone-black/: Initial CAN support for the BBB.

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This commit is contained in:
Petro Karashchenko 2019-12-15 17:12:54 -06:00 committed by Gregory Nutt
parent ca4e6077e2
commit 871197b4ec
10 changed files with 1328 additions and 45 deletions
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31
arch/arm/src/am335x/Kconfig
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@ -133,8 +133,16 @@ config AM335X_MMC2
bool "MMC/SD/SDIO0 High Speed Host Controller 2"
default n
config AM335X_I2C
bool
config AM335X_I2C0
bool "Multi-master I2C Controller 0"
default n
config AM335X_I2C1
bool "Multi-master I2C Controller 1"
default n
config AM335X_I2C2
bool "Multi-master I2C Controller 2"
default n
config AM335X_MCASP0
@ -353,23 +361,4 @@ config AM335X_LCDC_PIXCLK_INVERT
endmenu # LCD Configuration
menu "I2C Peripherals"
menuconfig AM335X_I2C0
bool "Multi-master I2C Controller 0"
default n
select AM335X_I2C
menuconfig AM335X_I2C1
bool "Multi-master I2C Controller 1"
default n
select AM335X_I2C
menuconfig AM335X_I2C2
bool "Multi-master I2C Controller 2"
default n
select AM335X_I2C
endmenu # I2C Peripherals
endif # ARCH_CHIP_AM335X

6
arch/arm/src/am335x/Make.defs
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@ -126,7 +126,7 @@ CHIP_ASRCS =
CHIP_CSRCS = am335x_boot.c am335x_clockconfig.c am335x_pinmux.c am335x_irq.c
CHIP_CSRCS += am335x_gpio.c am335x_lowputc.c am335x_serial.c am335x_wdog.c
CHIP_CSRCS += am335x_sysclk.c
CHIP_CSRCS += am335x_sysclk.c am335x_i2c.c am335x_can.c
ifneq ($(CONFIG_SCHED_TICKLESS),y)
CHIP_CSRCS += am335x_timerisr.c
@ -139,7 +139,3 @@ endif
ifeq ($(CONFIG_AM335X_LCDC),y)
CHIP_CSRCS += am335x_lcdc.c am335x_edid.c
endif
ifeq ($(CONFIG_AM335X_I2C),y)
CHIP_CSRCS += am335x_i2c.c
endif

1155
arch/arm/src/am335x/am335x_can.c Normal file
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File diff suppressed because it is too large Load Diff

86
arch/arm/src/am335x/am335x_can.h Normal file
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@ -0,0 +1,86 @@
/****************************************************************************
* arch/arm/src/am335x/am335x_can.h
*
* Copyright (C) 2019 Petro Karashchenko. All rights reserved.
* Author: Petro Karashchenko <petro.karashchenko@gmail.com>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
****************************************************************************/
#ifndef __ARCH_ARM_SRC_AM335X_AM335X_CAN_H
#define __ARCH_ARM_SRC_AM335X_AM335X_CAN_H
/****************************************************************************
* Included Files
****************************************************************************/
#include <nuttx/config.h>
#include <nuttx/can/can.h>
#include "chip.h"
#include "hardware/am335x_dcan.h"
/****************************************************************************
* Public Function Prototypes
****************************************************************************/
/****************************************************************************
* Name: am335x_can_initialize
*
* Description:
* Initialize the selected CAN port
*
* Input Parameters:
* Port number (for hardware that has multiple CAN interfaces)
*
* Returned Value:
* Valid CAN device structure reference on success; a NULL on failure
*
****************************************************************************/
FAR struct can_dev_s *am335x_can_initialize(int port);
/****************************************************************************
* Name: am335x_can_uninitialize
*
* Description:
* De-initialize the selected CAN port, and power down the device.
*
* Input Parameters:
* Device structure as returned by the am335x_can_initialize()
*
* Returned Value:
* OK on success, ERROR when internal reference count mismatch or dev
* points to invalid hardware device.
*
****************************************************************************/
void am335x_can_uninitialize(FAR struct can_dev_s *dev);
#endif /* __ARCH_ARM_SRC_AM335X_AM335X_CAN_H */

4
arch/arm/src/am335x/am335x_clockconfig.c
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@ -372,7 +372,7 @@ static void am335x_peripheral_enable(void)
per_l4ls |= CM_PER_L4LS_CLKSTCTRL_UART_GCLK;
#endif
#if defined(CONFIG_AM335X_DCAN0)
#if defined(CONFIG_AM335X_CAN0)
putreg32(CM_CLKCTRL_MODULEMODE_ENABLE, AM335X_CM_PER_DCAN0_CLKCTRL);
while ((getreg32(AM335X_CM_PER_DCAN0_CLKCTRL) &
(CM_CLKCTRL_MODULEMODE_MASK | CM_CLKCTRL_IDLEST_MASK))
@ -383,7 +383,7 @@ static void am335x_peripheral_enable(void)
per_l4ls |= CM_PER_L4LS_CLKSTCTRL_CAN_CLK;
#endif
#if defined(CONFIG_AM335X_DCAN1)
#if defined(CONFIG_AM335X_CAN1)
putreg32(CM_CLKCTRL_MODULEMODE_ENABLE, AM335X_CM_PER_DCAN1_CLKCTRL);
while ((getreg32(AM335X_CM_PER_DCAN1_CLKCTRL) &
(CM_CLKCTRL_MODULEMODE_MASK | CM_CLKCTRL_IDLEST_MASK))

12
arch/arm/src/am335x/hardware/am3358_pinmux.h
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@ -568,16 +568,16 @@
/* CAN */
#define GPIO_DCAN0_RX_1 (GPIO_PERIPH | GPIO_PADCTL(AM335X_PADCTL_MII1_TXD2_INDEX) | PINMUX_MODE1 | PINMUX_RX_ENABLE)
#define GPIO_DCAN0_RX_2 (GPIO_PERIPH | GPIO_PADCTL(AM335X_PADCTL_UART0_TXD_INDEX) | PINMUX_MODE2 | PINMUX_RX_ENABLE)
#define GPIO_DCAN0_RX_3 (GPIO_PERIPH | GPIO_PADCTL(AM335X_PADCTL_UART1_RTSN_INDEX) | PINMUX_MODE2 | PINMUX_RX_ENABLE)
#define GPIO_DCAN0_RX_1 (GPIO_PERIPH | GPIO_PADCTL(AM335X_PADCTL_MII1_TXD2_INDEX) | PINMUX_MODE1 | PINMUX_RX_ENABLE | PINMUX_PULL_TYPE_UP)
#define GPIO_DCAN0_RX_2 (GPIO_PERIPH | GPIO_PADCTL(AM335X_PADCTL_UART0_TXD_INDEX) | PINMUX_MODE2 | PINMUX_RX_ENABLE | PINMUX_PULL_TYPE_UP)
#define GPIO_DCAN0_RX_3 (GPIO_PERIPH | GPIO_PADCTL(AM335X_PADCTL_UART1_RTSN_INDEX) | PINMUX_MODE2 | PINMUX_RX_ENABLE | PINMUX_PULL_TYPE_UP)
#define GPIO_DCAN0_TX_1 (GPIO_PERIPH | GPIO_PADCTL(AM335X_PADCTL_MII1_TXD3_INDEX) | PINMUX_MODE1)
#define GPIO_DCAN0_TX_2 (GPIO_PERIPH | GPIO_PADCTL(AM335X_PADCTL_UART0_RXD_INDEX) | PINMUX_MODE2)
#define GPIO_DCAN0_TX_3 (GPIO_PERIPH | GPIO_PADCTL(AM335X_PADCTL_UART1_CTSN_INDEX) | PINMUX_MODE2)
#define GPIO_DCAN1_RX_1 (GPIO_PERIPH | GPIO_PADCTL(AM335X_PADCTL_MMC0_CMD_INDEX) | PINMUX_MODE4 | PINMUX_RX_ENABLE)
#define GPIO_DCAN1_RX_2 (GPIO_PERIPH | GPIO_PADCTL(AM335X_PADCTL_UART0_RTSN_INDEX) | PINMUX_MODE2 | PINMUX_RX_ENABLE)
#define GPIO_DCAN1_RX_3 (GPIO_PERIPH | GPIO_PADCTL(AM335X_PADCTL_UART1_TXD_INDEX) | PINMUX_MODE2 | PINMUX_RX_ENABLE)
#define GPIO_DCAN1_RX_1 (GPIO_PERIPH | GPIO_PADCTL(AM335X_PADCTL_MMC0_CMD_INDEX) | PINMUX_MODE4 | PINMUX_RX_ENABLE | PINMUX_PULL_TYPE_UP)
#define GPIO_DCAN1_RX_2 (GPIO_PERIPH | GPIO_PADCTL(AM335X_PADCTL_UART0_RTSN_INDEX) | PINMUX_MODE2 | PINMUX_RX_ENABLE | PINMUX_PULL_TYPE_UP)
#define GPIO_DCAN1_RX_3 (GPIO_PERIPH | GPIO_PADCTL(AM335X_PADCTL_UART1_TXD_INDEX) | PINMUX_MODE2 | PINMUX_RX_ENABLE | PINMUX_PULL_TYPE_UP)
#define GPIO_DCAN1_TX_1 (GPIO_PERIPH | GPIO_PADCTL(AM335X_PADCTL_MMC0_CLK_INDEX) | PINMUX_MODE4)
#define GPIO_DCAN1_TX_2 (GPIO_PERIPH | GPIO_PADCTL(AM335X_PADCTL_UART0_CTSN_INDEX) | PINMUX_MODE2)
#define GPIO_DCAN1_TX_3 (GPIO_PERIPH | GPIO_PADCTL(AM335X_PADCTL_UART1_RXD_INDEX) | PINMUX_MODE2)

16
arch/arm/src/am335x/hardware/am335x_dcan.h
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@ -47,7 +47,7 @@
* Pre-processor Definitions
********************************************************************************************/
/* Register offsets *****************************************************************/
/* Register offsets *************************************************************************/
#define AM335X_DCAN_CTL_OFFSET 0x0000 /* CAN Control Register */
#define AM335X_DCAN_ES_OFFSET 0x0004 /* Error and Status Register */
@ -119,7 +119,7 @@
#define AM335X_DCAN_IFDATB_OFFSET(n) (0x0114 + ((unsigned int)(n) - 1) * 0x20)
#define AM335X_DCAN_IF3UPD_OFFSET(n) (0x0160 + ((((unsigned int)(n) - 1) >> 5) << 2))
/* Register virtual addresses *******************************************************/
/* Register virtual addresses ***************************************************************/
#define AM335X_DCAN0_CTL (AM335X_DCAN0_VADDR + AM335X_DCAN_CTL_OFFSET)
#define AM335X_DCAN0_ES (AM335X_DCAN0_VADDR + AM335X_DCAN_ES_OFFSET)
@ -261,7 +261,7 @@
#define AM335X_DCAN1_IFDATB(n) (AM335X_DCAN1_VADDR + AM335X_DCAN_IFDATB_OFFSET(n))
#define AM335X_DCAN1_IF3UPD(n) (AM335X_DCAN1_VADDR + AM335X_DCAN_IF3UPD_OFFSET(n))
/* Register bit field definitions ***************************************************/
/* Register bit field definitions ***********************************************************/
#define DCAN_CTL_INIT (1 << 0) /* Bit 0: Initialization mode */
#define DCAN_CTL_IE0 (1 << 1) /* Bit 1: Interrupt line 0 enable */
@ -323,6 +323,7 @@
#define DCAN_INT_LINE0_SHIFT (0) /* Bits 0-15: Interrupt Line 0 Identifier */
#define DCAN_INT_LINE0_MASK (65535 << DCAN_INT_LINE0_SHIFT)
# define DCAN_INT_LINE0_STATUS (32768 << DCAN_INT_LINE0_SHIFT)
#define DCAN_INT_LINE1_SHIFT (16) /* Bits 16-23: Interrupt Line 1 Identifier */
#define DCAN_INT_LINE1_MASK (255 << DCAN_INT_LINE1_SHIFT)
@ -356,13 +357,14 @@
#define DCAN_IFCMD_MSG_NUM_SHIFT (0) /* Bits 0-7: Number of message object in message RAM which is used for data transfer */
#define DCAN_IFCMD_MSG_NUM_MASK (0xff << DCAN_IFCMD_MSG_NUM_SHIFT)
# define DCAN_IFCMD_MSG_NUM(n) (((unsigned int)(n) & DCAN_IFCMD_MSG_NUM_MASK) << DCAN_IFCMD_MSG_NUM_SHIFT)
#define DCAN_IFCMD_DMA_ACTIVE (1 << 14) /* Bit 14: Activation of DMA feature for subsequent internal IF update */
#define DCAN_IFCMD_BUSY (1 << 15) /* Bit 15: Busy flag */
#define DCAN_IFCMD_DATA_B (1 << 16) /* Bit 16: Access Data Bytes 4 to 7 */
#define DCAN_IFCMD_DATA_A (1 << 17) /* Bit 17: Access Data Bytes 0 to 3 */
#define DCAN_IFCMD_DATAB (1 << 16) /* Bit 16: Access Data Bytes 4 to 7 */
#define DCAN_IFCMD_DATAA (1 << 17) /* Bit 17: Access Data Bytes 0 to 3 */
#define DCAN_IFCMD_TX_RQST_NEWDAT (1 << 18) /* Bit 18: Access transmission request bit */
#define DCAN_IFCMD_CLR_INTPND (1 << 19) /* Bit 19: Clear interrupt pending bit */
#define DCAN_IFCMD_CONTROL (1 << 20) /* Bit 20: Access control bits */
#define DCAN_IFCMD_CTL (1 << 20) /* Bit 20: Access control bits */
#define DCAN_IFCMD_ARB (1 << 21) /* Bit 21: Access arbitration bits */
#define DCAN_IFCMD_MASK (1 << 22) /* Bit 22: Access mask bits */
#define DCAN_IFCMD_WR_RD (1 << 23) /* Bit 23: Write/Read direction */
@ -373,7 +375,7 @@
#define DCAN_IFMSK_MXTD (1 << 31) /* Bit 31: Mask extended identifier */
#define DCAN_IFARB_ID_SHIFT (0) /* Bits 0-28: Message identifier */
#define DCAN_IFARB_ID_MASK (0x1fffffff << DCAN_IFCMD_MSK_SHIFT)
#define DCAN_IFARB_ID_MASK (0x1fffffff << DCAN_IFARB_ID_SHIFT)
#define DCAN_IFARB_DIR (1 << 29) /* Bit 29: Message direction */
#define DCAN_IFARB_XTD (1 << 30) /* Bit 30: Extended identifier */
#define DCAN_IFARB_MSG_VAL (1 << 31) /* Bit 31: Message valid */

8
boards/arm/am335x/beaglebone-black/include/board.h
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@ -138,6 +138,14 @@
#define GPIO_I2C2_SCL GPIO_I2C2_SCL_1
#define GPIO_I2C2_SCL GPIO_I2C2_SDA_1
/* CANs *********************************************************************/
#define GPIO_DCAN0_RX GPIO_DCAN0_RX_3
#define GPIO_DCAN0_TX GPIO_DCAN0_TX_3
#define GPIO_DCAN1_RX GPIO_DCAN1_RX_3
#define GPIO_DCAN1_TX GPIO_DCAN1_TX_3
/****************************************************************************
* Assembly Language Macros
****************************************************************************/

4
boards/arm/am335x/beaglebone-black/src/Makefile
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@ -44,10 +44,6 @@ ifeq ($(CONFIG_LIB_BOARDCTL),y)
CSRCS += am335x_appinit.c
endif
ifeq ($(CONFIG_CAN),y)
CSRCS += am335x_can.c
endif
ifeq ($(CONFIG_ARCH_BUTTONS),y)
CSRCS += am335x_buttons.c
endif

51
boards/arm/am335x/beaglebone-black/src/am335x_bringup.c
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@ -49,6 +49,7 @@
#include "beaglebone-black.h"
#include "am335x_i2c.h"
#include "am335x_can.h"
/****************************************************************************
* Private Functions
@ -78,6 +79,52 @@ static void am335x_i2c_register(int bus)
}
#endif
#if defined(CONFIG_CAN) && (defined(CONFIG_AM335X_CAN0) || defined(CONFIG_AM335X_CAN1))
static void am335x_can_register(void)
{
FAR struct can_dev_s *can;
int ret;
#ifdef CONFIG_AM335X_CAN0
can = am335x_can_initialize(0);
if (can == NULL)
{
syslog(LOG_ERR, "Failed to get DCAN0 interface\n");
}
else
{
ret = can_register("/dev/can0", can);
if (ret < 0)
{
syslog(LOG_ERR, "can_register failed: %d\n", ret);
am335x_can_uninitialize(can);
}
}
#endif
#ifdef CONFIG_AM335X_CAN1
can = am335x_can_initialize(1);
if (can == NULL)
{
syslog(LOG_ERR, "Failed to get DCAN1 interface\n");
}
else
{
#ifdef CONFIG_AM335X_CAN0
ret = can_register("/dev/can1", can);
#else
ret = can_register("/dev/can0", can);
#endif
if (ret < 0)
{
syslog(LOG_ERR, "can_register failed: %d\n", ret);
am335x_can_uninitialize(can);
}
}
#endif
}
#endif
/****************************************************************************
* Public Functions
****************************************************************************/
@ -132,6 +179,10 @@ int am335x_bringup(void)
am335x_i2c_register(2);
#endif
#if defined(CONFIG_CAN) && (defined(CONFIG_AM335X_CAN0) || defined(CONFIG_AM335X_CAN1))
am335x_can_register();
#endif
UNUSED(ret);
return ret;
}