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STM32L4 TIM: TIM15,16,17 are always in APB2

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This commit is contained in:
Juha Niskanen 2017-08-25 07:02:21 -06:00 committed by Gregory Nutt
parent 3d2498bedd
commit 874947d7e5
7 changed files with 40 additions and 26 deletions
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6
arch/arm/src/stm32l4/stm32l4_adc.h
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@ -177,7 +177,7 @@
#elif defined(CONFIG_STM32L4_TIM15_ADC1)
# define ADC1_HAVE_TIMER 1
# define ADC1_TIMER_BASE STM32L4_TIM15_BASE
# define ADC1_TIMER_PCLK_FREQUENCY STM32L4_APB1_TIM15_CLKIN
# define ADC1_TIMER_PCLK_FREQUENCY STM32L4_APB2_TIM15_CLKIN
#else
# undef ADC1_HAVE_TIMER
#endif
@ -219,7 +219,7 @@
#elif defined(CONFIG_STM32L4_TIM15_ADC2)
# define ADC2_HAVE_TIMER 1
# define ADC2_TIMER_BASE STM32L4_TIM15_BASE
# define ADC2_TIMER_PCLK_FREQUENCY STM32L4_APB1_TIM15_CLKIN
# define ADC2_TIMER_PCLK_FREQUENCY STM32L4_APB2_TIM15_CLKIN
#else
# undef ADC2_HAVE_TIMER
#endif
@ -261,7 +261,7 @@
#elif defined(CONFIG_STM32L4_TIM15_ADC3)
# define ADC3_HAVE_TIMER 1
# define ADC3_TIMER_BASE STM32L4_TIM15_BASE
# define ADC3_TIMER_PCLK_FREQUENCY STM32L4_APB1_TIM15_CLKIN
# define ADC3_TIMER_PCLK_FREQUENCY STM32L4_APB2_TIM15_CLKIN
#else
# undef ADC3_HAVE_TIMER
#endif

6
arch/arm/src/stm32l4/stm32l4_pwm.c
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@ -548,7 +548,7 @@ static struct stm32l4_pwmtimer_s g_pwm15dev =
.irq = STM32L4_IRQ_TIM15,
#endif
.base = STM32L4_TIM15_BASE,
.pclk = STM32L4_APB1_TIM15_CLKIN,
.pclk = STM32L4_APB2_TIM15_CLKIN,
};
#endif
@ -574,7 +574,7 @@ static struct stm32l4_pwmtimer_s g_pwm16dev =
.irq = STM32L4_IRQ_TIM16,
#endif
.base = STM32L4_TIM16_BASE,
.pclk = STM32L4_APB1_TIM16_CLKIN,
.pclk = STM32L4_APB2_TIM16_CLKIN,
};
#endif
@ -600,7 +600,7 @@ static struct stm32l4_pwmtimer_s g_pwm17dev =
.irq = STM32L4_IRQ_TIM17,
#endif
.base = STM32L4_TIM17_BASE,
.pclk = STM32L4_APB1_TIM17_CLKIN,
.pclk = STM32L4_APB2_TIM17_CLKIN,
};
#endif

15
configs/nucleo-l432kc/include/nucleo-l432kc.h
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@ -292,11 +292,12 @@
/* REVISIT : this can be configured */
#define STM32L4_APB2_TIM1_CLKIN (2*STM32L4_PCLK2_FREQUENCY)
#define STM32L4_APB2_TIM8_CLKIN (2*STM32L4_PCLK2_FREQUENCY)
#define STM32L4_APB2_TIM15_CLKIN (2*STM32L4_PCLK2_FREQUENCY)
#define STM32L4_APB2_TIM16_CLKIN (2*STM32L4_PCLK2_FREQUENCY)
/* Timer Frequencies, if APBx is set to 1, frequency is same to APBx
* otherwise frequency is 2xAPBx.
* Note: TIM1,8 are on APB2, others on APB1
* Note: TIM1,15,16 are on APB2, others on APB1
*/
/* REVISIT : this can be configured */
@ -379,7 +380,8 @@
#define STM32L4_PCLK2_FREQUENCY (STM32L4_HCLK_FREQUENCY/1)
#define STM32L4_APB2_TIM1_CLKIN (2*STM32L4_PCLK2_FREQUENCY)
#define STM32L4_APB2_TIM8_CLKIN (2*STM32L4_PCLK2_FREQUENCY)
#define STM32L4_APB2_TIM15_CLKIN (2*STM32L4_PCLK2_FREQUENCY)
#define STM32L4_APB2_TIM16_CLKIN (2*STM32L4_PCLK2_FREQUENCY)
#elif defined(MSI_CLOCK_CONFIG)
@ -459,13 +461,14 @@
#define STM32L4_PCLK2_FREQUENCY (STM32L4_HCLK_FREQUENCY/1)
#define STM32L4_APB2_TIM1_CLKIN (2*STM32L4_PCLK2_FREQUENCY)
#define STM32L4_APB2_TIM8_CLKIN (2*STM32L4_PCLK2_FREQUENCY)
#define STM32L4_APB2_TIM15_CLKIN (2*STM32L4_PCLK2_FREQUENCY)
#define STM32L4_APB2_TIM16_CLKIN (2*STM32L4_PCLK2_FREQUENCY)
#endif
/* Timer Frequencies, if APBx is set to 1, frequency is same to APBx
* otherwise frequency is 2xAPBx.
* Note: TIM1,8,15,16,17 are on APB2, others on APB1
* Note: TIM1,15,16 are on APB2, others on APB1
*/
#define BOARD_TIM1_FREQUENCY STM32L4_HCLK_FREQUENCY
@ -475,10 +478,8 @@
#define BOARD_TIM5_FREQUENCY (STM32L4_HCLK_FREQUENCY / 2)
#define BOARD_TIM6_FREQUENCY (STM32L4_HCLK_FREQUENCY / 2)
#define BOARD_TIM7_FREQUENCY (STM32L4_HCLK_FREQUENCY / 2)
#define BOARD_TIM8_FREQUENCY STM32L4_HCLK_FREQUENCY
#define BOARD_TIM15_FREQUENCY STM32L4_HCLK_FREQUENCY
#define BOARD_TIM16_FREQUENCY STM32L4_HCLK_FREQUENCY
#define BOARD_TIM17_FREQUENCY STM32L4_HCLK_FREQUENCY
#define BOARD_LPTIM1_FREQUENCY (STM32L4_HCLK_FREQUENCY / 2)
#define BOARD_LPTIM2_FREQUENCY (STM32L4_HCLK_FREQUENCY / 2)

15
configs/nucleo-l452re/include/nucleo-l452re.h
View File

@ -292,11 +292,12 @@
/* REVISIT : this can be configured */
#define STM32L4_APB2_TIM1_CLKIN (2*STM32L4_PCLK2_FREQUENCY)
#define STM32L4_APB2_TIM8_CLKIN (2*STM32L4_PCLK2_FREQUENCY)
#define STM32L4_APB2_TIM15_CLKIN (2*STM32L4_PCLK2_FREQUENCY)
#define STM32L4_APB2_TIM16_CLKIN (2*STM32L4_PCLK2_FREQUENCY)
/* Timer Frequencies, if APBx is set to 1, frequency is same to APBx
* otherwise frequency is 2xAPBx.
* Note: TIM1,8 are on APB2, others on APB1
* Note: TIM1,15,16 are on APB2, others on APB1
*/
/* REVISIT : this can be configured */
@ -379,7 +380,8 @@
#define STM32L4_PCLK2_FREQUENCY (STM32L4_HCLK_FREQUENCY/1)
#define STM32L4_APB2_TIM1_CLKIN (2*STM32L4_PCLK2_FREQUENCY)
#define STM32L4_APB2_TIM8_CLKIN (2*STM32L4_PCLK2_FREQUENCY)
#define STM32L4_APB2_TIM15_CLKIN (2*STM32L4_PCLK2_FREQUENCY)
#define STM32L4_APB2_TIM16_CLKIN (2*STM32L4_PCLK2_FREQUENCY)
#elif defined(MSI_CLOCK_CONFIG)
@ -459,13 +461,14 @@
#define STM32L4_PCLK2_FREQUENCY (STM32L4_HCLK_FREQUENCY/1)
#define STM32L4_APB2_TIM1_CLKIN (2*STM32L4_PCLK2_FREQUENCY)
#define STM32L4_APB2_TIM8_CLKIN (2*STM32L4_PCLK2_FREQUENCY)
#define STM32L4_APB2_TIM15_CLKIN (2*STM32L4_PCLK2_FREQUENCY)
#define STM32L4_APB2_TIM16_CLKIN (2*STM32L4_PCLK2_FREQUENCY)
#endif
/* Timer Frequencies, if APBx is set to 1, frequency is same to APBx
* otherwise frequency is 2xAPBx.
* Note: TIM1,8,15,16,17 are on APB2, others on APB1
* Note: TIM1,15,16 are on APB2, others on APB1
*/
#define BOARD_TIM1_FREQUENCY STM32L4_HCLK_FREQUENCY
@ -475,10 +478,8 @@
#define BOARD_TIM5_FREQUENCY (STM32L4_HCLK_FREQUENCY / 2)
#define BOARD_TIM6_FREQUENCY (STM32L4_HCLK_FREQUENCY / 2)
#define BOARD_TIM7_FREQUENCY (STM32L4_HCLK_FREQUENCY / 2)
#define BOARD_TIM8_FREQUENCY STM32L4_HCLK_FREQUENCY
#define BOARD_TIM15_FREQUENCY STM32L4_HCLK_FREQUENCY
#define BOARD_TIM16_FREQUENCY STM32L4_HCLK_FREQUENCY
#define BOARD_TIM17_FREQUENCY STM32L4_HCLK_FREQUENCY
#define BOARD_LPTIM1_FREQUENCY (STM32L4_HCLK_FREQUENCY / 2)
#define BOARD_LPTIM2_FREQUENCY (STM32L4_HCLK_FREQUENCY / 2)

2
configs/nucleo-l452re/src/stm32_bringup.c
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@ -49,7 +49,7 @@
#include "nucleo-l452re.h"
/****************************************************************************
* Pre-processor Defintiionis
* Pre-processor Definitions
****************************************************************************/
#undef HAVE_I2C_DRIVER

11
configs/nucleo-l476rg/include/nucleo-l476rg.h
View File

@ -293,10 +293,13 @@
#define STM32L4_APB2_TIM1_CLKIN (2*STM32L4_PCLK2_FREQUENCY)
#define STM32L4_APB2_TIM8_CLKIN (2*STM32L4_PCLK2_FREQUENCY)
#define STM32L4_APB2_TIM15_CLKIN (2*STM32L4_PCLK2_FREQUENCY)
#define STM32L4_APB2_TIM16_CLKIN (2*STM32L4_PCLK2_FREQUENCY)
#define STM32L4_APB2_TIM17_CLKIN (2*STM32L4_PCLK2_FREQUENCY)
/* Timer Frequencies, if APBx is set to 1, frequency is same to APBx
* otherwise frequency is 2xAPBx.
* Note: TIM1,8 are on APB2, others on APB1
* Note: TIM1,8,15,16,17 are on APB2, others on APB1
*/
/* REVISIT : this can be configured */
@ -380,6 +383,9 @@
#define STM32L4_APB2_TIM1_CLKIN (2*STM32L4_PCLK2_FREQUENCY)
#define STM32L4_APB2_TIM8_CLKIN (2*STM32L4_PCLK2_FREQUENCY)
#define STM32L4_APB2_TIM15_CLKIN (2*STM32L4_PCLK2_FREQUENCY)
#define STM32L4_APB2_TIM16_CLKIN (2*STM32L4_PCLK2_FREQUENCY)
#define STM32L4_APB2_TIM17_CLKIN (2*STM32L4_PCLK2_FREQUENCY)
#elif defined(MSI_CLOCK_CONFIG)
@ -460,6 +466,9 @@
#define STM32L4_APB2_TIM1_CLKIN (2*STM32L4_PCLK2_FREQUENCY)
#define STM32L4_APB2_TIM8_CLKIN (2*STM32L4_PCLK2_FREQUENCY)
#define STM32L4_APB2_TIM15_CLKIN (2*STM32L4_PCLK2_FREQUENCY)
#define STM32L4_APB2_TIM16_CLKIN (2*STM32L4_PCLK2_FREQUENCY)
#define STM32L4_APB2_TIM17_CLKIN (2*STM32L4_PCLK2_FREQUENCY)
#endif

11
configs/nucleo-l496zg/include/board.h
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@ -178,10 +178,13 @@
#define STM32L4_APB2_TIM1_CLKIN (2*STM32L4_PCLK2_FREQUENCY)
#define STM32L4_APB2_TIM8_CLKIN (2*STM32L4_PCLK2_FREQUENCY)
#define STM32L4_APB2_TIM15_CLKIN (2*STM32L4_PCLK2_FREQUENCY)
#define STM32L4_APB2_TIM16_CLKIN (2*STM32L4_PCLK2_FREQUENCY)
#define STM32L4_APB2_TIM17_CLKIN (2*STM32L4_PCLK2_FREQUENCY)
/* Timer Frequencies, if APBx is set to 1, frequency is same to APBx
* otherwise frequency is 2xAPBx.
* Note: TIM1,8 are on APB2, others on APB1
* Note: TIM1,8,15,16,17 are on APB2, others on APB1
*/
/* REVISIT : this can be configured */
@ -361,9 +364,9 @@
/* DMA channels *************************************************************/
/* ADC */
#define ADC1_DMA_CHAN DMAMAP_ADC1_1
#define ADC2_DMA_CHAN DMAMAP_ADC2_1
#define ADC3_DMA_CHAN DMAMAP_ADC3_1
#define ADC1_DMA_CHAN DMACHAN_ADC1_1
#define ADC2_DMA_CHAN DMACHAN_ADC2_1
#define ADC3_DMA_CHAN DMACHAN_ADC3_1
/* SPI
*