arch/arm/src/lpc54xx: Add configuartion support and logic it all none, some, or all of the external RAM to the system heap.
This commit is contained in:
Gregory Nutt
parent
63415f9fb1
commit
88834b6e50
@ -418,10 +418,216 @@ config LPC54_EMC_STATIC
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bool "EMC static memory support"
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default n
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if LPC54_EMC_STATIC
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config LPC54_EMC_STATIC_CS0
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bool "SRAM on CS0"
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default n
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if LPC54_EMC_STATIC_CS0
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config LPC54_EMC_STATIC_CS0_OFFSET
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hex "Heap offset"
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default 0x0
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---help---
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May be used to reserve memory at the beginning of SRAM for other
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usage.
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config LPC54_EMC_STATIC_CS0_SIZE
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hex "SRAM size"
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default 0x0
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---help---
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Total amount of RAM (after the heap offset) that will be added to
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the heap. The may be zero, in which case none of the SRAM will be
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added to heap, it may be less than the size of heap if memory of
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reserved at the beginning or end of the SRAM form other purpose, or
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it may be the full SRAM size to add the entire SRAM to the heap
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endif # LPC54_EMC_STATIC_CS0
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config LPC54_EMC_STATIC_CS1
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bool "SRAM on CS1"
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default n
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if LPC54_EMC_STATIC_CS1
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config LPC54_EMC_STATIC_CS1_OFFSET
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hex "Heap offset"
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default 0x0
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---help---
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May be used to reserve memory at the beginning of SRAM for other
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usage.
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config LPC54_EMC_STATIC_CS1_SIZE
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hex "Heap size"
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default 0x0
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---help---
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Total amount of RAM (after the heap offset) that will be added to
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the heap. The may be zero, in which case none of the SRAM will be
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added to heap, it may be less than the size of heap if memory of
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reserved at the beginning or end of the SRAM form other purpose, or
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it may be the full SRAM size to add the entire SRAM to the heap
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endif # LPC54_EMC_STATIC_CS1
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config LPC54_EMC_STATIC_CS2
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bool "SRAM on CS2"
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default n
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if LPC54_EMC_STATIC_CS2
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config LPC54_EMC_STATIC_CS2_OFFSET
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hex "Heap offset"
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default 0x0
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---help---
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May be used to reserve memory at the beginning of SRAM for other
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usage.
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config LPC54_EMC_STATIC_CS2_SIZE
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hex "Heap size"
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default 0x0
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---help---
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Total amount of RAM (after the heap offset) that will be added to
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the heap. The may be zero, in which case none of the SRAM will be
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added to heap, it may be less than the size of heap if memory of
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reserved at the beginning or end of the SRAM form other purpose, or
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it may be the full SRAM size to add the entire SRAM to the heap
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endif # LPC54_EMC_STATIC_CS2
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config LPC54_EMC_STATIC_CS3
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bool "SRAM on CS3"
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default n
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if LPC54_EMC_STATIC_CS3
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config LPC54_EMC_STATIC_CS3_OFFSET
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hex "Heap offset"
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default 0x0
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---help---
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May be used to reserve memory at the beginning of SRAM for other
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usage.
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config LPC54_EMC_STATIC_CS3_SIZE
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hex "Heap size"
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default 0x0
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---help---
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Total amount of RAM (after the heap offset) that will be added to
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the heap. The may be zero, in which case none of the SRAM will be
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added to heap, it may be less than the size of heap if memory of
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reserved at the beginning or end of the SRAM form other purpose, or
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it may be the full SRAM size to add the entire SRAM to the heap
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endif # LPC54_EMC_STATIC_CS3
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endif # LPC54_EMC_STATIC
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config LPC54_EMC_DYNAMIC
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bool "EMC dynamic memory support"
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default y
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if LPC54_EMC_DYNAMIC
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config LPC54_EMC_DYNAMIC_CS0
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bool "SDRAM on CS0"
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default n
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if LPC54_EMC_DYNAMIC_CS0
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config LPC54_EMC_DYNAMIC_CS0_OFFSET
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hex "Heap offset"
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default 0x0
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---help---
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May be used to reserve memory at the beginning of SDRAM for other
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usage.
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config LPC54_EMC_DYNAMIC_CS0_SIZE
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hex "Heap size"
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default 0x0
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---help---
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Total amount of RAM (after the heap offset) that will be added to
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the heap. The may be zero, in which case none of the SDRAM will be
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added to heap, it may be less than the size of heap if memory of
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reserved at the beginning or end of the SDRAM form other purpose, or
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it may be the full SDRAM size to add the entire SDRAM to the heap
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endif # LPC54_EMC_DYNAMIC_CS0
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config LPC54_EMC_DYNAMIC_CS1
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bool "SDRAM on CS1"
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default n
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if LPC54_EMC_DYNAMIC_CS1
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config LPC54_EMC_DYNAMIC_CS1_OFFSET
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hex "Heap offset"
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default 0x0
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---help---
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May be used to reserve memory at the beginning of SDRAM for other
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usage.
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config LPC54_EMC_DYNAMIC_CS1_SIZE
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hex "Heap size"
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default 0x0
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---help---
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Total amount of RAM (after the heap offset) that will be added to
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the heap. The may be zero, in which case none of the SDRAM will be
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added to heap, it may be less than the size of heap if memory of
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reserved at the beginning or end of the SDRAM form other purpose, or
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it may be the full SDRAM size to add the entire SDRAM to the heap
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endif # LPC54_EMC_DYNAMIC_CS1
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config LPC54_EMC_DYNAMIC_CS2
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bool "SDRAM on CS2"
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default n
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if LPC54_EMC_DYNAMIC_CS2
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config LPC54_EMC_DYNAMIC_CS2_OFFSET
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hex "Heap offset"
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default 0x0
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---help---
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May be used to reserve memory at the beginning of SDRAM for other
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usage.
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config LPC54_EMC_DYNAMIC_CS2_SIZE
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hex "Heap size"
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default 0x0
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---help---
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Total amount of RAM (after the heap offset) that will be added to
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the heap. The may be zero, in which case none of the SDRAM will be
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added to heap, it may be less than the size of heap if memory of
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reserved at the beginning or end of the SDRAM form other purpose, or
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it may be the full SDRAM size to add the entire SDRAM to the heap
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endif # LPC54_EMC_DYNAMIC_CS2
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config LPC54_EMC_DYNAMIC_CS3
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bool "SDRAM on CS3"
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default n
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if LPC54_EMC_DYNAMIC_CS3
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config LPC54_EMC_DYNAMIC_CS3_OFFSET
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hex "Heap offset"
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default 0x0
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---help---
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May be used to reserve memory at the beginning of SDRAM for other
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usage.
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config LPC54_EMC_DYNAMIC_CS3_SIZE
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hex "Heap size"
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default 0x0
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---help---
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Total amount of RAM (after the heap offset) that will be added to
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the heap. The may be zero, in which case none of the SDRAM will be
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added to heap, it may be less than the size of heap if memory of
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reserved at the beginning or end of the SDRAM form other purpose, or
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it may be the full SDRAM size to add the entire SDRAM to the heap
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endif # LPC54_EMC_DYNAMIC_CS3
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endif # LPC54_EMC_DYNAMIC
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endmenu # EMC Configuration
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menu "LCD Configuration"
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@ -48,11 +48,14 @@
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#include <nuttx/board.h>
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#include <nuttx/userspace.h>
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#include <arch/board/board.h>
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#include "up_arch.h"
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#include "up_internal.h"
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#include "chip/lpc54_memorymap.h"
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#include "lpc54_mpuinit.h"
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#include <arch/board/board.h>
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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@ -73,6 +76,57 @@
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* kernel heap here.
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*/
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/* .bss and .data is always positioned in internal SRAM. The remaining SRAM
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* after the static .bss, .data, and IDLE stack allocations are always added
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* to the heap.
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*
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* If the EMC is enabled, if there is SRAM or SDRAM configured into the
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* AND if the request heap size is non-zero, then that external RAM will
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* also be added to the system according to the following definitions:
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*/
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#undef HAVE_STATIC_CS0
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#undef HAVE_STATIC_CS1
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#undef HAVE_STATIC_CS2
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#undef HAVE_STATIC_CS3
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#undef HAVE_DYNAMIC_CS0
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#undef HAVE_DYNAMIC_CS1
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#undef HAVE_DYNAMIC_CS2
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#undef HAVE_DYNAMIC_CS3
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#ifdef CONFIG_LPC54_EMC
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# ifdef CONFIG_LPC54_EMC_STATIC
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# if defined(CONFIG_LPC54_EMC_STATIC_CS0) && CONFIG_LPC54_EMC_STATIC_CS0_SIZE > 0
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# define HAVE_STATIC_CS0 1
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# endif
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# if defined(CONFIG_LPC54_EMC_STATIC_CS1) && CONFIG_LPC54_EMC_STATIC_CS1_SIZE > 0
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# define HAVE_STATIC_CS1 1
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# endif
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# if defined(CONFIG_LPC54_EMC_STATIC_CS0) && CONFIG_LPC54_EMC_STATIC_CS0_SIZE > 0
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# define HAVE_STATIC_CS2 1
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# endif
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# if defined(CONFIG_LPC54_EMC_STATIC_CS3) && CONFIG_LPC54_EMC_STATIC_CS3_SIZE > 0
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# define HAVE_STATIC_CS3 1
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# endif
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# endif /* CONFIG_LPC54_EMC_STATIC */
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# ifdef CONFIG_LPC54_EMC_DYNAMIC
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# if defined(CONFIG_LPC54_EMC_DYNAMIC_CS0) && CONFIG_LPC54_EMC_DYNAMIC_CS0_SIZE > 0
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# define HAVE_DYNAMIC_CS0 1
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# endif
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# if defined(CONFIG_LPC54_EMC_DYNAMIC_CS1) && CONFIG_LPC54_EMC_DYNAMIC_CS1_SIZE > 0
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# define HAVE_DYNAMIC_CS1 1
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# endif
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# if defined(CONFIG_LPC54_EMC_DYNAMIC_CS0) && CONFIG_LPC54_EMC_DYNAMIC_CS0_SIZE > 0
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# define HAVE_DYNAMIC_CS2 1
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# endif
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# if defined(CONFIG_LPC54_EMC_DYNAMIC_CS3) && CONFIG_LPC54_EMC_DYNAMIC_CS3_SIZE > 0
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# define HAVE_DYNAMIC_CS3 1
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# endif
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# endif /* CONFIG_LPC54_EMC_DYNAMIC */
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#endif /* CONFIG_LPC54_EMC */
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/****************************************************************************
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* Public Data
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****************************************************************************/
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@ -206,5 +260,152 @@ void up_allocate_kheap(FAR void **heap_start, size_t *heap_size)
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#if CONFIG_MM_REGIONS > 1
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void up_addregion(void)
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{
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}
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int remaining = CONFIG_MM_REGIONS;
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FAR void *heapstart;
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size_t heapsize;
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#ifdef HAVE_STATIC_CS0
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if (remaining > 0)
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{
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/* Add the SRAM to the user heap */
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heapstart = (FAR void *)(LPC54_SRAMCS0_BASE + CONFIG_LPC54_EMC_STATIC_CS0_OFFSET);
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heapsize = CONFIG_LPC54_EMC_STATIC_CS0_SIZE;
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mem_addregion(heapstart, heapsize);
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#if defined(CONFIG_BUILD_PROTECTED) && defined(CONFIG_MM_KERNEL_HEAP)
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/* Allow user-mode access to the SDRAM heap */
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lpc54_mpu_uheap((uintptr_t)heapstart, heapsize);
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#endif
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remaining--;
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}
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#endif /* HAVE_STATIC_CS0 */
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#ifdef HAVE_STATIC_CS1
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if (remaining > 0)
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{
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/* Add the SRAM to the user heap */
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heapstart = (FAR void *)(LPC54_SRAMCS1_BASE + CONFIG_LPC54_EMC_STATIC_CS1_OFFSET);
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heapsize = CONFIG_LPC54_EMC_STATIC_CS1_SIZE;
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mem_addregion(heapstart, heapsize);
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#if defined(CONFIG_BUILD_PROTECTED) && defined(CONFIG_MM_KERNEL_HEAP)
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/* Allow user-mode access to the SDRAM heap */
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lpc54_mpu_uheap((uintptr_t)heapstart, heapsize);
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#endif
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remaining--;
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}
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#endif /* HAVE_STATIC_CS1 */
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#ifdef HAVE_STATIC_CS2
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if (remaining > 0)
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{
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/* Add the SRAM to the user heap */
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heapstart = (FAR void *)(LPC54_SRAMCS2_BASE + CONFIG_LPC54_EMC_STATIC_CS2_OFFSET);
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heapsize = CONFIG_LPC54_EMC_STATIC_CS2_SIZE;
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mem_addregion(heapstart, heapsize);
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#if defined(CONFIG_BUILD_PROTECTED) && defined(CONFIG_MM_KERNEL_HEAP)
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/* Allow user-mode access to the SDRAM heap */
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lpc54_mpu_uheap((uintptr_t)heapstart, heapsize);
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#endif
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remaining--;
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}
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#endif /* HAVE_STATIC_CS2 */
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#ifdef HAVE_STATIC_CS3
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if (remaining > 0)
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{
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/* Add the SRAM to the user heap */
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heapstart = (FAR void *)(LPC54_SRAMCS3_BASE + CONFIG_LPC54_EMC_STATIC_CS3_OFFSET);
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heapsize = CONFIG_LPC54_EMC_STATIC_CS3_SIZE;
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mem_addregion(heapstart, heapsize);
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#if defined(CONFIG_BUILD_PROTECTED) && defined(CONFIG_MM_KERNEL_HEAP)
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/* Allow user-mode access to the SDRAM heap */
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lpc54_mpu_uheap((uintptr_t)heapstart, heapsize);
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#endif
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remaining--;
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}
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#endif /* HAVE_STATIC_CS3 */
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#ifdef HAVE_DYNAMIC_CS0
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if (remaining > 0)
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{
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/* Add the SDRAM to the user heap */
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heapstart = (FAR void *)(LPC54_DRAMCS2_BASE + CONFIG_LPC54_EMC_DYNAMIC_CS0_OFFSET);
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heapsize = CONFIG_LPC54_EMC_DYNAMIC_CS0_SIZE;
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mem_addregion(heapstart, heapsize);
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#if defined(CONFIG_BUILD_PROTECTED) && defined(CONFIG_MM_KERNEL_HEAP)
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/* Allow user-mode access to the SDRAM heap */
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lpc54_mpu_uheap((uintptr_t)heapstart, heapsize);
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#endif
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remaining--;
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}
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#endif /* HAVE_DYNAMIC_CS0 */
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#ifdef HAVE_DYNAMIC_CS1
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if (remaining > 0)
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{
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/* Add the SDRAM to the user heap */
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heapstart = (FAR void *)(LPC54_DRAMCS1_BASE + CONFIG_LPC54_EMC_DYNAMIC_CS1_OFFSET);
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heapsize = CONFIG_LPC54_EMC_DYNAMIC_CS1_SIZE;
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mem_addregion(heapstart, heapsize);
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#if defined(CONFIG_BUILD_PROTECTED) && defined(CONFIG_MM_KERNEL_HEAP)
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/* Allow user-mode access to the SDRAM heap */
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lpc54_mpu_uheap((uintptr_t)heapstart, heapsize);
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#endif
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remaining--;
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}
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#endif /* HAVE_DYNAMIC_CS1 */
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#ifdef HAVE_DYNAMIC_CS2
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if (remaining > 0)
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{
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/* Add the SDRAM to the user heap */
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heapstart = (FAR void *)(LPC54_DRAMCS2_BASE + CONFIG_LPC54_EMC_DYNAMIC_CS2_OFFSET);
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heapsize = CONFIG_LPC54_EMC_DYNAMIC_CS2_SIZE;
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mem_addregion(heapstart, heapsize);
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#if defined(CONFIG_BUILD_PROTECTED) && defined(CONFIG_MM_KERNEL_HEAP)
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/* Allow user-mode access to the SDRAM heap */
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lpc54_mpu_uheap((uintptr_t)heapstart, heapsize);
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#endif
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remaining--;
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}
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#endif /* HAVE_DYNAMIC_CS2 */
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#ifdef HAVE_DYNAMIC_CS3
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if (remaining > 0)
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{
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/* Add the SDRAM to the user heap */
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heapstart = (FAR void *)(LPC54_DRAMCS3_BASE + CONFIG_LPC54_EMC_DYNAMIC_CS3_OFFSET);
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heapsize = CONFIG_LPC54_EMC_DYNAMIC_CS3_SIZE;
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mem_addregion(heapstart, heapsize);
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#if defined(CONFIG_BUILD_PROTECTED) && defined(CONFIG_MM_KERNEL_HEAP)
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/* Allow user-mode access to the SDRAM heap */
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lpc54_mpu_uheap((uintptr_t)heapstart, heapsize);
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#endif
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remaining--;
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}
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#endif /* HAVE_DYNAMIC_CS3 */
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}
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#endif /* CONFIG_MM_REGIONS > 1 */
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@ -13,6 +13,7 @@ CONFIG_FAT_LCNAMES=y
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CONFIG_FAT_LFN=y
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CONFIG_FS_FAT=y
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CONFIG_FS_PROCFS=y
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CONFIG_LPC54_EMC_DYNAMIC_CS0=y
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CONFIG_LPC54_EMC=y
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CONFIG_LPC54_USART0=y
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CONFIG_MAX_TASKS=16
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