From 88834b6e509fd175b320880c7903d1b23692fd74 Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Tue, 12 Dec 2017 11:33:18 -0600 Subject: [PATCH] arch/arm/src/lpc54xx: Add configuartion support and logic it all none, some, or all of the external RAM to the system heap. --- arch/arm/src/lpc54xx/Kconfig | 206 +++++++++++++++++++++ arch/arm/src/lpc54xx/lpc54_allocateheap.c | 207 +++++++++++++++++++++- configs/lpcxpresso-lpc54628/nsh/defconfig | 1 + 3 files changed, 411 insertions(+), 3 deletions(-) diff --git a/arch/arm/src/lpc54xx/Kconfig b/arch/arm/src/lpc54xx/Kconfig index 1b0577d667..89af9ee0dc 100644 --- a/arch/arm/src/lpc54xx/Kconfig +++ b/arch/arm/src/lpc54xx/Kconfig @@ -418,10 +418,216 @@ config LPC54_EMC_STATIC bool "EMC static memory support" default n +if LPC54_EMC_STATIC + +config LPC54_EMC_STATIC_CS0 + bool "SRAM on CS0" + default n + +if LPC54_EMC_STATIC_CS0 + +config LPC54_EMC_STATIC_CS0_OFFSET + hex "Heap offset" + default 0x0 + ---help--- + May be used to reserve memory at the beginning of SRAM for other + usage. + +config LPC54_EMC_STATIC_CS0_SIZE + hex "SRAM size" + default 0x0 + ---help--- + Total amount of RAM (after the heap offset) that will be added to + the heap. The may be zero, in which case none of the SRAM will be + added to heap, it may be less than the size of heap if memory of + reserved at the beginning or end of the SRAM form other purpose, or + it may be the full SRAM size to add the entire SRAM to the heap + +endif # LPC54_EMC_STATIC_CS0 + +config LPC54_EMC_STATIC_CS1 + bool "SRAM on CS1" + default n + +if LPC54_EMC_STATIC_CS1 + +config LPC54_EMC_STATIC_CS1_OFFSET + hex "Heap offset" + default 0x0 + ---help--- + May be used to reserve memory at the beginning of SRAM for other + usage. + +config LPC54_EMC_STATIC_CS1_SIZE + hex "Heap size" + default 0x0 + ---help--- + Total amount of RAM (after the heap offset) that will be added to + the heap. The may be zero, in which case none of the SRAM will be + added to heap, it may be less than the size of heap if memory of + reserved at the beginning or end of the SRAM form other purpose, or + it may be the full SRAM size to add the entire SRAM to the heap + +endif # LPC54_EMC_STATIC_CS1 + +config LPC54_EMC_STATIC_CS2 + bool "SRAM on CS2" + default n + +if LPC54_EMC_STATIC_CS2 + +config LPC54_EMC_STATIC_CS2_OFFSET + hex "Heap offset" + default 0x0 + ---help--- + May be used to reserve memory at the beginning of SRAM for other + usage. + +config LPC54_EMC_STATIC_CS2_SIZE + hex "Heap size" + default 0x0 + ---help--- + Total amount of RAM (after the heap offset) that will be added to + the heap. The may be zero, in which case none of the SRAM will be + added to heap, it may be less than the size of heap if memory of + reserved at the beginning or end of the SRAM form other purpose, or + it may be the full SRAM size to add the entire SRAM to the heap + +endif # LPC54_EMC_STATIC_CS2 + +config LPC54_EMC_STATIC_CS3 + bool "SRAM on CS3" + default n + +if LPC54_EMC_STATIC_CS3 + +config LPC54_EMC_STATIC_CS3_OFFSET + hex "Heap offset" + default 0x0 + ---help--- + May be used to reserve memory at the beginning of SRAM for other + usage. + +config LPC54_EMC_STATIC_CS3_SIZE + hex "Heap size" + default 0x0 + ---help--- + Total amount of RAM (after the heap offset) that will be added to + the heap. The may be zero, in which case none of the SRAM will be + added to heap, it may be less than the size of heap if memory of + reserved at the beginning or end of the SRAM form other purpose, or + it may be the full SRAM size to add the entire SRAM to the heap + +endif # LPC54_EMC_STATIC_CS3 +endif # LPC54_EMC_STATIC + config LPC54_EMC_DYNAMIC bool "EMC dynamic memory support" default y +if LPC54_EMC_DYNAMIC + +config LPC54_EMC_DYNAMIC_CS0 + bool "SDRAM on CS0" + default n + +if LPC54_EMC_DYNAMIC_CS0 + +config LPC54_EMC_DYNAMIC_CS0_OFFSET + hex "Heap offset" + default 0x0 + ---help--- + May be used to reserve memory at the beginning of SDRAM for other + usage. + +config LPC54_EMC_DYNAMIC_CS0_SIZE + hex "Heap size" + default 0x0 + ---help--- + Total amount of RAM (after the heap offset) that will be added to + the heap. The may be zero, in which case none of the SDRAM will be + added to heap, it may be less than the size of heap if memory of + reserved at the beginning or end of the SDRAM form other purpose, or + it may be the full SDRAM size to add the entire SDRAM to the heap + +endif # LPC54_EMC_DYNAMIC_CS0 + +config LPC54_EMC_DYNAMIC_CS1 + bool "SDRAM on CS1" + default n + +if LPC54_EMC_DYNAMIC_CS1 + +config LPC54_EMC_DYNAMIC_CS1_OFFSET + hex "Heap offset" + default 0x0 + ---help--- + May be used to reserve memory at the beginning of SDRAM for other + usage. + +config LPC54_EMC_DYNAMIC_CS1_SIZE + hex "Heap size" + default 0x0 + ---help--- + Total amount of RAM (after the heap offset) that will be added to + the heap. The may be zero, in which case none of the SDRAM will be + added to heap, it may be less than the size of heap if memory of + reserved at the beginning or end of the SDRAM form other purpose, or + it may be the full SDRAM size to add the entire SDRAM to the heap + +endif # LPC54_EMC_DYNAMIC_CS1 + +config LPC54_EMC_DYNAMIC_CS2 + bool "SDRAM on CS2" + default n + +if LPC54_EMC_DYNAMIC_CS2 + +config LPC54_EMC_DYNAMIC_CS2_OFFSET + hex "Heap offset" + default 0x0 + ---help--- + May be used to reserve memory at the beginning of SDRAM for other + usage. + +config LPC54_EMC_DYNAMIC_CS2_SIZE + hex "Heap size" + default 0x0 + ---help--- + Total amount of RAM (after the heap offset) that will be added to + the heap. The may be zero, in which case none of the SDRAM will be + added to heap, it may be less than the size of heap if memory of + reserved at the beginning or end of the SDRAM form other purpose, or + it may be the full SDRAM size to add the entire SDRAM to the heap + +endif # LPC54_EMC_DYNAMIC_CS2 + +config LPC54_EMC_DYNAMIC_CS3 + bool "SDRAM on CS3" + default n + +if LPC54_EMC_DYNAMIC_CS3 + +config LPC54_EMC_DYNAMIC_CS3_OFFSET + hex "Heap offset" + default 0x0 + ---help--- + May be used to reserve memory at the beginning of SDRAM for other + usage. + +config LPC54_EMC_DYNAMIC_CS3_SIZE + hex "Heap size" + default 0x0 + ---help--- + Total amount of RAM (after the heap offset) that will be added to + the heap. The may be zero, in which case none of the SDRAM will be + added to heap, it may be less than the size of heap if memory of + reserved at the beginning or end of the SDRAM form other purpose, or + it may be the full SDRAM size to add the entire SDRAM to the heap + +endif # LPC54_EMC_DYNAMIC_CS3 +endif # LPC54_EMC_DYNAMIC + endmenu # EMC Configuration menu "LCD Configuration" diff --git a/arch/arm/src/lpc54xx/lpc54_allocateheap.c b/arch/arm/src/lpc54xx/lpc54_allocateheap.c index 5f48ade7ea..3dc22b7a31 100644 --- a/arch/arm/src/lpc54xx/lpc54_allocateheap.c +++ b/arch/arm/src/lpc54xx/lpc54_allocateheap.c @@ -48,11 +48,14 @@ #include #include -#include - #include "up_arch.h" #include "up_internal.h" +#include "chip/lpc54_memorymap.h" +#include "lpc54_mpuinit.h" + +#include + /**************************************************************************** * Pre-processor Definitions ****************************************************************************/ @@ -73,6 +76,57 @@ * kernel heap here. */ +/* .bss and .data is always positioned in internal SRAM. The remaining SRAM + * after the static .bss, .data, and IDLE stack allocations are always added + * to the heap. + * + * If the EMC is enabled, if there is SRAM or SDRAM configured into the + * AND if the request heap size is non-zero, then that external RAM will + * also be added to the system according to the following definitions: + */ + +#undef HAVE_STATIC_CS0 +#undef HAVE_STATIC_CS1 +#undef HAVE_STATIC_CS2 +#undef HAVE_STATIC_CS3 + +#undef HAVE_DYNAMIC_CS0 +#undef HAVE_DYNAMIC_CS1 +#undef HAVE_DYNAMIC_CS2 +#undef HAVE_DYNAMIC_CS3 + +#ifdef CONFIG_LPC54_EMC +# ifdef CONFIG_LPC54_EMC_STATIC +# if defined(CONFIG_LPC54_EMC_STATIC_CS0) && CONFIG_LPC54_EMC_STATIC_CS0_SIZE > 0 +# define HAVE_STATIC_CS0 1 +# endif +# if defined(CONFIG_LPC54_EMC_STATIC_CS1) && CONFIG_LPC54_EMC_STATIC_CS1_SIZE > 0 +# define HAVE_STATIC_CS1 1 +# endif +# if defined(CONFIG_LPC54_EMC_STATIC_CS0) && CONFIG_LPC54_EMC_STATIC_CS0_SIZE > 0 +# define HAVE_STATIC_CS2 1 +# endif +# if defined(CONFIG_LPC54_EMC_STATIC_CS3) && CONFIG_LPC54_EMC_STATIC_CS3_SIZE > 0 +# define HAVE_STATIC_CS3 1 +# endif +# endif /* CONFIG_LPC54_EMC_STATIC */ +# ifdef CONFIG_LPC54_EMC_DYNAMIC +# if defined(CONFIG_LPC54_EMC_DYNAMIC_CS0) && CONFIG_LPC54_EMC_DYNAMIC_CS0_SIZE > 0 +# define HAVE_DYNAMIC_CS0 1 +# endif +# if defined(CONFIG_LPC54_EMC_DYNAMIC_CS1) && CONFIG_LPC54_EMC_DYNAMIC_CS1_SIZE > 0 +# define HAVE_DYNAMIC_CS1 1 +# endif +# if defined(CONFIG_LPC54_EMC_DYNAMIC_CS0) && CONFIG_LPC54_EMC_DYNAMIC_CS0_SIZE > 0 +# define HAVE_DYNAMIC_CS2 1 +# endif +# if defined(CONFIG_LPC54_EMC_DYNAMIC_CS3) && CONFIG_LPC54_EMC_DYNAMIC_CS3_SIZE > 0 +# define HAVE_DYNAMIC_CS3 1 +# endif +# endif /* CONFIG_LPC54_EMC_DYNAMIC */ +#endif /* CONFIG_LPC54_EMC */ + + /**************************************************************************** * Public Data ****************************************************************************/ @@ -206,5 +260,152 @@ void up_allocate_kheap(FAR void **heap_start, size_t *heap_size) #if CONFIG_MM_REGIONS > 1 void up_addregion(void) { -} + int remaining = CONFIG_MM_REGIONS; + FAR void *heapstart; + size_t heapsize; + +#ifdef HAVE_STATIC_CS0 + if (remaining > 0) + { + /* Add the SRAM to the user heap */ + + heapstart = (FAR void *)(LPC54_SRAMCS0_BASE + CONFIG_LPC54_EMC_STATIC_CS0_OFFSET); + heapsize = CONFIG_LPC54_EMC_STATIC_CS0_SIZE; + mem_addregion(heapstart, heapsize); + +#if defined(CONFIG_BUILD_PROTECTED) && defined(CONFIG_MM_KERNEL_HEAP) + /* Allow user-mode access to the SDRAM heap */ + + lpc54_mpu_uheap((uintptr_t)heapstart, heapsize); #endif + remaining--; + } +#endif /* HAVE_STATIC_CS0 */ + +#ifdef HAVE_STATIC_CS1 + if (remaining > 0) + { + /* Add the SRAM to the user heap */ + + heapstart = (FAR void *)(LPC54_SRAMCS1_BASE + CONFIG_LPC54_EMC_STATIC_CS1_OFFSET); + heapsize = CONFIG_LPC54_EMC_STATIC_CS1_SIZE; + mem_addregion(heapstart, heapsize); + +#if defined(CONFIG_BUILD_PROTECTED) && defined(CONFIG_MM_KERNEL_HEAP) + /* Allow user-mode access to the SDRAM heap */ + + lpc54_mpu_uheap((uintptr_t)heapstart, heapsize); +#endif + remaining--; + } +#endif /* HAVE_STATIC_CS1 */ + +#ifdef HAVE_STATIC_CS2 + if (remaining > 0) + { + /* Add the SRAM to the user heap */ + + heapstart = (FAR void *)(LPC54_SRAMCS2_BASE + CONFIG_LPC54_EMC_STATIC_CS2_OFFSET); + heapsize = CONFIG_LPC54_EMC_STATIC_CS2_SIZE; + mem_addregion(heapstart, heapsize); + +#if defined(CONFIG_BUILD_PROTECTED) && defined(CONFIG_MM_KERNEL_HEAP) + /* Allow user-mode access to the SDRAM heap */ + + lpc54_mpu_uheap((uintptr_t)heapstart, heapsize); +#endif + remaining--; + } +#endif /* HAVE_STATIC_CS2 */ + +#ifdef HAVE_STATIC_CS3 + if (remaining > 0) + { + /* Add the SRAM to the user heap */ + + heapstart = (FAR void *)(LPC54_SRAMCS3_BASE + CONFIG_LPC54_EMC_STATIC_CS3_OFFSET); + heapsize = CONFIG_LPC54_EMC_STATIC_CS3_SIZE; + mem_addregion(heapstart, heapsize); + +#if defined(CONFIG_BUILD_PROTECTED) && defined(CONFIG_MM_KERNEL_HEAP) + /* Allow user-mode access to the SDRAM heap */ + + lpc54_mpu_uheap((uintptr_t)heapstart, heapsize); +#endif + remaining--; + } +#endif /* HAVE_STATIC_CS3 */ + +#ifdef HAVE_DYNAMIC_CS0 + if (remaining > 0) + { + /* Add the SDRAM to the user heap */ + + heapstart = (FAR void *)(LPC54_DRAMCS2_BASE + CONFIG_LPC54_EMC_DYNAMIC_CS0_OFFSET); + heapsize = CONFIG_LPC54_EMC_DYNAMIC_CS0_SIZE; + mem_addregion(heapstart, heapsize); + +#if defined(CONFIG_BUILD_PROTECTED) && defined(CONFIG_MM_KERNEL_HEAP) + /* Allow user-mode access to the SDRAM heap */ + + lpc54_mpu_uheap((uintptr_t)heapstart, heapsize); +#endif + remaining--; + } +#endif /* HAVE_DYNAMIC_CS0 */ + +#ifdef HAVE_DYNAMIC_CS1 + if (remaining > 0) + { + /* Add the SDRAM to the user heap */ + + heapstart = (FAR void *)(LPC54_DRAMCS1_BASE + CONFIG_LPC54_EMC_DYNAMIC_CS1_OFFSET); + heapsize = CONFIG_LPC54_EMC_DYNAMIC_CS1_SIZE; + mem_addregion(heapstart, heapsize); + +#if defined(CONFIG_BUILD_PROTECTED) && defined(CONFIG_MM_KERNEL_HEAP) + /* Allow user-mode access to the SDRAM heap */ + + lpc54_mpu_uheap((uintptr_t)heapstart, heapsize); +#endif + remaining--; + } +#endif /* HAVE_DYNAMIC_CS1 */ + +#ifdef HAVE_DYNAMIC_CS2 + if (remaining > 0) + { + /* Add the SDRAM to the user heap */ + + heapstart = (FAR void *)(LPC54_DRAMCS2_BASE + CONFIG_LPC54_EMC_DYNAMIC_CS2_OFFSET); + heapsize = CONFIG_LPC54_EMC_DYNAMIC_CS2_SIZE; + mem_addregion(heapstart, heapsize); + +#if defined(CONFIG_BUILD_PROTECTED) && defined(CONFIG_MM_KERNEL_HEAP) + /* Allow user-mode access to the SDRAM heap */ + + lpc54_mpu_uheap((uintptr_t)heapstart, heapsize); +#endif + remaining--; + } +#endif /* HAVE_DYNAMIC_CS2 */ + +#ifdef HAVE_DYNAMIC_CS3 + if (remaining > 0) + { + /* Add the SDRAM to the user heap */ + + heapstart = (FAR void *)(LPC54_DRAMCS3_BASE + CONFIG_LPC54_EMC_DYNAMIC_CS3_OFFSET); + heapsize = CONFIG_LPC54_EMC_DYNAMIC_CS3_SIZE; + mem_addregion(heapstart, heapsize); + +#if defined(CONFIG_BUILD_PROTECTED) && defined(CONFIG_MM_KERNEL_HEAP) + /* Allow user-mode access to the SDRAM heap */ + + lpc54_mpu_uheap((uintptr_t)heapstart, heapsize); +#endif + remaining--; + } +#endif /* HAVE_DYNAMIC_CS3 */ +} +#endif /* CONFIG_MM_REGIONS > 1 */ diff --git a/configs/lpcxpresso-lpc54628/nsh/defconfig b/configs/lpcxpresso-lpc54628/nsh/defconfig index 934c536544..f0336d8cc5 100644 --- a/configs/lpcxpresso-lpc54628/nsh/defconfig +++ b/configs/lpcxpresso-lpc54628/nsh/defconfig @@ -13,6 +13,7 @@ CONFIG_FAT_LCNAMES=y CONFIG_FAT_LFN=y CONFIG_FS_FAT=y CONFIG_FS_PROCFS=y +CONFIG_LPC54_EMC_DYNAMIC_CS0=y CONFIG_LPC54_EMC=y CONFIG_LPC54_USART0=y CONFIG_MAX_TASKS=16