Add support for a Faraday FTMAC100 Ethernet MAC Driver. From Anton D. Kachalov
This commit is contained in:
Anton D. Kachalov
Gregory Nutt
parent
80d934406f
commit
88861e562a
@ -10759,8 +10759,7 @@
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* include/, sched/, and libc/: Add support for sporadic scheduling
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parameters in struct sched_param, posix_spawnattr_t, and pthread_attr_t.
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Update all user interfaces to pass sporadic scheduling parameters.
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Feature is dependent on EXPERIMENTAL and no changes have yet been
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made to core scheduling logic (2015-07-23).
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(2015-07-23).
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* sched/: Separate the round-robin logic into a separate file so that
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it is symmetric with the sporadic stuff. Integrate the sporadic
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scheduler into the time tick interrupt handling and into the tickless
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@ -10770,3 +10769,5 @@
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D. Kachalov (2015-07-29).
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* configs/moxa: Moxa NP51x0 series of 2-port advanced RS-232/422/485
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serial device servers. From Anton D. Kachalov (2015-07-29).
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* drivers/net/ and include/nuttx/net: Add support for a Faraday
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FTMAC100 Ethernet MAC Driver. From Anton D. Kachalov (2015-07-29).
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@ -286,6 +286,36 @@ config NET_SLIP
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---help---
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Reference: RFC 1055
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config NET_FTMAC100
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bool "Faraday 10/100 Ethernet"
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default n
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---help---
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Faraday 10/100 Ethernet support.
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if NET_FTMAC100
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config FTMAC100_BASE
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hex "FTMAC100 base address"
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default 0x0
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config FTMAC100_IRQ
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int "FTMAC100 IRQ number"
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default 0
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config FTMAC100_RX_DESC
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int "Number of RX descriptors"
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default 64
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config FTMAC100_TX_DESC
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int "Number of TX descriptors"
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default 32
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config FTMAC100_MAC0_ENV_ADDR
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hex "MAC0 address location"
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default 0
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endif # NET_FTMAC100
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config NET_VNET
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bool "VNET support"
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default n
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@ -71,6 +71,10 @@ ifeq ($(CONFIG_NET_TUN),y)
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CSRCS += tun.c
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endif
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ifeq ($(CONFIG_NET_FTMAC100),y)
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CSRCS += ftmac100.c
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endif
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ifeq ($(CONFIG_ARCH_PHY_INTERRUPT),y)
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CSRCS += phy_notify.c
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endif
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1716
drivers/net/ftmac100.c
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1716
drivers/net/ftmac100.c
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File diff suppressed because it is too large
Load Diff
239
include/nuttx/net/ftmac100.h
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239
include/nuttx/net/ftmac100.h
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@ -0,0 +1,239 @@
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/****************************************************************************
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* include/nuttx/net/ftmac100.h
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* Faraday FTMAC100 Ethernet MAC Definitions
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*
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* Copyright (C) 2015 Anton D. Kachalov. All rights reserved.
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* Author: Anton D. Kachalov <mouse@yandex.ru>
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*
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* Based on definitions provided by Po-Yu Chuang <ratbert@faraday-tech.com>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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****************************************************************************/
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#ifndef __INCLUDE_NUTTX_NET_FTMAC100_H
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#define __INCLUDE_NUTTX_NET_FTMAC100_H
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/****************************************************************************'
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#ifdef CONFIG_NET_FTMAC100
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/****************************************************************************'
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* Pre-processor definitions
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****************************************************************************/
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/* Interrupt status register & interrupt mask register definitions*/
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#define FTMAC100_INT_RPKT_FINISH (1 << 0)
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#define FTMAC100_INT_NORXBUF (1 << 1)
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#define FTMAC100_INT_XPKT_FINISH (1 << 2)
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#define FTMAC100_INT_NOTXBUF (1 << 3)
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#define FTMAC100_INT_XPKT_OK (1 << 4)
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#define FTMAC100_INT_XPKT_LOST (1 << 5)
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#define FTMAC100_INT_RPKT_SAV (1 << 6)
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#define FTMAC100_INT_RPKT_LOST (1 << 7)
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#define FTMAC100_INT_AHB_ERR (1 << 8)
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#define FTMAC100_INT_PHYSTS_CHG (1 << 9)
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/* Interrupt timer control register */
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#define FTMAC100_ITC_RXINT_CNT(x) (((x) & 0xf) << 0)
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#define FTMAC100_ITC_RXINT_THR(x) (((x) & 0x7) << 4)
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#define FTMAC100_ITC_RXINT_TIME_SEL (1 << 7)
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#define FTMAC100_ITC_TXINT_CNT(x) (((x) & 0xf) << 8)
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#define FTMAC100_ITC_TXINT_THR(x) (((x) & 0x7) << 12)
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#define FTMAC100_ITC_TXINT_TIME_SEL (1 << 15)
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/* Automatic polling timer control register definitions */
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#define FTMAC100_APTC_RXPOLL_CNT(x) (((x) & 0xf) << 0)
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#define FTMAC100_APTC_RXPOLL_TIME_SEL (1 << 4)
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#define FTMAC100_APTC_TXPOLL_CNT(x) (((x) & 0xf) << 8)
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#define FTMAC100_APTC_TXPOLL_TIME_SEL (1 << 12)
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/* DMA burst length and arbitration control register definitions */
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#define FTMAC100_DBLAC_INCR4_EN (1 << 0)
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#define FTMAC100_DBLAC_INCR8_EN (1 << 1)
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#define FTMAC100_DBLAC_INCR16_EN (1 << 2)
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#define FTMAC100_DBLAC_RXFIFO_LTHR(x) (((x) & 0x7) << 3)
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#define FTMAC100_DBLAC_RXFIFO_HTHR(x) (((x) & 0x7) << 6)
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#define FTMAC100_DBLAC_RX_THR_EN (1 << 9)
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/* MAC control register definitions */
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#define FTMAC100_MACCR_XDMA_EN (1 << 0)
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#define FTMAC100_MACCR_RDMA_EN (1 << 1)
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#define FTMAC100_MACCR_SW_RST (1 << 2)
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#define FTMAC100_MACCR_LOOP_EN (1 << 3)
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#define FTMAC100_MACCR_CRC_DIS (1 << 4)
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#define FTMAC100_MACCR_XMT_EN (1 << 5)
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#define FTMAC100_MACCR_ENRX_IN_HALFTX (1 << 6)
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#define FTMAC100_MACCR_RCV_EN (1 << 8)
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#define FTMAC100_MACCR_HT_MULTI_EN (1 << 9)
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#define FTMAC100_MACCR_RX_RUNT (1 << 10)
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#define FTMAC100_MACCR_RX_FTL (1 << 11)
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#define FTMAC100_MACCR_RCV_ALL (1 << 12)
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#define FTMAC100_MACCR_CRC_APD (1 << 14)
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#define FTMAC100_MACCR_FULLDUP (1 << 15)
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#define FTMAC100_MACCR_RX_MULTIPKT (1 << 16)
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#define FTMAC100_MACCR_RX_BROADPKT (1 << 17)
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/* PHY control register definitions */
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#define FTMAC100_PHYCR_MIIRDATA 0xffff
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#define FTMAC100_PHYCR_PHYAD(x) (((x) & 0x1f) << 16)
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#define FTMAC100_PHYCR_REGAD(x) (((x) & 0x1f) << 21)
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#define FTMAC100_PHYCR_MIIRD (1 << 26)
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#define FTMAC100_PHYCR_MIIWR (1 << 27)
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/* Transmit descriptor definitions */
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#define FTMAC100_TXDES0_TXPKT_LATECOL (1 << 0)
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#define FTMAC100_TXDES0_TXPKT_EXSCOL (1 << 1)
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#define FTMAC100_TXDES0_TXDMA_OWN (1 << 31)
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#define FTMAC100_TXDES1_TXBUF_SIZE(x) ((x) & 0x7ff)
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#define FTMAC100_TXDES1_LTS (1 << 27)
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#define FTMAC100_TXDES1_FTS (1 << 28)
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#define FTMAC100_TXDES1_TX2FIC (1 << 29)
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#define FTMAC100_TXDES1_TXIC (1 << 30)
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#define FTMAC100_TXDES1_EDOTR (1 << 31)
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/* Receive descriptor definitions */
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#define FTMAC100_RXDES0_RFL(des) ((des) & 0x7ff)
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#define FTMAC100_RXDES0_MULTICAST (1 << 16)
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#define FTMAC100_RXDES0_BROADCAST (1 << 17)
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#define FTMAC100_RXDES0_RX_ERR (1 << 18)
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#define FTMAC100_RXDES0_CRC_ERR (1 << 19)
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#define FTMAC100_RXDES0_FTL (1 << 20)
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#define FTMAC100_RXDES0_RUNT (1 << 21)
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#define FTMAC100_RXDES0_RX_ODD_NB (1 << 22)
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#define FTMAC100_RXDES0_LRS (1 << 28)
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#define FTMAC100_RXDES0_FRS (1 << 29)
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#define FTMAC100_RXDES0_RXDMA_OWN (1 << 31)
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#define FTMAC100_RXDES1_RXBUF_SIZE(x) ((x) & 0x7ff)
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#define FTMAC100_RXDES1_EDORR (1 << 31)
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/****************************************************************************'
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* Public Types
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****************************************************************************/
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struct ftmac100_register_s
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{
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uint32_t isr; /* 0x00 */
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uint32_t imr; /* 0x04 */
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uint32_t mac_madr; /* 0x08 */
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uint32_t mac_ladr; /* 0x0c */
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uint32_t maht0; /* 0x10 */
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uint32_t maht1; /* 0x14 */
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uint32_t txpd; /* 0x18 */
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uint32_t rxpd; /* 0x1c */
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uint32_t txr_badr; /* 0x20 */
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uint32_t rxr_badr; /* 0x24 */
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uint32_t itc; /* 0x28 */
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uint32_t aptc; /* 0x2c */
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uint32_t dblac; /* 0x30 */
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uint32_t pad1[3]; /* 0x34 - 0x3c */
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uint32_t pad2[16]; /* 0x40 - 0x7c */
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uint32_t pad3[2]; /* 0x80 - 0x84 */
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uint32_t maccr; /* 0x88 */
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uint32_t macsr; /* 0x8c */
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uint32_t phycr; /* 0x90 */
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uint32_t phywdata; /* 0x94 */
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uint32_t fcr; /* 0x98 */
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uint32_t bpr; /* 0x9c */
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uint32_t pad4[8]; /* 0xa0 - 0xbc */
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uint32_t pad5; /* 0xc0 */
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uint32_t ts; /* 0xc4 */
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uint32_t dmafifos; /* 0xc8 */
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uint32_t tm; /* 0xcc */
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uint32_t pad6; /* 0xd0 */
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uint32_t tx_mcol_scol; /* 0xd4 */
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uint32_t rpf_aep; /* 0xd8 */
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uint32_t xm_pg; /* 0xdc */
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uint32_t runt_tlcc; /* 0xe0 */
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uint32_t crcer_ftl; /* 0xe4 */
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uint32_t rlc_rcc; /* 0xe8 */
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uint32_t broc; /* 0xec */
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uint32_t mulca; /* 0xf0 */
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uint32_t rp; /* 0xf4 */
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uint32_t xp; /* 0xf8 */
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};
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/* Transmit descriptor, aligned to 16 bytes */
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struct ftmac100_txdes_s
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{
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uint32_t txdes0;
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uint32_t txdes1;
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uint32_t txdes2; /* TXBUF_BADR */
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uint32_t txdes3; /* not used by HW */
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} __attribute__ ((aligned(16)));
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/* Receive descriptor, aligned to 16 bytes */
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struct ftmac100_rxdes_s
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{
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uint32_t rxdes0;
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uint32_t rxdes1;
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uint32_t rxdes2; /* RXBUF_BADR */
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uint32_t rxdes3; /* not used by HW */
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} __attribute__ ((aligned(16)));
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/****************************************************************************'
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* Pre-processor definitions
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****************************************************************************/
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/****************************************************************************
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* Function: ftmac100_initialize
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*
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* Description:
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* Initialize the Ethernet controller and driver
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*
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* Parameters:
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* intf - In the case where there are multiple EMACs, this value
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* identifies which EMAC is to be initialized.
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*
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* Returned Value:
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* OK on success; Negated errno on failure.
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*
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* Assumptions:
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*
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****************************************************************************/
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int ftmac100_initialize(int intf);
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#endif /* CONFIG_NET_FTMAC100 */
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#endif /* __INCLUDE_NUTTX_NET_FTMAC100_H */
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