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onfigs/mx1ads/ostest: Configuration converted to use the kconfig-frontends tools

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This commit is contained in:
Gregory Nutt 2014-03-06 09:48:25 -06:00
parent 892c86df3c
commit 88d3bc23e1
4 changed files with 48 additions and 22 deletions
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38
arch/arm/src/imx/Kconfig
View File

@ -5,19 +5,45 @@
if ARCH_CHIP_IMX
config IMX_UART0
bool "UART0"
select ARCH_HAVE_UART0
default n
# choice "iMX Chip Selection"
config ARCH_CHIP_IMX1
bool
default y
menu "iMX Peripheral Selection"
config IMX_UART1
bool "UART1"
select ARCH_HAVE_UART1
default n
select ARCH_HAVE_UART1
config IMX_UART2
bool "UART2"
select ARCH_HAVE_UART2
default n
select ARCH_HAVE_UART2
config IMX_UART3
bool "UART2"
default n
select ARCH_HAVE_UART3
config IMX_SPI1
bool "SPI1"
default n
select SPI
config IMX_SPI2
bool "SPI2"
default n
select SPI
endmenu # iMX Peripheral Selection
config RAM_NUTTXENTRY
hex "NuttX entry point"
default 0x01004000
---help---
The virtual address of the NuttX entry point
endif

4
arch/arm/src/imx/imx_allocateheap.c
View File

@ -107,9 +107,9 @@ void up_addregion(void)
*/
#if !defined(CONFIG_BOOT_RUNFROMFLASH) && !defined(CONFIG_BOOT_COPYTORAM)
# if (CONFIG_DRAM_NUTTXENTRY & 0xffff0000) != CONFIG_RAM_VSTART
# if (CONFIG_RAM_NUTTXENTRY & 0xffff0000) != CONFIG_RAM_VSTART
uint32_t start = CONFIG_RAM_VSTART + 0x1000;
uint32_t end = (CONFIG_DRAM_NUTTXENTRY & 0xffff0000);
uint32_t end = (CONFIG_RAM_NUTTXENTRY & 0xffff0000);
kmm_addregion((FAR void*)start, end - start);
# endif
#endif

6
arch/arm/src/imx/imx_memorymap.h
View File

@ -216,11 +216,11 @@
* This offset reserves space for the MMU page cache.
*/
#define NUTTX_START_VADDR ((CONFIG_DRAM_NUTTXENTRY & 0xfff00000) | PGTABLE_SIZE)
#define NUTTX_START_VADDR ((CONFIG_RAM_NUTTXENTRY & 0xfff00000) | PGTABLE_SIZE)
#define NUTTX_START_PADDR (IMX_SDRAM0_PSECTION | PGTABLE_SIZE)
#if NUTTX_START_VADDR != CONFIG_DRAM_NUTTXENTRY
# error "CONFIG_DRAM_NUTTXENTRY does not have correct offset for page table"
#if NUTTX_START_VADDR != CONFIG_RAM_NUTTXENTRY
# error "CONFIG_RAM_NUTTXENTRY does not have correct offset for page table"
#endif
/* Section MMU Flags */

22
arch/arm/src/imx/imx_spi.c
View File

@ -63,16 +63,16 @@
/* The i.MX1/L supports 2 SPI interfaces. Which have been enabled? */
#ifndef CONFIG_SPI1_DISABLE
#ifdef CONFIG_IMX_SPI1
# define SPI1_NDX 0 /* Index to SPI1 in g_spidev[] */
# ifndef CONFIG_SPI2_DISABLE
# ifdef CONFIG_IMX_SPI2
# define SPI2_NDX 1 /* Index to SPI2 in g_spidev[] */
# define NSPIS 2 /* Two SPI interfaces: SPI1 & SPI2 */
# else
# define NSPIS 1 /* One SPI interface: SPI1 */
# endif
#else
# ifndef CONFIG_SPI2_DISABLE
# ifdef CONFIG_IMX_SPI2
# define SPI2_NDX 0 /* Index to SPI2 in g_spidev[] */
# define NSPIS 1 /* One SPI interface: SPI2 */
# else
@ -213,7 +213,7 @@ static const struct spi_ops_s g_spiops =
static struct imx_spidev_s g_spidev[] =
{
#ifndef CONFIG_SPI1_DISABLE
#ifdef CONFIG_IMX_SPI1
{
.ops = &g_spiops,
.base = IMX_CSPI1_VBASE,
@ -222,7 +222,7 @@ static struct imx_spidev_s g_spidev[] =
#endif
},
#endif
#ifndef CONFIG_SPI2_DISABLE
#ifdef CONFIG_IMX_SPI2
{
.ops = &g_spiops,
.base = IMX_CSPI2_VBASE,
@ -614,11 +614,11 @@ static inline struct imx_spidev_s *spi_mapirq(int irq)
{
switch (irq)
{
#ifndef CONFIG_SPI1_DISABLE
#ifdef CONFIG_IMX_SPI1
case IMX_IRQ_CSPI1:
return &g_spidev[SPI1_NDX];
#endif
#ifndef CONFIG_SPI2_DISABLE
#ifdef CONFIG_IMX_SPI2
case IMX_IRQ_CSPI2:
return &g_spidev[SPI2_NDX];
#endif
@ -1020,7 +1020,7 @@ FAR struct spi_dev_s *up_spiinitialize(int port)
switch (port)
{
#ifndef CONFIG_SPI1_DISABLE
#ifdef CONFIG_IMX_SPI1
case 1:
/* Select SPI1 */
@ -1035,9 +1035,9 @@ FAR struct spi_dev_s *up_spiinitialize(int port)
imxgpio_configpfinput(GPIOC, 16); /* Port C, pin 16: MISO */
imxgpio_configpfoutput(GPIOC, 17); /* Port C, pin 17: MOSI */
break;
#endif /* CONFIG_SPI1_DISABLE */
#endif /* CONFIG_IMX_SPI1 */
#ifndef CONFIG_SPI2_DISABLE
#ifdef CONFIG_IMX_SPI2
case 2:
/* Select SPI2 */
@ -1087,7 +1087,7 @@ FAR struct spi_dev_s *up_spiinitialize(int port)
imxgpio_configoutput(GPIOD, 10);
#endif
break;
#endif /* CONFIG_SPI2_DISABLE */
#endif /* CONFIG_IMX_SPI2 */
default:
return NULL;