MII definitions needed by ez80 EMAC driver
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include/nuttx/mii.h
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include/nuttx/mii.h
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/****************************************************************************
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* include/nuttx/mii.h
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*
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* Copyright (C) 2008 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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****************************************************************************/
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#ifndef __INCLUDE_NUTTX_MII_H
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#define __INCLUDE_NUTTX_MII_H
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <sys/types.h>
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/****************************************************************************
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* Pre-Processor Definitions
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****************************************************************************/
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/* MII register offsets */
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#define MII_BMCR 0x00 /* Basic mode control */
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#define MII_BMSR 0x01 /* Basic mode status */
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#define MII_PHYSID1 0x02 /* PHYS ID 1 */
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#define MII_PHYSID2 0x03 /* PHYS ID 2 */
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#define MII_ADVERTISE 0x04 /* Advertisement control */
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#define MII_LPA 0x05 /* Link partner ability */
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#define MII_EXPANSION 0x06 /* Expansion */
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#define MII_CTRL1000 0x09 /* 1000BASE-T control */
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#define MII_STAT1000 0x0a /* 1000BASE-T status */
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#define MII_ESTATUS 0x0f /* Extended Status */
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#define MII_DCOUNTER 0x12 /* Disconnect counter */
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#define MII_FCSCOUNTER 0x13 /* False carrier counter */
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#define MII_NWAYTEST 0x14 /* N-way auto-neg test reg */
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#define MII_RERRCOUNTER 0x15 /* Receive error counter */
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#define MII_SREVISION 0x16 /* Silicon revision */
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#define MII_LBRERROR 0x18 /* Lpback, rx, bypass error */
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#define MII_PHYADDR 0x19 /* PHY address */
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#define MII_TPISTATUS 0x1b /* TPI status for 10mbps */
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#define MII_NCONFIG 0x1c /* Network interface config */
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/* MII Control register bit definitions */
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#define MII_BMCR_SPEED1000 0x0040 /* MSB of Speed (1000) */
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#define MII_BMCR_CTST 0x0080 /* Collision test */
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#define MII_BMCR_FULLDPLX 0x0100 /* Full duplex */
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#define MII_BMCR_ANRESTART 0x0200 /* Auto negotiation restart */
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#define MII_BMCR_ISOLATE 0x0400 /* Disconnect DP83840 from MII */
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#define MII_BMCR_PDOWN 0x0800 /* Powerdown the DP83840 */
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#define MII_BMCR_ANENABLE 0x1000 /* Enable auto negotiation */
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#define MII_BMCR_SPEED100 0x2000 /* Select 100Mbps */
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#define MII_BMCR_LOOPBACK 0x4000 /* TXD loopback bits */
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#define MII_BMCR_RESET 0x8000 /* Reset the DP83840 */
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/* MII Status register bit definitions */
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#define MII_BMSR_ERCAP 0x0001 /* Ext-reg capability */
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#define MII_BMSR_JCD 0x0002 /* Jabber detected */
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#define MII_BMSR_LSTATUS 0x0004 /* Link status */
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#define MII_BMSR_ANEGCAPABLE 0x0008 /* Able to do auto-negotiation */
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#define MII_BMSR_RFAULT 0x0010 /* Remote fault detected */
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#define MII_BMSR_ANEGCOMPLETE 0x0020 /* Auto-negotiation complete */
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#define MII_BMSR_ESTATEN 0x0100 /* Extended Status in R15 */
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#define MII_BMSR_100FULL2 0x0200 /* Can do 100BASE-T2 HDX */
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#define MII_BMSR_100HALF2 0x0400 /* Can do 100BASE-T2 FDX */
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#define MII_BMSR_10HALF 0x0800 /* Can do 10mbps half-duplex */
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#define MII_BMSR_10FULL 0x1000 /* Can do 10mbps full-duplex */
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#define MII_BMSR_100HALF 0x2000 /* Can do 100mbps half-duplex */
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#define MII_BMSR_100FULL 0x4000 /* Can do 100mbps full-duplex */
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#define MII_BMSR_100BASE4 0x8000 /* Can do 100mbps 4k packets */
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/* Advertisement control register bit definitions */
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#define MII_ADVERTISE_SLCT 0x001f /* Selector bits */
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#define MII_ADVERTISE_CSMA 0x0001 /* Only selector supported */
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#define MII_ADVERTISE_10HALF 0x0020 /* Try for 10mbps half-duplex */
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#define MII_ADVERTISE_1000XFULL 0x0020 /* Try for 1000BASE-X full-duplex */
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#define MII_ADVERTISE_10FULL 0x0040 /* Try for 10mbps full-duplex */
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#define MII_ADVERTISE_1000XHALF 0x0040 /* Try for 1000BASE-X half-duplex */
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#define MII_ADVERTISE_100HALF 0x0080 /* Try for 100mbps half-duplex */
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#define MII_ADVERTISE_1000XPAUSE 0x0080 /* Try for 1000BASE-X pause */
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#define MII_ADVERTISE_100FULL 0x0100 /* Try for 100mbps full-duplex */
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#define MII_ADVERTISE_1000XPSE_ASYM 0x0100 /* Try for 1000BASE-X asym pause */
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#define MII_ADVERTISE_100BASE4 0x0200 /* Try for 100mbps 4k packets */
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#define MII_ADVERTISE_PAUSE_CAP 0x0400 /* Try for pause */
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#define MII_ADVERTISE_PAUSE_ASYM 0x0800 /* Try for asymetric pause */
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#define MII_ADVERTISE_RFAULT 0x2000 /* Say we can detect faults */
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#define MII_ADVERTISE_LPACK 0x4000 /* Ack link partners response */
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#define MII_ADVERTISE_NPAGE 0x8000 /* Next page bit */
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/* Link partner ability register bit definitions */
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#define MII_LPA_SLCT 0x001f /* Same as advertise selector */
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#define MII_LPA_10HALF 0x0020 /* Can do 10mbps half-duplex */
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#define MII_LPA_1000XFULL 0x0020 /* Can do 1000BASE-X full-duplex */
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#define MII_LPA_10FULL 0x0040 /* Can do 10mbps full-duplex */
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#define MII_LPA_1000XHALF 0x0040 /* Can do 1000BASE-X half-duplex */
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#define MII_LPA_100HALF 0x0080 /* Can do 100mbps half-duplex */
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#define MII_LPA_1000XPAUSE 0x0080 /* Can do 1000BASE-X pause */
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#define MII_LPA_100FULL 0x0100 /* Can do 100mbps full-duplex */
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#define MII_LPA_1000XPAUSE_ASYM 0x0100 /* Can do 1000BASE-X pause asym*/
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#define MII_LPA_100BASE4 0x0200 /* Can do 100mbps 4k packets */
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#define MII_LPA_PAUSE_CAP 0x0400 /* Can pause */
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#define MII_LPA_PAUSE_ASYM 0x0800 /* Can pause asymetrically */
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#define MII_LPA_RFAULT 0x2000 /* Link partner faulted */
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#define MII_LPA_LPACK 0x4000 /* Link partner acked us */
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#define MII_LPA_NPAGE 0x8000 /* Next page bit */
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/* MII Auto-negotiation expansion register bit definitions */
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#define MII_EXPANSION_NWAY 0x0001 /* Can do N-way auto-nego */
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#define MII_EXPANSION_LCWP 0x0002 /* Got new RX page code word */
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#define MII_EXPANSION_ENABLENPAGE 0x0004 /* This enables npage words */
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#define MII_EXPANSION_NPCAPABLE 0x0008 /* Link partner supports npage */
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#define MII_EXPANSION_MFAULTS 0x0010 /* Multiple faults detected */
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/* MII ID2 register bits */
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#define MII_ID2_OUI_LO 0xfc00 /* Low bits of OUI mask */
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#define MII_ID2_MODEL 0x03f0 /* Model number */
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#define MII_ID2_REV 0x000f /* Model number */
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/* MII PHYADDR register bit definitions */
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#define MII_PHYADDR_DUPLEX 0x0080
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#define MII_PHYADDR_SPEED 0x0040
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/****************************************************************************
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* Type Definitions
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****************************************************************************/
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/****************************************************************************
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* Public Function Prototypes
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****************************************************************************/
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#ifdef __cplusplus
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#define EXTERN extern "C"
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extern "C" {
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#else
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#define EXTERN extern
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#endif
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#undef EXTERN
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#ifdef __cplusplus
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}
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#endif
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#endif /* __INCLUDE_NUTTX_MII_H */
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