SAMA5D4-EK: LCDC works (with a few color problems)

This commit is contained in:
Gregory Nutt 2014-07-10 12:03:10 -06:00
parent f97113c5ef
commit 89024f3698
4 changed files with 17 additions and 6 deletions

View File

@ -1,7 +1,7 @@
/************************************************************************************
* arch/arm/src/sama5/chip/sam_lcdc.h
*
* Copyright (C) 2013 Gregory Nutt. All rights reserved.
* Copyright (C) 2013-2014 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without

View File

@ -1281,8 +1281,8 @@ static void sam_dmasetup(int lid, struct sam_dscr_s *dscr, uint8_t *buffer)
/* 31.6.2.2 Programming a DMA Channel:
*
* 4. Write the DSCR.CHXNEXT register with the address location
* of the descriptor structure and set DFETCH field of the
* DSCR.CHXCTRL register to one.
* of the descriptor structure and set DFETCH field of the
* DSCR.CHXCTRL register to one.
*/
sam_putreg(g_layeraddr[lid], physbuffer);
@ -2267,6 +2267,7 @@ static void sam_lcd_enable(void)
regval = LCDC_LCDCFG5_HSPOL | LCDC_LCDCFG5_VSPOL |
LCDC_LCDCFG5_VSPDLYS | LCDC_LCDCFG5_DISPDLY |
LCDC_LCDCFG5_GUARDTIME(BOARD_LCDC_GUARDTIME);
#if BOARD_LCDC_OUTPUT_BPP == 16
regval |= LCDC_LCDCFG5_MODE_12BPP;
#elif BOARD_LCDC_OUTPUT_BPP == 16
@ -2278,6 +2279,7 @@ static void sam_lcd_enable(void)
#else
# error Unknown or undefined output resolution
#endif
sam_putreg(SAM_LCDC_LCDCFG5, regval);
regval = BOARD_LCDC_PWMPS | BOARD_LCDC_PWMPOL |

View File

@ -2846,7 +2846,7 @@ TM7000 LCD/Touchscreen
LCD_DAT8_PA8 J9 pin 26 LCD_DATA_8 J4 pin 26 LCD
LCD_DAT9_PA9 J9 pin 27 LCD_DATA_9 J4 pin 27 LCD
LCD_DAT10_PA10 J9 pin 28 LCD_DATA_10 J4 pin 28 LCD
LCD_DAT11_PA11 J9 pin 29 LCD_DATA_ 1 J4 pin 29 LCD
LCD_DAT11_PA11 J9 pin 29 LCD_DATA_11 J4 pin 29 LCD
LCD_DAT12_PA12 J9 pin 16 LCD_DATA_12 J4 pin 16 LCD
LCD_DAT13_PA13 J9 pin 12 LCD_DATA_13 J4 pin 12 LCD
LCD_DAT14_PA14 J9 pin 14 LCD_DATA_14 J4 pin 14 LCD

View File

@ -169,12 +169,11 @@
/* LCD Interface, Geometry and Timing ***********************************************/
#define BOARD_LCDC_OUTPUT_BPP 24 /* Output format to H/W is 24BPP RGB */
#define BOARD_LCDC_OUTPUT_BPP 18 /* Output format to H/W is 18BPP RGB666 */
#define BOARD_LCDC_WIDTH 800 /* Display width (pixels) */
#define BOARD_LCDC_HEIGHT 480 /* Display height (rows) */
#undef BOARD_LCDC_MCK_MUL2 /* Source clock is Mck (vs 2*Mck) */
#define BOARD_LCDC_PIXCLK_INV 1 /* Invert pixel clock, use falling edge */
#define BOARD_LCDC_PIXELCLOCK 33260000 /* Pixel clock frequency */
#define BOARD_LCDC_GUARDTIME 9 /* Guard time (frames) */
#define BOARD_LCDC_VSPW 2 /* Vertical pulse width (lines) */
#define BOARD_LCDC_HSPW 128 /* Horizontal pulse width (LCDDOTCLK) */
@ -183,6 +182,16 @@
#define BOARD_LCDC_HFPW 168 /* Horizontal front porch (LCDDOTCLK) */
#define BOARD_LCDC_HBPW 88 /* Horizontal back porch (LCDDOTCLK) */
/* Pixel clock rate in Hz (HS period * VS period * BOARD_LCDC_FRAMERATE). */
#define BOARD_LCDC_FRAMERATE 40 /* Frame rate in Hz */
#define BOARD_LCDC_HSPERIOD \
(BOARD_LCDC_HSPW + BOARD_LCDC_HBPW + BOARD_LCDC_WIDTH + BOARD_LCDC_HFPW)
#define BOARD_LCDC_VSPERIOD \
(BOARD_LCDC_VSPW + BOARD_LCDC_VBPW + BOARD_LCDC_HEIGHT + BOARD_LCDC_VFPW)
#define BOARD_LCDC_PIXELCLOCK \
(BOARD_LCDC_HSPERIOD * BOARD_LCDC_VSPERIOD * BOARD_LCDC_FRAMERATE)
/* Backlight prescaler value and PWM output polarity */
#define BOARD_LCDC_PWMPS LCDC_LCDCFG6_PWMPS_DIV1