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Add configuration support for the EFM32 Gecko Starter Kit

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This commit is contained in:
Gregory Nutt 2014-10-17 09:25:52 -06:00
parent 0aea891272
commit 895cfe0e7c
3 changed files with 194 additions and 0 deletions
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11
arch/arm/Kconfig
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@ -46,6 +46,13 @@ config ARCH_CHIP_DM320
---help---
TI DMS320 DM320 (ARM926EJS)
config ARCH_CHIP_EFM32
bool "Energy Micro"
select ARCH_HAVE_CMNVECTOR
select ARMV7M_CMNVECTOR
---help---
Energy Micro EFM32 microcontrollers (ARM Cortex-M).
config ARCH_CHIP_IMX
bool "Freescale iMX"
select ARCH_ARM920T
@ -239,6 +246,7 @@ config ARCH_CHIP
default "c5471" if ARCH_CHIP_C5471
default "calypso" if ARCH_CHIP_CALYPSO
default "dm320" if ARCH_CHIP_DM320
default "efm32" if ARCH_CHIP_EFM32
default "imx" if ARCH_CHIP_IMX
default "kinetis" if ARCH_CHIP_KINETIS
default "kl" if ARCH_CHIP_KL
@ -359,6 +367,9 @@ endif
if ARCH_CHIP_DM320
source arch/arm/src/dm320/Kconfig
endif
if ARCH_CHIP_EFM32
source arch/arm/src/efm32/Kconfig
endif
if ARCH_CHIP_IMX
source arch/arm/src/imx/Kconfig
endif

126
arch/arm/include/efm32/chip.h Executable file
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@ -0,0 +1,126 @@
/************************************************************************************
* arch/arm/include/efm32/chip.h
*
* Copyright (C) 2014 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
*
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in
* the documentation and/or other materials provided with the
* distribution.
* 3. Neither the name NuttX nor the names of its contributors may be
* used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*
************************************************************************************/
#ifndef __ARCH_ARM_INCLUDE_EFM32_CHIP_H
#define __ARCH_ARM_INCLUDE_EFM32_CHIP_H
/************************************************************************************
* Included Files
************************************************************************************/
#include <nuttx/config.h>
/************************************************************************************
* Pre-processor Definitions
************************************************************************************/
/* EFM32 EnergyMicro ************************************************************/
/* Tiny Gecko with 32KiB FLASH and 4KiB RAM in a QFN64 package */
#if defined(CONFIG_ARCH_CHIP_EFM32TG840F32)
/* Gecko with 128KiB FLASH and 16KiB SRAM in LQFP100 (EFM32G880F128) or BGA112
* (EFM32G890F128) package
*/
#elif defined(CONFIG_ARCH_CHIP_EFM32G880F128) || \
defined(CONFIG_ARCH_CHIP_EFM32G890F128)
/* Giant Gecko with 1024KiB FLASH and 128KiB RAM in a QFP64 package */
#elif defined(CONFIG_ARCH_CHIP_EFM32GG332F1024)
#else
# error "Unsupported EFM32 chip"
#endif
/* NVIC priority levels *************************************************************/
#define NVIC_SYSH_PRIORITY_MIN 0xe0 /* Bits [7:5] set in minimum priority */
#define NVIC_SYSH_PRIORITY_DEFAULT 0x80 /* Midpoint is the default */
#define NVIC_SYSH_PRIORITY_MAX 0x00 /* Zero is maximum priority */
#define NVIC_SYSH_PRIORITY_STEP 0x20 /* Three bits of interrupt priority used */
/* If CONFIG_ARMV7M_USEBASEPRI is selected, then interrupts will be disabled
* by setting the BASEPRI register to NVIC_SYSH_DISABLE_PRIORITY so that most
* interrupts will not have execution priority. SVCall must have execution
* priority in all cases.
*
* In the normal cases, interrupts are not nest-able and all interrupts run
* at an execution priority between NVIC_SYSH_PRIORITY_MIN and
* NVIC_SYSH_PRIORITY_MAX (with NVIC_SYSH_PRIORITY_MAX reserved for SVCall).
*
* If, in addition, CONFIG_ARCH_HIPRI_INTERRUPT is defined, then special
* high priority interrupts are supported. These are not "nested" in the
* normal sense of the word. These high priority interrupts can interrupt
* normal processing but execute outside of OS (although they can "get back
* into the game" via a PendSV interrupt).
*
* In the normal course of things, interrupts must occasionally be disabled
* using the irqsave() inline function to prevent contention in use of
* resources that may be shared between interrupt level and non-interrupt
* level logic. Now the question arises, if CONFIG_ARCH_HIPRI_INTERRUPT,
* do we disable all interrupts (except SVCall), or do we only disable the
* "normal" interrupts. Since the high priority interrupts cannot interact
* with the OS, you may want to permit the high priority interrupts even if
* interrupts are disabled. The setting CONFIG_ARCH_INT_DISABLEALL can be
* used to select either behavior:
*
* ----------------------------+--------------+----------------------------
* CONFIG_ARCH_HIPRI_INTERRUPT | NO | YES
* ----------------------------+--------------+--------------+-------------
* CONFIG_ARCH_INT_DISABLEALL | N/A | YES | NO
* ----------------------------+--------------+--------------+-------------
* | | | SVCall
* | SVCall | SVCall | HIGH
* Disable here and below --------> MAXNORMAL ---> HIGH --------> MAXNORMAL
* | | MAXNORMAL |
* ----------------------------+--------------+--------------+-------------
*/
#if defined(CONFIG_ARCH_HIPRI_INTERRUPT) && defined(CONFIG_ARCH_INT_DISABLEALL)
# define NVIC_SYSH_MAXNORMAL_PRIORITY (NVIC_SYSH_PRIORITY_MAX + 2*NVIC_SYSH_PRIORITY_STEP)
# define NVIC_SYSH_HIGH_PRIORITY (NVIC_SYSH_PRIORITY_MAX + NVIC_SYSH_PRIORITY_STEP)
# define NVIC_SYSH_DISABLE_PRIORITY NVIC_SYSH_HIGH_PRIORITY
# define NVIC_SYSH_SVCALL_PRIORITY NVIC_SYSH_PRIORITY_MAX
#else
# define NVIC_SYSH_MAXNORMAL_PRIORITY (NVIC_SYSH_PRIORITY_MAX + NVIC_SYSH_PRIORITY_STEP)
# define NVIC_SYSH_HIGH_PRIORITY NVIC_SYSH_PRIORITY_MAX
# define NVIC_SYSH_DISABLE_PRIORITY NVIC_SYSH_MAXNORMAL_PRIORITY
# define NVIC_SYSH_SVCALL_PRIORITY NVIC_SYSH_PRIORITY_MAX
#endif
#endif /* __ARCH_ARM_INCLUDE_EFM32_CHIP_H */

57
arch/arm/src/efm32/Kconfig Executable file
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@ -0,0 +1,57 @@
#
# arch/arm/src/efm32/Kconfig
#
if ARCH_CHIP_EFM32
comment "EFM32 Configuration Options"
choice
prompt "EFM32 Chip Selection"
default ARCH_CHIP_EFM32TG840F32
config ARCH_CHIP_EFM32TG840F32
bool "EFM32TG840F32"
select EFM32_EFM32TG
select ARCH_CORTEXM3
---help---
This chip is a Tiny Gecko with 32 KB flash and 4 KB RAM in a QFN64
package
config ARCH_CHIP_EFM32G880F128
bool "EFM32G880F128"
select EFM32_EFM32G
select ARCH_CORTEXM3
---help---
This chip is a Gecko with 128KiB flash and 16KiB RAM in a LQFP100
package
config ARCH_CHIP_EFM32G890F128
bool "EFM32G890F128"
select EFM32_EFM32G
select ARCH_CORTEXM3
---help---
This chip is a Gecko with 128KiB flash and 16KiB RAM in a BGA112
package
config ARCH_CHIP_EFM32GG332F1024
bool "EFM32GG332F1024"
select EFM32_EFM32GG
select ARCH_CORTEXM3
---help---
This chip is a Giant Gecko with 1024KiB flash and 128KiB RAM in a
QFP64 package.
endchoice
config EFM32_EFM32TG
bool n
config EFM32_EFM32G
bool n
config EFM32_EFM32GG
bool n
endif