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rpmsg_port_spi: add nbits to spicfg

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Support more spi config paramters for Rpmsg Port SPI/SPI Slave

Signed-off-by: liaoao <liaoao@xiaomi.com>
This commit is contained in:
liaoao 2024-07-17 16:00:53 +08:00 committed by Xiang Xiao
parent d724ddce0b
commit 896f02bd67
3 changed files with 22 additions and 6 deletions
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9
drivers/rpmsg/rpmsg_port_spi.c
View File

@ -45,6 +45,8 @@
# define rpmsg_port_spi_crc16(hdr) 0
#endif
#define BYTES2WORDS(s,b) ((b) / ((s)->nbits >> 3))
/****************************************************************************
* Private Types
****************************************************************************/
@ -70,6 +72,7 @@ struct rpmsg_port_spi_s
/* SPI devices' configuration */
uint32_t devid;
int nbits;
/* Reserved for cmd send */
@ -292,7 +295,8 @@ static int rpmsg_port_spi_sreq_handler(FAR struct ioexpander_dev_s *dev,
rpmsginfo("irq send cmd:%u avail:%u\n", txhdr->cmd, txhdr->avail);
SPI_SELECT(rpspi->spi, rpspi->devid, true);
SPI_EXCHANGE(rpspi->spi, txhdr, rpspi->rxhdr, rpspi->cmdhdr->len);
SPI_EXCHANGE(rpspi->spi, txhdr, rpspi->rxhdr,
BYTES2WORDS(rpspi, rpspi->cmdhdr->len));
rpspi->rxavail = txhdr->avail;
return 0;
@ -470,7 +474,7 @@ rpmsg_port_spi_init_hardware(FAR struct rpmsg_port_spi_s *rpspi,
return ret;
}
SPI_SETBITS(spi, 8);
SPI_SETBITS(spi, spicfg->nbits);
SPI_SETMODE(spi, spicfg->mode);
SPI_SETFREQUENCY(spi, spicfg->freq);
SPI_REGISTERCALLBACK(spi, rpmsg_port_spi_complete_handler, rpspi);
@ -479,6 +483,7 @@ rpmsg_port_spi_init_hardware(FAR struct rpmsg_port_spi_s *rpspi,
rpspi->spi = spi;
rpspi->ioe = ioe;
rpspi->devid = spicfg->devid;
rpspi->nbits = spicfg->nbits;
return 0;
}

18
drivers/rpmsg/rpmsg_port_spi_slave.c
View File

@ -46,6 +46,8 @@
# define rpmsg_port_spi_crc16(hdr) 0
#endif
#define BYTES2WORDS(s,b) ((b) / ((s)->nbits >> 3))
/****************************************************************************
* Private Types
****************************************************************************/
@ -69,11 +71,17 @@ struct rpmsg_port_spi_s
uint8_t mreq;
uint8_t sreq;
/* SPI devices' configuration */
int nbits;
/* Reserved for cmd send */
FAR struct rpmsg_port_header_s *cmdhdr;
/* Used for sync data state between sreq_handler and complete_handler */
/* Used for sync data state between mreq_handler and
* rpmsg_port_spi_slave_notify
*/
FAR struct rpmsg_port_header_s *txhdr;
FAR struct rpmsg_port_header_s *rxhdr;
@ -193,7 +201,8 @@ void rpmsg_port_spi_exchange(FAR struct rpmsg_port_spi_s *rpspi)
rpmsginfo("send cmd:%u avail:%u\n", txhdr->cmd, txhdr->avail);
SPIS_CTRLR_ENQUEUE(rpspi->spictrlr, txhdr, rpspi->cmdhdr->len);
SPIS_CTRLR_ENQUEUE(rpspi->spictrlr, txhdr,
BYTES2WORDS(rpspi, rpspi->cmdhdr->len));
IOEXP_WRITEPIN(rpspi->ioe, rpspi->sreq, 1);
rpspi->rxavail = txhdr->avail;
@ -277,7 +286,7 @@ static size_t rpmsg_port_spi_slave_getdata(FAR struct spi_slave_dev_s *dev,
container_of(dev, struct rpmsg_port_spi_s, spislv);
*data = rpspi->rxhdr;
return rpspi->cmdhdr->len;
return BYTES2WORDS(rpspi, rpspi->cmdhdr->len);
}
/****************************************************************************
@ -543,7 +552,8 @@ rpmsg_port_spi_init_hardware(FAR struct rpmsg_port_spi_s *rpspi,
rpspi->ioe = ioe;
rpspi->spictrlr = spictrlr;
rpspi->spislv.ops = &g_rpmsg_port_spi_slave_ops;
SPIS_CTRLR_BIND(spictrlr, &rpspi->spislv, spicfg->mode, 8);
SPIS_CTRLR_BIND(spictrlr, &rpspi->spislv, spicfg->mode, spicfg->nbits);
rpspi->nbits = spicfg->nbits;
return 0;
}

1
include/nuttx/rpmsg/rpmsg_port.h
View File

@ -79,6 +79,7 @@ struct rpmsg_port_spi_config_s
int sreq_invert; /* Pin options described in ioexpander.h */
int mode; /* Mode of enum spi_mode_e */
int nbits;
uint32_t devid; /* Device ID of enum spi_devtype_e */
uint32_t freq; /* SPI frequency (Hz) */
};