Add LPCXpression SD card support
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@3508 42af7a65-404d-4744-a932-0658087f49c3
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@ -1,14 +1,14 @@
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README
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^^^^^^
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README for NuttX port to the Embedded Artists' LPCXpresso base board with
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README for NuttX port to the Embedded Artists' base board with the NXP
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the LPCXpresso daughter board.
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Contents
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^^^^^^^^
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LCPXpresso LPC1768 Board
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Jumpers
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Embedded Artist's Base Board
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Development Environment
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GNU Toolchain Options
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NuttX buildroot Toolchain
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@ -98,13 +98,34 @@ LCPXpresso LPC1768 Board
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P4[28]/RX-MCLK/MAT2.0/TXD3 PAD15 N/A
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P4[29]/TX-MCLK/MAT2.1/RXD3 PAD16 N/A
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Embedded Artist's Base Board
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^^^^^^^^^^^^^^^^^^^^^^^^^^^^
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Jumpers
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^^^^^^^
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-------
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There are many jumpers on the base board. A usable combination is the
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default jumper settings WITH the two J54 jumpers both removed. Those
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jumpers are for ISP support and will cause the board to reset.
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To use the SD, J55 must be set to provide chip select PIO1_11 signal as
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the SD slot chip select.
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SD Slot
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-------
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Base-board J4/J6 LPC1768
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SD Signal Pin Pin
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--- ----------- ----- --------
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CS PIO1_11* 55 P2.2
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DIN PIO0_9-MOSI 5 P0.9 MOSI1
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DOUT PIO0_8-MISO 6 P0.8 MISO1
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CLK PIO2_11-SCK 7 P0.9 SCK1
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CD PIO2_10 52 P2.11
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*J55 must be set to provide chip select PIO1_11 signal as the SD slot
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chip select.
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Development Environment
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^^^^^^^^^^^^^^^^^^^^^^^
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@ -117,7 +117,7 @@ CONFIG_LPC17_CAN1=n
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CONFIG_LPC17_CAN2=n
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CONFIG_LPC17_SPI=n
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CONFIG_LPC17_SSP0=n
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CONFIG_LPC17_SSP1=n
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CONFIG_LPC17_SSP1=y
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CONFIG_LPC17_I2C0=n
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CONFIG_LPC17_I2C1=n
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CONFIG_LPC17_I2S=n
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@ -332,7 +332,6 @@ CONFIG_HAVE_LIBM=n
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CONFIG_DEBUG=n
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CONFIG_DEBUG_VERBOSE=n
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CONFIG_DEBUG_SYMBOLS=n
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CONFIG_DEBUG_USB=n
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CONFIG_MM_REGIONS=2
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CONFIG_ARCH_LOWPUTC=y
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CONFIG_RR_INTERVAL=200
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@ -836,7 +835,7 @@ CONFIG_NSH_FATMOUNTPT=/tmp
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#
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# Architecture-specific NSH options
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#
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CONFIG_NSH_MMCSDSPIPORTNO=0
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CONFIG_NSH_MMCSDSPIPORTNO=1
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CONFIG_NSH_MMCSDSLOTNO=0
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CONFIG_NSH_MMCSDMINOR=0
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@ -780,7 +780,7 @@ CONFIG_NSH_FATMOUNTPT=/tmp
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#
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# Architecture-specific NSH options
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#
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CONFIG_NSH_MMCSDSPIPORTNO=0
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CONFIG_NSH_MMCSDSPIPORTNO=1
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CONFIG_NSH_MMCSDSLOTNO=0
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CONFIG_NSH_MMCSDMINOR=0
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@ -39,9 +39,11 @@ CFLAGS += -I$(TOPDIR)/sched
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ASRCS =
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CSRCS = up_boot.c up_leds.c up_ssp.c
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ifeq ($(CONFIG_NSH_ARCHINIT),y)
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CSRCS += up_nsh.c
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endif
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ifeq ($(CONFIG_USBSTRG),y)
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CSRCS += up_usbstrg.c
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endif
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@ -134,6 +134,25 @@
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* P4[28]/RX-MCLK/MAT2.0/TXD3 PAD15 N/A
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* P4[29]/TX-MCLK/MAT2.1/RXD3 PAD16 N/A
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*/
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/* SD Slot
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*
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* Base-board J4/J6 LPC1768
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* SD Signal Pin Pin
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* --- ----------- ----- --------
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* CS PIO1_11* 55 P2.2 (See GPIO_SD_CS)
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* DIN PIO0_9-MOSI 5 P0.9 MOSI1 (See GPIO_SSP1_MOSI in lpc17_internal.h)
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* DOUT PIO0_8-MISO 6 P0.8 MISO1 (See GPIO_SSP1_MISO in lpc17_internal.h)
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* CLK PIO2_11-SCK 7 P0.9 SCK1 (See GPIO_SSP1_SCK in board.h)
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* CD PIO2_10 52 P2.11 (See GPIO_SD_CD)
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*/
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#define GPIO_SD_CS (GPIO_OUTPUT | GPIO_VALUE_ONE | GPIO_PORT2 | GPIO_PIN2)
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#ifdef CONFIG_GPIO_IRQ
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# define GPIO_SD_CD (GPIO_INTBOTH | GPIO_PULLUP | GPIO_PORT2 | GPIO_PIN11)
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#else
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# define GPIO_SD_CD (GPIO_INPUT | GPIO_PULLUP | GPIO_PORT2 | GPIO_PIN11)
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#endif
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/************************************************************************************
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* Public Types
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@ -57,8 +57,8 @@
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#ifdef CONFIG_ARCH_BOARD_LPCXPRESSO
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# define CONFIG_NSH_HAVEUSBDEV 1
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# ifdef CONFIG_LPC17_SSP0
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# define CONFIG_NSH_HAVEMMCSD 1
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# ifdef CONFIG_LPC17_SSP1
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# define CONFIG_NSH_HAVEMMCSD 1
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# else
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# undef CONFIG_NSH_HAVEMMCSD
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# endif
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@ -71,13 +71,13 @@
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/* Do we have SPI support for MMC/SD? */
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#ifdef CONFIG_NSH_HAVEMMCSD
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# if !defined(CONFIG_NSH_MMCSDSPIPORTNO) || CONFIG_NSH_MMCSDSPIPORTNO != 0
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# error "The LPCXpresso MMC/SD is on SSP0"
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# if !defined(CONFIG_NSH_MMCSDSPIPORTNO) || CONFIG_NSH_MMCSDSPIPORTNO != 1
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# error "The LPCXpresso MMC/SD is on SSP1"
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# undef CONFIG_NSH_MMCSDSPIPORTNO
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# define CONFIG_NSH_MMCSDSPIPORTNO 0
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# define CONFIG_NSH_MMCSDSPIPORTNO 1
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# endif
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# if !defined(CONFIG_NSH_MMCSDSLOTNO) || CONFIG_NSH_MMCSDSLOTNO != 0
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# error "The LPCXpresso MMC/SD is only one slot (0)"
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# error "The LPCXpresso MMC/SD has only one slot (0)"
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# undef CONFIG_NSH_MMCSDSLOTNO
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# define CONFIG_NSH_MMCSDSLOTNO 0
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# endif
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@ -2,7 +2,7 @@
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* configs/lpcxpresso-lpc1768/src/up_ssp.c
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* arch/arm/src/board/up_ssp.c
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*
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* Copyright (C) 2010 Gregory Nutt. All rights reserved.
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* Copyright (C) 2011 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
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*
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* Redistribution and use in source and binary forms, with or without
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@ -107,7 +107,16 @@ void weak_function lpc17_sspinitialize(void)
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/* Configure the SPI-based microSD CS GPIO */
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ssp_dumpgpio("lpc17_sspinitialize() Entry)");
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#warning "Configure chip selects here"
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/* Configure card detect and chip select for the SD slot. NOTE: Jumper J55 must
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* be set correctly for the SD slot chip select.
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*/
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#ifdef CONFIG_LPC17_SSP1
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(void)lpc17_configgpio(GPIO_SD_CS);
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(void)lpc17_configgpio(GPIO_SD_CD);
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#endif
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ssp_dumpgpio("lpc17_sspinitialize() Exit");
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}
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@ -140,11 +149,11 @@ void weak_function lpc17_sspinitialize(void)
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void lpc17_ssp0select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
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{
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sspdbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
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ssp_dumpgpio("lpc17_spiselect() Entry");
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ssp_dumpgpio("lpc17_spi0select() Entry");
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#warning "Assert CS here (false)"
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ssp_dumpgpio("lpc17_spiselect() Exit");
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ssp_dumpgpio("lpc17_spi0select() Exit");
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}
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uint8_t lpc17_ssp0status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
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@ -155,7 +164,37 @@ uint8_t lpc17_ssp0status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
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#endif
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#ifdef CONFIG_LPC17_SSP1
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# warning "SSP1 chip selects not known"
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void lpc17_ssp1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, bool selected)
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{
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sspdbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
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ssp_dumpgpio("lpc17_spi1select() Entry");
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if (devid == SPIDEV_MMCSD)
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{
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/* Assert/de-assert the CS pin to the card */
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(void)lpc17_gpiowrite(GPIO_SD_CS, !selected);
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}
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ssp_dumpgpio("lpc17_spi1select() Exit");
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}
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uint8_t lpc17_ssp1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
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{
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if (devid == SPIDEV_MMCSD)
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{
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/* Read the state of the card-detect bit */
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if (lpc17_gpioread(GPIO_SD_CD) == 0)
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{
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sspdbg("Returning SPI_STATUS_PRESENT\n");
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return SPI_STATUS_PRESENT;
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}
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}
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sspdbg("Returning zero\n");
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return 0;
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}
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#endif
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#endif /* CONFIG_LPC17_SSP0 || CONFIG_LPC17_SSP1 */
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