Implement CONFIG_BUILD_PROTECTED with MMU
NOTE: THIS ONLY WORKS WHEN KERNEL RUNS IN M-MODE FOR NOW This frees the PMP for other use, e.g. HART memory separation. The page tables are statically allocated, 1 per level. This feature is now behind CONFIG_MPFS_USE_MMU_AS_MPU, because only the MPFS target supports this (others are not tested). If the MMU is used for memory separation within a HART, the PMP must still be configured to allow user access to the memory mapped for the HART, because PMP *rekoves* access by default. At this point all of the user memory as well as the kernel RAM are opened. A more flexible solution for PMP configuration will follow.
This commit is contained in:
Ville Juven
Xiang Xiao
parent
7eb726d57f
commit
8a4881c4e5
@ -312,5 +312,3 @@ config MPFS_DMA
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menu "MPFS Others"
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endmenu
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@ -31,6 +31,7 @@
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#include "mpfs_userspace.h"
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#include "riscv_internal.h"
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#include "riscv_mmu.h"
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#ifdef CONFIG_BUILD_PROTECTED
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@ -38,18 +39,79 @@
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* Pre-processor Definitions
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****************************************************************************/
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/* Physical and virtual addresses to page tables (vaddr = paddr mapping) */
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#define PGT_BASE_PADDR (uint64_t)&m_l1_pgtable
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#define PGT_L2_PBASE (uint64_t)&m_l2_pgtable
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#define PGT_L3_PBASE (uint64_t)&m_l3_pgtable
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#define PGT_L2_VBASE PGT_L2_PBASE
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#define PGT_L3_VBASE PGT_L3_PBASE
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/* Flags for user FLASH (RX) and user RAM (RW) */
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#define MMU_UFLASH_FLAGS (PTE_R | PTE_X | PTE_U | PTE_G)
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#define MMU_USRAM_FLAGS (PTE_R | PTE_W | PTE_U | PTE_G)
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/****************************************************************************
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* Public Functions
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* Private Functions
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****************************************************************************/
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/****************************************************************************
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* Name: configure_mpu
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*
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* Description:
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* This function configures the MPU for for kernel- / userspace separation.
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* It will also grant access to the page table memory for the supervisor.
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*
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****************************************************************************/
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static void configure_mpu(void);
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/****************************************************************************
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* Name: configure_mmu
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*
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* Description:
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* This function configures the MMU and page tables for kernel- / userspace
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* separation.
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*
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****************************************************************************/
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static void configure_mmu(void);
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/****************************************************************************
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* Private Data
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****************************************************************************/
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/* With a 3 level page table setup the total available memory is 512GB.
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* However, this is overkill. A single L3 page table can map 2MB of memory,
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* and for MPFS, this user space is plenty enough. If more memory is needed,
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* simply increase the size of the L3 page table (n * 512), where each 'n'
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* provides 2MB of memory.
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*/
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/* L1-L3 tables must be in memory always for this to work */
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static uint64_t m_l1_pgtable[512] locate_data(".pgtables");
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static uint64_t m_l2_pgtable[512] locate_data(".pgtables");
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static uint64_t m_l3_pgtable[512] locate_data(".pgtables");
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/****************************************************************************
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* Public Data
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****************************************************************************/
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extern uintptr_t __uflash_start;
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extern uintptr_t __uflash_size;
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extern uintptr_t __usram_start;
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extern uintptr_t __usram_size;
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extern uintptr_t __uflash_start;
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extern uintptr_t __uflash_size;
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extern uintptr_t __usram_start;
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extern uintptr_t __usram_size;
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/* Needed to allow access to the page tables, which reside in kernel RAM */
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extern uintptr_t __ksram_start;
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extern uintptr_t __ksram_size;
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/****************************************************************************
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* Public Functions
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****************************************************************************/
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/****************************************************************************
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* Name: mpfs_userspace
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@ -96,6 +158,23 @@ void mpfs_userspace(void)
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*dest++ = *src++;
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}
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/* Configure MPU / PMP to grant access to the userspace */
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configure_mpu();
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configure_mmu();
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}
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/****************************************************************************
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* Name: configure_mpu
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*
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* Description:
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* This function configures the MPU for for kernel- / userspace separation.
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* It will also grant access to the page table memory for the supervisor.
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*
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****************************************************************************/
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static void configure_mpu(void)
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{
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/* Configure the PMP to permit user-space access to its ROM and RAM.
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*
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* Note: PMP by default revokes access, thus if different privilege modes
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@ -126,6 +205,47 @@ void mpfs_userspace(void)
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riscv_config_pmp_region(1, PMPCFG_A_NAPOT | PMPCFG_W | PMPCFG_R,
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(uintptr_t)&__usram_start,
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(uintptr_t)&__usram_size);
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/* The supervisor must have access to the page tables */
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riscv_config_pmp_region(2, PMPCFG_A_NAPOT | PMPCFG_W | PMPCFG_R,
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(uintptr_t)&__ksram_start,
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(uintptr_t)&__ksram_size);
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}
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/****************************************************************************
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* Name: configure_mmu
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*
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* Description:
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* This function configures the MMU and page tables for kernel- / userspace
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* separation.
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*
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****************************************************************************/
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static void configure_mmu(void)
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{
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/* Setup MMU for user */
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/* Setup the L3 references for executable memory */
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mmu_ln_map_region(3, PGT_L3_VBASE, (uintptr_t)&__uflash_start,
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(uintptr_t)&__uflash_start, (uintptr_t)&__uflash_size,
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MMU_UFLASH_FLAGS);
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/* Setup the L3 references for data memory */
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mmu_ln_map_region(3, PGT_L3_VBASE, (uintptr_t)&__usram_start,
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(uintptr_t)&__usram_start, (uintptr_t)&__usram_size,
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MMU_USRAM_FLAGS);
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/* Setup the L2 and L1 references */
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mmu_ln_setentry(2, PGT_L2_VBASE, PGT_L3_PBASE, PGT_L3_VBASE, PTE_G);
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mmu_ln_setentry(1, PGT_BASE_PADDR, PGT_L2_PBASE, PGT_L2_VBASE, PTE_G);
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/* Enable MMU */
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mmu_enable(PGT_BASE_PADDR, 0);
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}
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#endif /* CONFIG_BUILD_PROTECTED */
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@ -16,6 +16,7 @@ CONFIG_ARCH_CHIP_MPFS=y
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CONFIG_ARCH_INTERRUPTSTACK=2048
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CONFIG_ARCH_RISCV=y
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CONFIG_ARCH_STACKDUMP=y
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CONFIG_ARCH_USE_MMU=y
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CONFIG_ARCH_USE_MPU=y
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CONFIG_BOARD_LOOPSPERMSEC=54000
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CONFIG_BUILD_PROTECTED=y
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@ -86,7 +86,12 @@ SECTIONS
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*(.gnu.linkonce.b.*)
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*(.gnu.linkonce.sb.*)
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*(COMMON)
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. = ALIGN(4);
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} > ksram
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/* Page tables here, align to 4K boundary */
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.pgtables : ALIGN(0x1000) {
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*(.pgtables)
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. = ALIGN(4);
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_ebss = ABSOLUTE(.);
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} > ksram
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