STM32 DAC output buffers correct enable.
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@ -87,7 +87,8 @@
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/* These definitions may be used for 16-bit values of either channel */
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#define DAC_CR_EN (1 << 0) /* Bit 0: DAC channel enable */
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#define DAC_CR_BOFF (1 << 1) /* Bit 1: DAC channel output buffer disable */
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#define DAC_CR_BOFF (1 << 1) /* Bit 1: 1=DAC channel output buffer disable */
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#define DAC_CR_BOFF_EN (0 << 1) /* Bit 1: 0=DAC channel output buffer enable */
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#define DAC_CR_TEN (1 << 2) /* Bit 2: DAC channel trigger enable */
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#define DAC_CR_TSEL_SHIFT (3) /* Bits 3-5: DAC channel trigger selection */
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#define DAC_CR_TSEL_MASK (7 << DAC_CR_TSEL_SHIFT)
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@ -999,7 +999,7 @@ static int dac_chaninit(FAR struct stm32_chan_s *chan)
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chan->tsel | /* Set trigger source (SW or timer TRGO event) */
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DAC_CR_MAMP_AMP1 | /* Set waveform characteristics */
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DAC_CR_WAVE_DISABLED | /* Set no noise */
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DAC_CR_BOFF; /* Enable output buffer */
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DAC_CR_BOFF_EN; /* Enable output buffer */
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stm32_dac_modify_cr(chan, clearbits, setbits);
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#ifdef HAVE_DMA
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