More updates for PIC32 MX1/2 device configuration bits
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@4857 42af7a65-404d-4744-a932-0658087f49c3
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patacongo
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@ -714,6 +714,14 @@
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# error "Unsupported BOARD_UPLL_IDIV"
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#endif
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#ifndef CONFIG_PIC32MX_FUPLLEN
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# if defined(CHIP_PIC32MX3) || defined(CHIP_PIC32MX4)
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# define CONFIG_PIC32MX_FUPLLEN 0 /* Bypass and disable */
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# else
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# define CONFIG_PIC32MX_FUPLLEN 1 /* Bypass and disable */
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# endif
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#endif
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#undef CONFIG_PIC32MX_PLLODIV
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#if BOARD_PLL_ODIV == 1
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# define CONFIG_PIC32MX_PLLODIV DEVCFG2_FPLLODIV_DIV1
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@ -805,6 +813,10 @@
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# define CONFIG_PIC32MX_FCKSM DEVCFG1_FCKSM_NONE
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#endif
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#ifndef CONFIG_PIC32MX_OSCOUT
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# define CONFIG_PIC32MX_OSCOUT 0
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#endif
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#undef CONFIG_PIC32MX_WDPS
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#if BOARD_WD_PRESCALER == 1
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# define CONFIG_PIC32MX_WDPS DEVCFG1_WDTPS_1
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@ -866,12 +878,20 @@
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#endif
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#ifndef CONFIG_PIC32MX_ICESEL /* In-Circuit Emulator/Debugger Communication Channel Select */
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# define CONFIG_PIC32MX_ICESEL 1 /* default */
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# if defined(CHIP_PIC32MX1) || defined(CHIP_PIC32MX2)
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# define CONFIG_PIC32MX_ICESEL 3 /* Default PGEC1/PGED1 */
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# else
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# define CONFIG_PIC32MX_ICESEL 1 /* Default PGEC1/PGED1 */
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# endif
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#endif
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#ifndef CONFIG_PIC32MX_PROGFLASHWP /* Program FLASH write protect */
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# if defined(CHIP_PIC32MX1) || defined(CHIP_PIC32MX2)
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# define CONFIG_PIC32MX_PROGFLASHWP 0x3ff /* Disabled */
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# else
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# define CONFIG_PIC32MX_PROGFLASHWP 0xff /* Disabled */
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# endif
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#endif
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#ifndef CONFIG_PIC32MX_BOOTFLASHWP
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# define CONFIG_PIC32MX_BOOTFLASHWP 1 /* Disabled */
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@ -193,10 +193,10 @@
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# define DEVCFG1_WDTPS_262144 (18 << DEVCFG1_WDTPS_SHIFT) /* 1:262144 */
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# define DEVCFG1_WDTPS_524288 (19 << DEVCFG1_WDTPS_SHIFT) /* 1:524288 */
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# define DEVCFG1_WDTPS_1048576 (20 << DEVCFG1_WDTPS_SHIFT) /* 1:1048576 */
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#define DEVCFG1_WINDIS (1 << 22) /* Bit 22: Windowed watchdog timer enable */
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#define DEVCFG1_FWDTEN (1 << 23) /* Bit 23: WDT enable */
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#if defined(CHIP_PIC32MX1) || defined(CHIP_PIC32MX2)
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# define DEVCFG1_WINDIS (1 << 22) /* Bit 22: Windowed watchdog timer enable */
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# define DEVCFG1_FWDTWINSZ_SHIFT (24) /* Bits 24-25: Watchdog Timer Window Size bits */
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# define DEVCFG1_FWDTWINSZ_MASK (3 << DEVCFG1_FWDTWINSZ_SHIFT)
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# define DEVCFG1_FWDTWINSZ_25 (0 << DEVCFG1_FWDTWINSZ_SHIFT) /* 25% */
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@ -205,11 +205,35 @@
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# define DEVCFG1_FWDTWINSZ_75 (3 << DEVCFG1_FWDTWINSZ_SHIFT) /* 75% */
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# define DEVCFG1_UNUSED 0xfc200858 /* Bits 3-4, 6, 11, 21, 26-31 */
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#else
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# define DEVCFG1_UNUSED 0xff200858 /* Bits 3-4, 6, 11, 21, 24-31 */
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# define DEVCFG1_UNUSED 0xff600858 /* Bits 3-4, 6, 11, 21-22, 24-31 */
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#endif
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/* Device configuration word 0 */
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#if defined(CHIP_PIC32MX1) || defined(CHIP_PIC32MX2)
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# define PWP_CODE(a) REVISIT (((~((a) >> 12)) - 1) & 0x3ff)
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# define DEVCFG0_DEBUG_SHIFT (0) /* Bits 0-1: Background debugger enable */
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# define DEVCFG0_DEBUG_MASK (3 << DEVCFG0_DEBUG_SHIFT)
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# define DEVCFG0_DEBUG_ENABLED (1 << DEVCFG0_DEBUG_SHIFT)
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# define DEVCFG0_DEBUG_DISABLED (3 << DEVCFG0_DEBUG_SHIFT)
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# define DEVCFG0_JTAGEN (1 << 2) /* Bit 2: JTAG enable */
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# define DEVCFG0_ICESEL_SHIFT (3) /* Bits 3-4: Background debugger enable */
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# define DEVCFG0_ICESEL_MASK (3 << DEVCFG0_ICESEL_SHIFT)
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# define DEVCFG0_ICESEL_CHAN4 (0 << DEVCFG0_ICESEL_SHIFT) /* PGEC4/PGED4 pair is used */
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# define DEVCFG0_ICESEL_CHAN3 (1 << DEVCFG0_ICESEL_SHIFT) /* PGEC3/PGED3 pair is used */
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# define DEVCFG0_ICESEL_CHAN2 (2 << DEVCFG0_ICESEL_SHIFT) /* PGEC2/PGED2 pair is used */
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# define DEVCFG0_ICESEL_CHAN1 (3 << DEVCFG0_ICESEL_SHIFT) /* PGEC1/PGED1 pair is used */
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# define DEVCFG0_PWP_SHIFT (10) /* Bits 10-15: Program flash write-protect */
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# define DEVCFG0_PWP_MASK (0x3ff << DEVCFG0_PWP_SHIFT)
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# define DEVCFG0_PWP_DISABLE (0x3ff << DEVCFG0_PWP_SHIFT)
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# define DEVCFG0_PWP(code) ((code) << DEVCFG0_PWP_SHIFT) /* See PWP_CODE above */
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# define DEVCFG0_BWP (1 << 24) /* Bit 24: Boot flash write-protect */
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# define DEVCFG0_CP (1 << 28) /* Bit 28: Code-protect */
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# define DEVCFG0_SIGN (1 << 31) /* Bit 31: Signature */
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# define DEVCFG0_UNUSED 0x6eff03e0 /* Bits 5-9, 16-23, 25-27, 29-30 */
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#else
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# define PWP_CODE(a) (((~((a) >> 12)) - 1) & 0xff)
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# define DEVCFG0_DEBUG_SHIFT (0) /* Bits 0-1: Background debugger enable */
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@ -224,7 +248,9 @@
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# define DEVCFG0_BWP (1 << 24) /* Bit 24: Boot flash write-protect */
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# define DEVCFG0_CP (1 << 28) /* Bit 28: Code-protect */
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# define DEVCFG0_SIGN (1 << 31) /* Bit 31: Signature */
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# define DEVCFG0_UNUSED 0x6ef00ff0 /* Bits 4-11, 20-23, 25-27, 29-30 */
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#endif
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/****************************************************************************
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* Public Types
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@ -614,21 +614,41 @@ devconfig3:
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devconfig2:
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.long CONFIG_PIC32MX_PLLIDIV | CONFIG_PIC32MX_PLLMULT | \
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CONFIG_PIC32MX_UPLLIDIV | CONFIG_PIC32MX_PLLODIV | \
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DEVCFG2_UNUSED
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CONFIG_PIC32MX_FUPLLEN << 15 | DEVCFG2_UNUSED
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devconfig1:
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#if defined(CHIP_PIC32MX1) || defined(CHIP_PIC32MX2)
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.long CONFIG_PIC32MX_FNOSC | CONFIG_PIC32MX_FSOSCEN | \
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CONFIG_PIC32MX_IESO | CONFIG_PIC32MX_POSCMOD | \
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CONFIG_PIC32MX_OSCOUT << 10 | \
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CONFIG_PIC32MX_PBDIV | CONFIG_PIC32MX_FCKSM | \
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DEVCFG1_WINDIS | CONFIG_PIC32MX_WDENABLE | \
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DEVCFG1_FWDTWINSZ_75 | DEVCFG1_UNUSED
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#else
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.long CONFIG_PIC32MX_FNOSC | CONFIG_PIC32MX_FSOSCEN | \
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CONFIG_PIC32MX_IESO | CONFIG_PIC32MX_POSCMOD | \
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CONFIG_PIC32MX_OSCOUT << 10 | \
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CONFIG_PIC32MX_PBDIV | CONFIG_PIC32MX_FCKSM | \
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CONFIG_PIC32MX_WDENABLE | DEVCFG1_UNUSED
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#endif
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devconfig0:
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#if defined(CHIP_PIC32MX1) || defined(CHIP_PIC32MX2)
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.long CONFIG_PIC32MX_DEBUGGER << DEVCFG0_DEBUG_SHIFT | \
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DEVCFG0_JTAGEN | \
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CONFIG_PIC32MX_ICESEL << DEVCFG0_ICESEL_SHIFT | \
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CONFIG_PIC32MX_PROGFLASHWP << DEVCFG0_PWP_SHIFT | \
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CONFIG_PIC32MX_BOOTFLASHWP << 24 | \
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CONFIG_PIC32MX_CODEWP << 28 | \
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DEVCFG0_UNUSED
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#else
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.long CONFIG_PIC32MX_DEBUGGER << DEVCFG0_DEBUG_SHIFT | \
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CONFIG_PIC32MX_ICESEL << 3 | \
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CONFIG_PIC32MX_PROGFLASHWP << DEVCFG0_PWP_SHIFT | \
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CONFIG_PIC32MX_BOOTFLASHWP << 24 | \
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CONFIG_PIC32MX_CODEWP << 28 | \
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DEVCFG0_UNUSED
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#endif
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.size devconfig, .-devconfig
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/****************************************************************************
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@ -167,13 +167,14 @@ CONFIG_PIC32MX_IOPORTC=y
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#
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# DEVCFG0:
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# CONFIG_PIC32MX_DEBUGGER - Background Debugger Enable. Default 3 (disabled). The
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# value 2 enables.
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# value 1 enables.
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# CONFIG_PIC32MX_ICESEL - In-Circuit Emulator/Debugger Communication Channel Select
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# Default 1 (PG2)
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# Default 3 (PG1)
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# CONFIG_PIC32MX_PROGFLASHWP - Program FLASH write protect. Default 0xff (disabled)
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# CONFIG_PIC32MX_BOOTFLASHWP - Default 1 (disabled)
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# CONFIG_PIC32MX_CODEWP - Default 1 (disabled)
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# DEVCFG1: (All settings determined by selections in board.h)
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# DEVCFG1: All settings determined by selections in board.h. Except
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# CONFIG_PIC32MX_OSCOUT - May be used to disable oscillator output (enabled by default)
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# DEVCFG2: (All settings determined by selections in board.h)
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# DEVCFG3:
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# CONFIG_PIC32MX_USBIDO - USB USBID Selection. Default 1 if USB enabled
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@ -183,8 +184,9 @@ CONFIG_PIC32MX_IOPORTC=y
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# CONFIG_PIC32MX_WDENABLE - Enabled watchdog on power up. Default 0 (watchdog
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# can be enabled later by software).
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#
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CONFIG_PIC32MX_DEBUGGER=2
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CONFIG_PIC32MX_ICESEL=1
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CONFIG_PIC32MX_DEBUGGER=1
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CONFIG_PIC32MX_ICESEL=2
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CONFIG_PIC32MX_OSCOUT=1
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#
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# PIC32MX specific serial device driver settings
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