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Tiva: Add a configuration setting to better distinguish TM4C123 and 129 families. Reanem tm4c_syscontrol.h to tm4c123_syscontrol.h; rename tm4c129x_syscontrol.h to tm4c129_syscontrol.h

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This commit is contained in:
Gregory Nutt 2014-12-20 08:38:11 -06:00
parent e0678813c1
commit 8aa9f27925
6 changed files with 37 additions and 22 deletions
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23
arch/arm/src/tiva/Kconfig
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@ -57,9 +57,8 @@ config ARCH_CHIP_LM4F120
config ARCH_CHIP_TM4C123GH6ZRB
bool "TM4C123GH6ZRB"
depends on ARCH_CHIP_TIVA
select ARCH_CORTEXM4
select ARCH_CHIP_TM4C
select ARCH_HAVE_FPU
select ARCH_CHIP_TM4C123
select TIVA_HAVE_GPIOQ_IRQS
select TIVA_HAVE_I2C4
select TIVA_HAVE_I2C5
@ -67,25 +66,20 @@ config ARCH_CHIP_TM4C123GH6ZRB
config ARCH_CHIP_TM4C123GH6PMI
bool "TM4C123GH6PMI"
depends on ARCH_CHIP_TIVA
select ARCH_CORTEXM4
select ARCH_CHIP_TM4C
select ARCH_HAVE_FPU
select ARCH_CHIP_TM4C123
config ARCH_CHIP_TM4C1294NC
bool "TM4C1294NC"
depends on ARCH_CHIP_TIVA
select ARCH_CORTEXM4
select ARCH_CHIP_TM4C
select ARCH_HAVE_FPU
select TIVA_HAVE_GPIOQ_IRQS
select ARCH_CHIP_TM4C129
config ARCH_CHIP_TM4C129XNC
bool "TM4C129XNC"
depends on ARCH_CHIP_TIVA
select ARCH_CORTEXM4
select ARCH_CHIP_TM4C
select ARCH_HAVE_FPU
select TIVA_HAVE_GPIOQ_IRQS
select ARCH_CHIP_TM4C129
config ARCH_CHIP_CC3200
bool "CC3200"
@ -124,8 +118,17 @@ config ARCH_CHIP_LM4F
select TIVA_HAVE_UART6
select TIVA_HAVE_UART7
config ARCH_CHIP_TM4C123
bool
config ARCH_CHIP_TM4C129
bool
select TIVA_HAVE_GPIOQ_IRQS
config ARCH_CHIP_TM4C
bool
select ARCH_CORTEXM4
select ARCH_HAVE_FPU
select TIVA_HAVE_GPIOP_IRQS
select TIVA_HAVE_I2C2
select TIVA_HAVE_I2C3

8
arch/arm/src/tiva/chip/tiva_syscontrol.h
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@ -49,10 +49,10 @@
# include "chip/lm3s_syscontrol.h"
#elif defined(CONFIG_ARCH_CHIP_LM4F)
# include "chip/lm4f_syscontrol.h"
#elif defined(CONFIG_ARCH_CHIP_TM4C129XNC)
# include "chip/tm4c129x_syscontrol.h"
#elif defined(CONFIG_ARCH_CHIP_TM4C)
# include "chip/tm4c_syscontrol.h"
#elif defined(CONFIG_ARCH_CHIP_TM4C123)
# include "chip/tm4c123_syscontrol.h"
#elif defined(CONFIG_ARCH_CHIP_TM4C129)
# include "chip/tm4c129_syscontrol.h"
#elif defined(CONFIG_ARCH_CHIP_CC3200)
# include "chip/cc3200_syscontrol.h"
#else

8
arch/arm/src/tiva/chip/tm4c_syscontrol.h → arch/arm/src/tiva/chip/tm4c123_syscontrol.h
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@ -1,5 +1,5 @@
/********************************************************************************************
* arch/arm/src/tiva/chip/tm4c_syscontrol.h
* arch/arm/src/tiva/chip/tm4c123_syscontrol.h
*
* Copyright (C) 2013 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
@ -33,8 +33,8 @@
*
********************************************************************************************/
#ifndef __ARCH_ARM_SRC_TIVA_CHIP_TM4C_SYSCONTROL_H
#define __ARCH_ARM_SRC_TIVA_CHIP_TM4C_SYSCONTROL_H
#ifndef __ARCH_ARM_SRC_TIVA_CHIP_TM4C123_SYSCONTROL_H
#define __ARCH_ARM_SRC_TIVA_CHIP_TM4C123_SYSCONTROL_H
/********************************************************************************************
* Included Files
@ -1856,4 +1856,4 @@
* Public Functions
********************************************************************************************/
#endif /* __ARCH_ARM_SRC_TIVA_CHIP_TM4C_SYSCONTROL_H */
#endif /* __ARCH_ARM_SRC_TIVA_CHIP_TM4C123_SYSCONTROL_H */

18
arch/arm/src/tiva/chip/tm4c129x_syscontrol.h → arch/arm/src/tiva/chip/tm4c129_syscontrol.h
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@ -759,16 +759,26 @@
#define SYSCON_SLPPWRCFG_SRAMPM_MASK (3 << SYSCON_SLPPWRCFG_SRAMPM_SHIFT)
# define SYSCON_SLPPWRCFG_SRAMPM_ACTIVE (0 << SYSCON_SLPPWRCFG_SRAMPM_SHIFT) /* Active Mode */
# define SYSCON_SLPPWRCFG_SRAMPM_STANDBY (1 << SYSCON_SLPPWRCFG_SRAMPM_SHIFT) /* Standby Mode */
# define SYSCON_SLPPWRCFG_SRAMPM_LOWPWR (2 << SYSCON_SLPPWRCFG_SRAMPM_SHIFT) /* Low Power Mode */
# define SYSCON_SLPPWRCFG_SRAMPM_LOWPWR (3 << SYSCON_SLPPWRCFG_SRAMPM_SHIFT) /* Low Power Mode */
#define SYSCON_SLPPWRCFG_FLASHPM_SHIFT (4) /* Bits 5-4: Flash Power Modes */
#define SYSCON_SLPPWRCFG_FLASHPM_MASK (3 << SYSCON_SLPPWRCFG_FLASHPM_SHIFT)
# define SYSCON_SLPPWRCFG_FLASHPM_ACTIVE (0 << SYSCON_SLPPWRCFG_FLASHPM_SHIFT) /* Active Mode */
# define SYSCON_SLPPWRCFG_FLASHPM_LOWPWRR (2 << SYSCON_SLPPWRCFG_FLASHPM_SHIFT) /* Low Power Mode */
#define SYSCON_SLPPWRCFG_TSPD (1 << 8) /* Bit 8: Temperature Sense Power Down */
#define SYSCON_SLPPWRCFG_LDOSM (1 << 9) /* Bit 9: LDO Sleep Mode */
/* Deep-Sleep Power Configuration */
#define SYSCON_DSLPPWRCFG_
#define SYSCON_DSLPPWRCFG_SRAMPM_SHIFT (0) /* Bits 1-0: SRAM Power Modes */
#define SYSCON_DSLPPWRCFG_SRAMPM_MASK (3 << SYSCON_DSLPPWRCFG_SRAMPM_SHIFT)
# define SYSCON_DSLPPWRCFG_SRAMPM_ACTIVE (0 << SYSCON_DSLPPWRCFG_SRAMPM_SHIFT) /* Active Mode */
# define SYSCON_DSLPPWRCFG_SRAMPM_STANDBY (1 << SYSCON_DSLPPWRCFG_SRAMPM_SHIFT) /* Standby Mode */
# define SYSCON_DSLPPWRCFG_SRAMPM_LOWPWR (3 << SYSCON_DSLPPWRCFG_SRAMPM_SHIFT) /* Low Power Mode */
#define SYSCON_DSLPPWRCFG_FLASHPM_SHIFT (4) /* Bits 5-4: Flash Power Modes */
#define SYSCON_DSLPPWRCFG_FLASHPM_MASK (3 << SYSCON_DSLPPWRCFG_FLASHPM_SHIFT)
# define SYSCON_DSLPPWRCFG_FLASHPM_ACTIVE (0 << SYSCON_DSLPPWRCFG_FLASHPM_SHIFT) /* Active Mode */
# define SYSCON_DSLPPWRCFG_FLASHPM_LOWPWR (2 << SYSCON_DSLPPWRCFG_FLASHPM_SHIFT) /* Low Power Mode */
#define SYSCON_DSLPPWRCFG_TSPD (1 << 8) /* Bit 8: Temperature Sense Power Down */
#define SYSCON_DSLPPWRCFG_LDOSM (1 << 9) /* Bit 9: LDO Sleep Mode */
/* Non-Volatile Memory Information */
#define SYSCON_NVMSTAT_
/* LDO Sleep Power Control */

1
configs/dk-tm4c129x/nsh/defconfig
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@ -131,6 +131,7 @@ CONFIG_ARMV7M_TOOLCHAIN_CODESOURCERYW=y
# CONFIG_ARCH_CHIP_TM4C1294NC is not set
CONFIG_ARCH_CHIP_TM4C129XNC=y
# CONFIG_ARCH_CHIP_CC3200 is not set
CONFIG_ARCH_CHIP_TM4C129=y
CONFIG_ARCH_CHIP_TM4C=y
# CONFIG_TIVA_BOARD_EARLYINIT is not set

1
configs/tm4c123g-launchpad/nsh/defconfig
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@ -123,6 +123,7 @@ CONFIG_ARMV7M_OABI_TOOLCHAIN=y
CONFIG_ARCH_CHIP_TM4C123GH6PMI=y
# CONFIG_ARCH_CHIP_CC3200 is not set
CONFIG_ARCH_CHIP_TM4C=y
CONFIG_ARCH_CHIP_TM4C123=y
# CONFIG_TIVA_BOARD_EARLYINIT is not set
#