drivers/usbdev/cdcacm.c: Fix confusion between flow control being enabled and being active. Different things
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7ceedd2b52
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@ -114,6 +114,7 @@ struct cdcacm_dev_s
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#ifdef CONFIG_CDCACM_IFLOWCONTROL
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uint8_t serialstate; /* State of the DSR/DCD */
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bool iflow; /* True: input flow control is enabled */
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bool iactive; /* True: input flow control is active */
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bool upper; /* True: RX buffer is (nearly) full */
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#endif
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bool rxenabled; /* true: UART RX "interrupts" enabled */
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@ -481,7 +482,7 @@ static int cdcacm_recvpacket(FAR struct cdcacm_dev_s *priv,
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DEBUGASSERT(priv != NULL && rdcontainer != NULL);
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#ifdef CONFIG_CDCACM_IFLOWCONTROL
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DEBUGASSERT(priv->rxenabled && !priv->iflow);
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DEBUGASSERT(priv->rxenabled && !priv->iactive);
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#else
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DEBUGASSERT(priv->rxenabled);
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#endif
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@ -619,9 +620,9 @@ static int cdcacm_release_rxpending(FAR struct cdcacm_dev_s *priv)
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irqstate_t flags;
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int ret = -EBUSY;
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/* Note that the priv->rxpending queue, priv->rxenabled, priv->iflow may
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* be modified by interrupt level processing and, hence, interrupts must
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* be disabled throughout the following.
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/* Note that the priv->rxpending queue, priv->rxenabled, priv->iactive
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* may be modified by interrupt level processing and, hence, interrupts
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* must be disabled throughout the following.
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*/
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flags = enter_critical_section();
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@ -637,7 +638,7 @@ static int cdcacm_release_rxpending(FAR struct cdcacm_dev_s *priv)
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*/
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#ifdef CONFIG_CDCACM_IFLOWCONTROL
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if (priv->rxenabled && !priv->iflow)
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if (priv->rxenabled && !priv->iactive)
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#else
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if (priv->rxenabled)
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#endif
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@ -2335,7 +2336,7 @@ static int cdcuart_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
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if (!iflow)
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{
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irqstate_t flags;
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irqstate_t flags = enter_critical_section();
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/* Flow control has been disabled. We need to make sure
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* that DSR is set unconditionally.
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@ -2357,26 +2358,38 @@ static int cdcuart_ioctl(FAR struct file *filep, int cmd, unsigned long arg)
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/* Save the new flow control setting. */
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priv->iflow = false;
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priv->iflow = false;
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priv->iactive = false;
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leave_critical_section(flags);
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}
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/* Flow control has been enabled. If the RX buffer is already
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* (nearly) full, the we need to make sure the DSR is clear.
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*
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* NOTE: Here we assume that DSR is set so we don't check its
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* current value nor to we handle the case where we would set
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* DSR because the RX buffer is (nearly) empty!
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*/
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/* Flow control has been enabled. */
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else if (priv->upper)
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else
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{
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/* Save the new flow control setting. */
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priv->iflow = true;
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priv->serialstate &= ~CDCACM_UART_DSR;
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priv->serialstate |= CDCACM_UART_DCD;
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ret = cdcacm_serialstate(priv);
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priv->iactive = false;
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/* If the RX buffer is already (nearly) full, the we need to
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* make sure the DSR is clear.
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*
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* NOTE: Here we assume that DSR is set so we don't check its
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* current value nor to we handle the case where we would set
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* DSR because the RX buffer is (nearly) empty!
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*/
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if (priv->upper)
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{
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priv->serialstate &= ~CDCACM_UART_DSR;
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priv->serialstate |= CDCACM_UART_DCD;
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ret = cdcacm_serialstate(priv);
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/* Input flow control is now active */
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priv->iactive = true;
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}
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}
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/* RX "interrupts are no longer disabled */
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@ -2529,7 +2542,7 @@ static void cdcuart_rxint(FAR struct uart_dev_s *dev, bool enable)
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*
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* We also need to check if input control flow is in effect. If so,
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* then we should not call uart_datareceived() until both
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* priv->rxenabled is true and priv->iflow are false.
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* priv->rxenabled is true and priv->iactive are false.
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*/
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if (!priv->rxenabled)
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@ -2629,15 +2642,17 @@ static bool cdcuart_rxflowcontrol(FAR struct uart_dev_s *dev,
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priv->serialstate &= ~CDCACM_UART_DSR;
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priv->serialstate |= CDCACM_UART_DCD;
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/* And send the SerialState message */
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/* And send the SerialState message.
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* REVISIT: Error return case. Would an error mean DSR is not
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* set?
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*/
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ret = cdcacm_serialstate(priv);
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if (ret >= 0)
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{
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priv->iflow = true;
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return true;
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}
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(void)cdcacm_serialstate(priv);
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}
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/* Flow control is active */
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priv->iactive = true;
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}
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/* Lower watermark crossing. Don't do anything unless this results in
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@ -2650,14 +2665,19 @@ static bool cdcuart_rxflowcontrol(FAR struct uart_dev_s *dev,
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priv->serialstate |= (CDCACM_UART_DSR | CDCACM_UART_DCD);
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/* And send the SerialState message */
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/* And send the SerialState message.
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* REVISIT: Error return case. Would an error mean DSR is still
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* clear?
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*/
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ret = cdcacm_serialstate(priv);
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if (ret >= 0)
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{
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/* Needed by cdcacm_release_rxpending() */
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/* Flow control is not active (Needed before calling
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* cdcacm_release_rxpending())
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*/
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priv->iflow = false;
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priv->iactive = false;
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/* During the time that flow control ws disabled,
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* incoming packets were queued in priv->rxpending. We
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@ -2678,20 +2698,26 @@ static bool cdcuart_rxflowcontrol(FAR struct uart_dev_s *dev,
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if ((priv->serialstate & CDCACM_UART_DSR) == 0)
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{
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/* Set DSR and DCD */
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/* Set DSR and DCD */
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priv->serialstate |= (CDCACM_UART_DSR | CDCACM_UART_DCD);
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priv->serialstate |= (CDCACM_UART_DSR | CDCACM_UART_DCD);
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/* And send the SerialState message */
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/* And send the SerialState message
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* REVISIT: Error return case. Would an error mean DSR is still
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* not set?
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*/
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(void)cdcacm_serialstate(priv);
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(void)cdcacm_serialstate(priv);
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/* Flow control is not active */
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priv->iactive = false;
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}
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}
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/* Return true of DSR is not set */
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/* Return true flow control is active */
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priv->iflow = ((priv->serialstate & CDCACM_UART_DSR) == 0);
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return priv->iflow;
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return priv->iactive;
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#else
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return false;
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