From 8b10b8ad25444e01df16ae80bb750ace3ffdfa5d Mon Sep 17 00:00:00 2001 From: YanLin Zhu Date: Sun, 15 Sep 2019 08:19:06 -0600 Subject: [PATCH] drivers/mtd/gd25.c: Add support for GD25 device with 256-Mbit capacity. --- drivers/mtd/gd25.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/mtd/gd25.c b/drivers/mtd/gd25.c index b005d0ddfd..a5349017e1 100644 --- a/drivers/mtd/gd25.c +++ b/drivers/mtd/gd25.c @@ -107,12 +107,14 @@ #define GD25_JEDEC_CAPACITY_32MBIT 0x16 /* 1024x4096 = 32Mbit memory capacity */ #define GD25_JEDEC_CAPACITY_64MBIT 0x17 /* 2048x4096 = 64Mbit memory capacity */ #define GD25_JEDEC_CAPACITY_128MBIT 0x18 /* 4096x4096 = 128Mbit memory capacity */ +#define GD25_JEDEC_CAPACITY_256MBIT 0x19 /* 8192x4096 = 256Mbit memory capacity */ #define GD25_NSECTORS_8MBIT 256 /* 256 sectors x 4096 bytes/sector = 1Mb */ #define GD25_NSECTORS_16MBIT 512 /* 512 sectors x 4096 bytes/sector = 2Mb */ #define GD25_NSECTORS_32MBIT 1024 /* 1024 sectors x 4096 bytes/sector = 4Mb */ #define GD25_NSECTORS_64MBIT 2048 /* 2048 sectors x 4096 bytes/sector = 8Mb */ #define GD25_NSECTORS_128MBIT 4096 /* 4096 sectors x 4096 bytes/sector = 16Mb */ +#define GD25_NSECTORS_256MBIT 8192 /* 8192 sectors x 4096 bytes/sector = 32Mb */ /* Status register bit definitions */ @@ -283,6 +285,10 @@ static inline int gd25_readid(struct gd25_dev_s *priv) { priv->nsectors = GD25_NSECTORS_128MBIT; } + else if (capacity == GD25_JEDEC_CAPACITY_256MBIT) + { + priv->nsectors = GD25_NSECTORS_256MBIT; + } else { return -ENODEV;