Misc USB fixes

git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@3149 42af7a65-404d-4744-a932-0658087f49c3
This commit is contained in:
patacongo 2010-11-30 16:52:07 +00:00
parent 91b95f7353
commit 8b11c7c8f8
7 changed files with 32 additions and 14 deletions

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@ -296,8 +296,8 @@
#define GPIO_MCPWM_MCOB2 (GPIO_ALT1 | GPIO_PULLUP | GPIO_PORT1 | GPIO_PIN29)
#define GPIO_PCAP1p1 (GPIO_ALT2 | GPIO_PULLUP | GPIO_PORT1 | GPIO_PIN29)
#define GPIO_MAT0p1_1 (GPIO_ALT3 | GPIO_PULLUP | GPIO_PORT1 | GPIO_PIN29)
#define GPIO_USB_VBUS (GPIO_ALT2 | GPIO_FLOAT | GPIO_PORT1 | GPIO_PIN30)
#define GPIO_AD0p4 (GPIO_ALT3 | GPIO_PULLUP | GPIO_PORT1 | GPIO_PIN30)
#define GPIO_USB_VBUS (GPIO_ALT1 | GPIO_FLOAT | GPIO_PORT1 | GPIO_PIN30)
#define GPIO_AD0p4 (GPIO_ALT2 | GPIO_PULLUP | GPIO_PORT1 | GPIO_PIN30)
#define GPIO_SSP1_SCK_2 (GPIO_ALT2 | GPIO_PULLUP | GPIO_PORT1 | GPIO_PIN31)
#define GPIO_AD0p5 (GPIO_ALT3 | GPIO_PULLUP | GPIO_PORT1 | GPIO_PIN31)
#define GPIO_PWM1p1_2 (GPIO_ALT1 | GPIO_PULLUP | GPIO_PORT2 | GPIO_PIN0)

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@ -104,6 +104,10 @@
# define USB_ERROR_INT 0
#endif
/* CLKCTRL enable bits */
#define LPC17_CLKCTRL_ENABLES (USBDEV_CLK_DEVCLK|USBDEV_CLK_PORTSELCLK|USBDEV_CLK_AHBCLK)
/* Dump GPIO registers */
#if defined(CONFIG_LPC17_USBDEV_REGDEBUG) && defined(CONFIG_DEBUG_GPIO)
@ -3147,8 +3151,9 @@ void up_usbinitialize(void)
regval |= SYSCON_PCONP_PCUSB;
lpc17_putreg(regval, LPC17_SYSCON_PCONP);
/* Step 2: Enable clocking on USB (USB clocking was initialized in very
* low-level clock setup logic (see lpc17_clockconfig.c)
/* Step 2: Enable clocking on USB (USB PLL clocking was initialized in
* in very low-level clock setup logic (see lpc17_clockconfig.c)). We
* do still need to set up USBCLKCTRL -- see below.
*/
/* Step 3: Configure I/O pins */
@ -3233,7 +3238,7 @@ void up_usbinitialize(void)
/* Enable device and AHB clocking */
lpc17_putreg(USBDEV_CLK_DEVCLK|USBDEV_CLK_AHBCLK, LPC17_USBDEV_CLKCTRL);
lpc17_putreg(LPC17_CLKCTRL_ENABLES, LPC17_USBDEV_CLKCTRL);
/* And wait for the clocks to be reported as "ON" */
@ -3241,7 +3246,7 @@ void up_usbinitialize(void)
{
regval = lpc17_getreg(LPC17_USBDEV_CLKST);
}
while ((regval & (USBDEV_CLK_DEVCLK|USBDEV_CLK_AHBCLK)) != (USBDEV_CLK_DEVCLK|USBDEV_CLK_AHBCLK));
while ((regval & LPC17_CLKCTRL_ENABLES) != LPC17_CLKCTRL_ENABLES);
/* Make sure all USB interrupts are disabled and cleared */

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@ -323,7 +323,7 @@ CONFIG_APP_DIR=examples/usbstorage
CONFIG_DEBUG=n
CONFIG_DEBUG_VERBOSE=n
CONFIG_DEBUG_SYMBOLS=n
CONFIG_DDEBUG_USB=n
CONFIG_DEBUG_USB=n
CONFIG_MM_REGIONS=2
CONFIG_ARCH_LOWPUTC=y
CONFIG_RR_INTERVAL=200

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@ -48,6 +48,9 @@
#include <nuttx/spi.h>
#include <nuttx/mmcsd.h>
#include "lpc17_internal.h"
#include "lpc1766stk_internal.h"
/****************************************************************************
* Pre-Processor Definitions
****************************************************************************/
@ -108,6 +111,10 @@ int usbstrg_archinitialize(void)
FAR struct spi_dev_s *spi;
int ret;
/* Enable power to the SD/MMC via a GPIO. LOW enables SD/MMC. */
lpc17_gpiowrite(LPC1766STK_MMC_PWR, false);
/* Get the SPI port */
message("usbstrg_archinitialize: Initializing SPI port %d\n",
@ -118,7 +125,8 @@ int usbstrg_archinitialize(void)
{
message("usbstrg_archinitialize: Failed to initialize SPI port %d\n",
LPC17XX_MMCSDSPIPORTNO);
return -ENODEV;
ret = -ENODEV;
goto errout;
}
message("usbstrg_archinitialize: Successfully initialized SPI port %d\n",
@ -134,10 +142,15 @@ int usbstrg_archinitialize(void)
{
message("usbstrg_archinitialize: Failed to bind SPI port %d to MMC/SD slot %d: %d\n",
LPC17XX_MMCSDSPIPORTNO, LPC17XX_MMCSDSLOTNO, ret);
return ret;
goto errout;
}
message("usbstrg_archinitialize: Successfuly bound SPI port %d to MMC/SD slot %d\n",
LPC17XX_MMCSDSPIPORTNO, LPC17XX_MMCSDSLOTNO);
return OK;
}
/* Disable power to the SD/MMC via a GPIO. HIGH disables SD/MMC. */
errout:
lpc17_gpiowrite(LPC1766STK_MMC_PWR, true);
return ret;}

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@ -106,7 +106,7 @@ CONFIG_LPC17_BUILDROOT=y
CONFIG_LPC17_ETHERNET=n
CONFIG_LPC17_USBHOST=n
CONFIG_LPC17_USBOTG=n
CONFIG_LPC17_USBDEV=n
CONFIG_LPC17_USBDEV=y
CONFIG_LPC17_UART0=y
CONFIG_LPC17_UART1=n
CONFIG_LPC17_UART2=n

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@ -106,7 +106,7 @@ CONFIG_LPC17_BUILDROOT=y
CONFIG_LPC17_ETHERNET=n
CONFIG_LPC17_USBHOST=n
CONFIG_LPC17_USBOTG=n
CONFIG_LPC17_USBDEV=n
CONFIG_LPC17_USBDEV=y
CONFIG_LPC17_UART0=y
CONFIG_LPC17_UART1=n
CONFIG_LPC17_UART2=n
@ -324,7 +324,7 @@ CONFIG_APP_DIR=examples/usbstorage
CONFIG_DEBUG=n
CONFIG_DEBUG_VERBOSE=n
CONFIG_DEBUG_SYMBOLS=n
CONFIG_DDEBUG_USB=n
CONFIG_DEBUG_USB=n
CONFIG_MM_REGIONS=2
CONFIG_ARCH_LOWPUTC=y
CONFIG_RR_INTERVAL=200

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@ -1,7 +1,7 @@
/****************************************************************************
* examples/usbstorage/usbstrg_main.c
*
* Copyright (C) 2008-2009 Gregory Nutt. All rights reserved.
* Copyright (C) 2008-2010 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
*
* Redistribution and use in source and binary forms, with or without