Fix SPI compilation errors
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@2139 42af7a65-404d-4744-a932-0658087f49c3
This commit is contained in:
patacongo
parent
dc9915baf2
commit
8b160cf7a7
@ -498,18 +498,24 @@ EXTERN int stm32_ethinitialize(int intf);
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#endif
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/************************************************************************************
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* The external functions, stm32_spi1/2select and stm32_spi1/2status must be
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* provided by board-specific logic. They are implementations of the select
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* and status methods of the SPI interface defined by struct spi_ops_s (see
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* include/nuttx/spi.h). All other methods (including up_spiinitialize())
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* are provided by common STM32 logic. To use this common SPI logic on your
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* board:
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* Name: stm32_spi1/2/3select and stm32_spi1/2/3status
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*
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* Description:
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* The external functions, stm32_spi1/2/3select and stm32_spi1/2/3status must be
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* provided by board-specific logic. They are implementations of the select
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* and status methods of the SPI interface defined by struct spi_ops_s (see
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* include/nuttx/spi.h). All other methods (including up_spiinitialize())
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* are provided by common STM32 logic. To use this common SPI logic on your
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* board:
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*
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* 1. Provide logic in stm32_boardinitialize() to configure SPI chip select
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* pins.
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* 2. Provide stm32_spi1/2select() and stm32_spi1/2status() functions in your
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* 2. Provide stm32_spi1/2/3select() and stm32_spi1/2/3status() functions in your
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* board-specific logic. These functions will perform chip selection and
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* status operations using GPIOs in the way your board is configured.
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* The select() methods must call stm32_spitake() when the chip is selected
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* and stm32_spigive() when the chip is deselected. This assures mutually
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* exclusive access to the SPI for the duration while a chip is selected.
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* 3. Add a calls to up_spiinitialize() in your low level application
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* initialization logic
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* 4. The handle returned by up_spiinitialize() may then be used to bind the
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@ -525,6 +531,22 @@ EXTERN void stm32_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, b
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EXTERN ubyte stm32_spi1status(FAR struct spi_dev_s *dev, enum spi_dev_e devid);
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EXTERN void stm32_spi2select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, boolean selected);
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EXTERN ubyte stm32_spi2status(FAR struct spi_dev_s *dev, enum spi_dev_e devid);
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EXTERN void stm32_spi3select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, boolean selected);
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EXTERN ubyte stm32_spi3status(FAR struct spi_dev_s *dev, enum spi_dev_e devid);
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/************************************************************************************
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* Name: stm32_spitake() and stm32_spigive()
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*
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* Description:
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* The stm32_spi1/2/3select() and stm32_spi1/2/3status() methods must call
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* stm32_spitake() when the chip is selected and stm32_spigive() when the chip is
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* deselected. This assures mutually exclusive access to the SPI for the duration
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* while a chip is selected.
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*
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************************************************************************************/
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EXTERN void stm32_spitake(FAR struct spi_dev_s *dev);
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EXTERN void stm32_spigive(FAR struct spi_dev_s *dev);
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#undef EXTERN
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#if defined(__cplusplus)
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@ -34,23 +34,25 @@
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************************************************************************************/
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/************************************************************************************
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* The external functions, stm32_spi1/2/3select and stm32_spi1//3status must
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* be provided by board-specific logic. They are implementations of the
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* select and status methods of the SPI interface defined by struct spi_ops_s
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* (see include/nuttx/spi.h). All other methods (including up_spiinitialize())
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* The external functions, stm32_spi1/2/3select and stm32_spi1/2/3status must be
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* provided by board-specific logic. They are implementations of the select
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* and status methods of the SPI interface defined by struct spi_ops_s (see
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* include/nuttx/spi.h). All other methods (including up_spiinitialize())
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* are provided by common STM32 logic. To use this common SPI logic on your
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* board:
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*
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* 1. Provide logic in stm32_boardinitialize() to configure SPI chip select
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* pins.
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* 2. Provide stm32_spi1/2/3select() and stm32_spi1/2/3status() functions
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* in your board-specific logic. These functions will perform chip
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* selection and status operations using GPIOs in the way your board
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* is configured.
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* 2. Provide stm32_spi1/2/3select() and stm32_spi1/2/3status() functions in your
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* board-specific logic. These functions will perform chip selection and
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* status operations using GPIOs in the way your board is configured.
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* The select() methods must call stm32_spitake() when the chip is selected
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* and stm32_spigive() when the chip is deselected. This assures mutually
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* exclusive access to the SPI for the duration while a chip is selected.
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* 3. Add a calls to up_spiinitialize() in your low level application
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* initialization logic
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* 4. The handle returned by up_spiinitialize() may then be used to bind
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* the SPI driver to higher level logic (e.g., calling
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* 4. The handle returned by up_spiinitialize() may then be used to bind the
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* SPI driver to higher level logic (e.g., calling
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* mmcsd_spislotinitialize(), for example, will bind the SPI driver to
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* the SPI MMC/SD driver).
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*
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@ -62,6 +64,10 @@
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#include <nuttx/config.h>
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#include <semaphore.h>
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#include <errno.h>
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#include <debug.h>
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#include <arch/board/board.h>
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#include <nuttx/arch.h>
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#include <nuttx/spi.h>
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@ -71,6 +77,7 @@
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#include "chip.h"
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#include "stm32_internal.h"
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#include "stm32_gpio.h"
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#include "stm32_spi.h"
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#if defined(CONFIG_STM32_SPI1) || defined(CONFIG_STM32_SPI2) || defined(CONFIG_STM32_SPI3)
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@ -97,6 +104,7 @@ struct stm32_spidev_s
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#ifdef CONFIG_STM32_SPI_INTERRUPTS
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uint8 spiirq; /* SPI IRQ number */
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#endif
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sem_t spisem;
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};
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/************************************************************************************
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@ -140,12 +148,12 @@ static const struct spi_ops_s g_sp1iops =
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{
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.select = stm32_spi1select,
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.setfrequency = spi_setfrequency,
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.setmode = spi_setmode;
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.setbits = spi_setbits;
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.setmode = spi_setmode,
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.setbits = spi_setbits,
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.status = stm32_spi1status,
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.send = spi_send,
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#ifdef CONFIG_SPI_EXCHANGE
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.exchange = spi_exchange;
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.exchange = spi_exchange,
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#else
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.sndblock = spi_sndblock,
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.recvblock = spi_recvblock,
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@ -157,7 +165,7 @@ static struct stm32_spidev_s g_spi1dev =
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{
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.spidev = { &g_sp1iops },
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.spibase = STM32_SPI1_BASE,
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.spiclock = STM32_PCLK2_FREQUENCY;
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.spiclock = STM32_PCLK2_FREQUENCY,
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#ifdef CONFIG_STM32_SPI_INTERRUPTS
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.spiirq = STM32_IRQ_SPI1,
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#endif
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@ -169,12 +177,12 @@ static const struct spi_ops_s g_sp2iops =
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{
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.select = stm32_spi2select,
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.setfrequency = spi_setfrequency,
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.setmode = spi_setmode;
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.setbits = spi_setbits;
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.setmode = spi_setmode,
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.setbits = spi_setbits,
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.status = stm32_spi2status,
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.send = spi_send,
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#ifdef CONFIG_SPI_EXCHANGE
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.exchange = spi_exchange;
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.exchange = spi_exchange,
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#else
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.sndblock = spi_sndblock,
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.recvblock = spi_recvblock,
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@ -186,7 +194,7 @@ static struct stm32_spidev_s g_spi2dev =
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{
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.spidev = { &g_sp2iops },
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.spibase = STM32_SPI2_BASE,
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.spiclock = STM32_PCLK1_FREQUENCY;
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.spiclock = STM32_PCLK1_FREQUENCY,
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#ifdef CONFIG_STM32_SPI_INTERRUPTS
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.spiirq = STM32_IRQ_SPI2,
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#endif
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@ -198,12 +206,12 @@ static const struct spi_ops_s g_sp3iops =
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{
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.select = stm32_spi3select,
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.setfrequency = spi_setfrequency,
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.setmode = spi_setmode;
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.setbits = spi_setbits;
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.setmode = spi_setmode,
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.setbits = spi_setbits,
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.status = stm32_spi3status,
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.send = spi_send,
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#ifdef CONFIG_SPI_EXCHANGE
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.exchange = spi_exchange;
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.exchange = spi_exchange,
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#else
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.sndblock = spi_sndblock,
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.recvblock = spi_recvblock,
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@ -215,7 +223,7 @@ static struct stm32_spidev_s g_spi3dev =
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{
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.spidev = { &g_sp3iops },
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.spibase = STM32_SPI2_BASE,
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.spiclock = STM32_PCLK1_FREQUENCY;
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.spiclock = STM32_PCLK1_FREQUENCY,
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#ifdef CONFIG_STM32_SPI_INTERRUPTS
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.spiirq = STM32_IRQ_SPI3,
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#endif
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@ -289,11 +297,11 @@ static inline uint16 spi_readword(FAR struct stm32_spidev_s *priv)
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{
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/* Wait until the receive buffer is not empty */
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while (spi_getreg(priv, STM32_SPI_SR_OFFSET) & SPI_SR_RXNE) != 0);
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while ((spi_getreg(priv, STM32_SPI_SR_OFFSET) & SPI_SR_RXNE) != 0);
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/* Then return the received byte */
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return spi_regreg(priv, STM32_SPI_DR_OFFSET);
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return spi_getreg(priv, STM32_SPI_DR_OFFSET);
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}
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/************************************************************************************
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@ -315,7 +323,7 @@ static inline void spi_writeword(FAR struct stm32_spidev_s *priv, uint16 word)
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{
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/* Wait until the transmit buffer is empty */
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while (spi_getreg(priv, STM32_SPI_SR_OFFSET) & SPI_SR_TXE) != 0);
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while ((spi_getreg(priv, STM32_SPI_SR_OFFSET) & SPI_SR_TXE) != 0);
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/* Then send the byte */
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@ -395,7 +403,7 @@ static uint32 spi_setfrequency(FAR struct spi_dev_s *dev, uint32 frequency)
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{
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/* Between fPCLCK/8 and fPCLCK/16, pick the slower */
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setbits = SPI_CR1_FPCLCKd1; /* 011: fPCLK/16 */
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setbits = SPI_CR1_FPCLCKd16; /* 011: fPCLK/16 */
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actual = priv->spiclock >> 4;
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}
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else if (frequency >= priv->spiclock >> 5)
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@ -449,7 +457,6 @@ static uint32 spi_setfrequency(FAR struct spi_dev_s *dev, uint32 frequency)
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static void spi_setmode(FAR struct spi_dev_s *dev, enum spi_mode_e mode)
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{
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FAR struct stm32_spidev_s *priv = (FAR struct stm32_spidev_s *)dev;
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uint16 cr1;
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uint16 setbits;
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uint16 clrbits;
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@ -500,11 +507,10 @@ static void spi_setmode(FAR struct spi_dev_s *dev, enum spi_mode_e mode)
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static void spi_setbits(FAR struct spi_dev_s *dev, int nbits)
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{
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FAR struct stm32_spidev_s *priv = (FAR struct stm32_spidev_s *)dev;
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uint16 cr1;
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uint16 setbits;
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uint16 clrbits;
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switch (mode)
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switch (nbits)
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{
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case 8:
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setbits = 0;
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@ -575,6 +581,8 @@ static void spi_exchange(FAR struct spi_dev_s *dev, FAR const void *txbuffer,
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FAR struct stm32_spidev_s *priv = (FAR struct stm32_spidev_s *)dev;
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DEBUGASSERT(priv && priv->spibase);
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# warning "TODO: Need to incorporate DMA to get good SPI performance"
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/* 8- or 16-bit mode? */
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if ((spi_getreg(priv, STM32_SPI_CR1_OFFSET) & SPI_CR1_DFF) != 0)
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@ -611,8 +619,8 @@ static void spi_exchange(FAR struct spi_dev_s *dev, FAR const void *txbuffer,
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{
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/* 8-bit mode */
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const uint8 *src = (const uint16*)txbuffer;;
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uint8 *dest = (uint16*)rxbuffer;
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const uint8 *src = (const uint8*)txbuffer;;
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uint8 *dest = (uint8*)rxbuffer;
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uint8 word;
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/* Get the next word to write. Is there a source buffer? */
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@ -720,7 +728,7 @@ static void spi_portinitialize(FAR struct stm32_spidev_s *priv)
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*/
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clrbits = SPI_CR1_CPHA|SPI_CR1_CPOL|SPI_CR1_BR_MASK|SPI_CR1_LSBFIRST|SPI_CR1_SSI|
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SPI_CR1_SSM|SPI_CR1_RXONLY|SPI_CR1_DFF|SPI_CR1_BIDIOE|SPI_CR1_BIDIMODE);
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SPI_CR1_SSM|SPI_CR1_RXONLY|SPI_CR1_DFF|SPI_CR1_BIDIOE|SPI_CR1_BIDIMODE;
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setbits = SPI_CR1_MSTR;
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spi_modifycr1(priv, setbits, clrbits);
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@ -732,6 +740,10 @@ static void spi_portinitialize(FAR struct stm32_spidev_s *priv)
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spi_putreg(priv, STM32_SPI_CRCPR_OFFSET, 7);
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/* Enable the SPI semaphore that enforces mutually exclusive access */
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sem_init(&priv->spisem, 0, 1);
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/* Enable spi */
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spi_modifycr1(priv, SPI_CR1_SPE, 0);
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@ -787,7 +799,7 @@ FAR struct spi_dev_s *up_spiinitialize(int port)
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/* Set up default configuration: Master, 8-bit, etc. */
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spi_portinitialize(priv)
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spi_portinitialize(priv);
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}
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else
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#endif
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@ -800,7 +812,7 @@ FAR struct spi_dev_s *up_spiinitialize(int port)
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/* Set up default configuration: Master, 8-bit, etc. */
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spi_portinitialize(priv)
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spi_portinitialize(priv);
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}
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else
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#endif
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@ -817,7 +829,7 @@ FAR struct spi_dev_s *up_spiinitialize(int port)
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# error "Available only in connectivity devices"
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#endif
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/* Configure SPI1 pins: SCK, MISO, and MOSI */
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/* Configure SPI3 pins: SCK, MISO, and MOSI */
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stm32_configgpio(GPIO_SPI3_SCK);
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stm32_configgpio(GPIO_SPI3_MISO);
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@ -825,7 +837,7 @@ FAR struct spi_dev_s *up_spiinitialize(int port)
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/* Set up default configuration: Master, 8-bit, etc. */
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spi_portinitialize(priv)
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spi_portinitialize(priv);
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}
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#endif
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@ -833,4 +845,37 @@ FAR struct spi_dev_s *up_spiinitialize(int port)
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return (FAR struct spi_dev_s *)priv;
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}
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/************************************************************************************
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* Name: stm32_spitake() and stm32_spigive()
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*
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* Description:
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* The stm32_spi1/2/3select() and stm32_spi1/2/3status() methods must call
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* stm32_spitake() when the chip is selected and stm32_spigive() when the chip is
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* deselected. This assures mutually exclusive access to the SPI for the duration
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* while a chip is selected.
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*
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************************************************************************************/
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void stm32_spitake(FAR struct spi_dev_s *dev)
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{
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FAR struct stm32_spidev_s *priv = (FAR struct stm32_spidev_s *)dev;
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/* Take the semaphore (perhaps waiting) */
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while (sem_wait(&priv->spisem) != 0)
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{
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/* The only case that an error should occur here is if the wait was awakened
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* by a signal.
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*/
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ASSERT(*get_errno_ptr() == EINTR);
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}
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}
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void stm32_spigive(FAR struct spi_dev_s *dev)
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{
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FAR struct stm32_spidev_s *priv = (FAR struct stm32_spidev_s *)dev;
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(void)sem_post(&priv->spisem);
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}
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#endif /* CONFIG_STM32_SPI1 || CONFIG_STM32_SPI2 || CONFIG_STM32_SPI3 */
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@ -134,8 +134,25 @@
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* Public Data
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************************************************************************************/
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#ifndef __ASSEMBLY__
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#undef EXTERN
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#if defined(__cplusplus)
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#define EXTERN extern "C"
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extern "C" {
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#else
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#define EXTERN extern
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#endif
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/************************************************************************************
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* Public Functions
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************************************************************************************/
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#undef EXTERN
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#if defined(__cplusplus)
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}
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#endif
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#endif /* __ASSEMBLY__ */
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#endif /* __ARCH_ARM_STC_STM32_STM32_SPI_H */
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@ -79,6 +79,36 @@
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* Private Functions
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************************************************************************************/
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static void stm32_chipselect(FAR struct spi_dev_s *dev, uint32 pinset, boolean pinval, boolean selected)
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{
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spidbg("devid: %d CS: %s pinset: %08x pinval: %s\n",
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(int)devid, selected ? "assert" : "de-assert", pinset, pinval ? "HIGH" : "LOW");
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/* If we are selecting the chip, then we must call stm32_spitake to assure that we
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* have mutually exclusive access to the SPI bus while the chip is selected.
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*/
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if (selected)
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{
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stm32_spitake(dev);
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}
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/* Then set the CHIP select. Usually the chip select is LOW to select and HIGH, but
|
||||
* that can vary from part to part.
|
||||
*/
|
||||
|
||||
stm32_gpiowrite(pinset, pinval);
|
||||
|
||||
/* If we just de-selected the chip, then we must call stm32_spigive to to relinquish
|
||||
* our exclusive access to the SPI bus. Now, any waiting threads can have the SPI.
|
||||
*/
|
||||
|
||||
if (!selected)
|
||||
{
|
||||
stm32_spigive(dev);
|
||||
}
|
||||
}
|
||||
|
||||
/************************************************************************************
|
||||
* Public Functions
|
||||
************************************************************************************/
|
||||
@ -93,76 +123,65 @@
|
||||
|
||||
void weak_function stm32_spiinitialize(void)
|
||||
{
|
||||
/* NOTE: Clocking for SPI1 and/or SPI2 was already provided in stm32_rcc.c */
|
||||
/* NOTE: Clocking for SPI1 and/or SPI2 was already provided in stm32_rcc.c.
|
||||
* Configurations of SPI pins is performed in stm32_spi.c.
|
||||
* Here, we only initialize chip select pins unique to the board
|
||||
* architecture.
|
||||
*/
|
||||
|
||||
#ifdef CONFIG_STM32_SPI1
|
||||
/* Select SPI1 pin mapping */
|
||||
|
||||
uint32 mapr = getreg32(STM32_AFIO_MAPR);
|
||||
#ifdef CONFIG_STM32_SPI1_REMAP
|
||||
mapr |= AFIO_MAPR_SPI1_REMAP;
|
||||
#else
|
||||
mapr &= ~AFIO_MAPR_SPI1_REMAP;
|
||||
#endif
|
||||
putreg32(mapr, STM32_AFIO_MAPR);
|
||||
|
||||
/* Configure SPI1 alternate function pins */
|
||||
|
||||
stm32_configgpio(GPIO_SPI1_SCK);
|
||||
stm32_configgpio(GPIO_SPI1_MISO);
|
||||
stm32_configgpio(GPIO_SPI1_MOSI);
|
||||
|
||||
/* Configure the SPI-based microSD and FLASH CS GPIO */
|
||||
|
||||
stm32_configgpio(GPIO_MMCSD_CS);
|
||||
stm32_configgpio(GPIO_FLASH_CS);
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_STM32_SPI2
|
||||
/* Configure SPI1 alternate function pins */
|
||||
|
||||
stm32_configgpio(GPIO_SPI2_SCK);
|
||||
stm32_configgpio(GPIO_SPI2_MISO);
|
||||
stm32_configgpio(GPIO_SPI2_MOSI);
|
||||
|
||||
#endif
|
||||
}
|
||||
|
||||
/****************************************************************************
|
||||
* The external functions, stm32_spi1/2select and stm32_spi1/2status must be
|
||||
* provided by board-specific logic. These are implementations of the
|
||||
* select and status methods SPI interface defined by struct spi_ops_s (see
|
||||
* include/nuttx/spi.h). All other methods (including up_spiinitialize())
|
||||
* are provided by common logic. To use this common SPI logic on your board:
|
||||
*
|
||||
* 1. Provide stm32_spi1/2select() and stm32_spi1/2status() functions in your
|
||||
* board-specific logic. This function will perform chip selection and
|
||||
* status operations using GPIOs in the way your board is configured.
|
||||
* 2. Add a call to up_spiinitialize() in your low level initialization
|
||||
* logic
|
||||
* 3. The handle returned by up_spiinitialize() may then be used to bind the
|
||||
* SPI driver to higher level logic (e.g., calling
|
||||
* mmcsd_spislotinitialize(), for example, will bind the SPI driver to
|
||||
* the SPI MMC/SD driver).
|
||||
*
|
||||
* Name: stm32_spi1/2/3select and stm32_spi1/2/3status
|
||||
*
|
||||
* Description:
|
||||
* The external functions, stm32_spi1/2/3select and stm32_spi1/2/3status must be
|
||||
* provided by board-specific logic. They are implementations of the select
|
||||
* and status methods of the SPI interface defined by struct spi_ops_s (see
|
||||
* include/nuttx/spi.h). All other methods (including up_spiinitialize())
|
||||
* are provided by common STM32 logic. To use this common SPI logic on your
|
||||
* board:
|
||||
*
|
||||
* 1. Provide logic in stm32_boardinitialize() to configure SPI chip select
|
||||
* pins.
|
||||
* 2. Provide stm32_spi1/2/3select() and stm32_spi1/2/3status() functions in your
|
||||
* board-specific logic. These functions will perform chip selection and
|
||||
* status operations using GPIOs in the way your board is configured.
|
||||
* The select() methods must call stm32_spitake() when the chip is selected
|
||||
* and stm32_spigive() when the chip is deselected. This assures mutually
|
||||
* exclusive access to the SPI for the duration while a chip is selected.
|
||||
* 3. Add a calls to up_spiinitialize() in your low level application
|
||||
* initialization logic
|
||||
* 4. The handle returned by up_spiinitialize() may then be used to bind the
|
||||
* SPI driver to higher level logic (e.g., calling
|
||||
* mmcsd_spislotinitialize(), for example, will bind the SPI driver to
|
||||
* the SPI MMC/SD driver).
|
||||
*
|
||||
****************************************************************************/
|
||||
|
||||
#ifdef CONFIG_STM32_SPI1
|
||||
void stm32_spi1select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, boolean selected)
|
||||
{
|
||||
spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
|
||||
spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
|
||||
uint32 pinset;
|
||||
|
||||
if (devid == SPIDEV_MMCSD)
|
||||
{
|
||||
/* Set the GPIO low to select and high to de-select */
|
||||
|
||||
stm32_gpiowrite(GPIO_MMCSD_CS, !selected);
|
||||
|
||||
stm32_chipselect(dev, GPIO_MMCSD_CS,!selected, selected);
|
||||
}
|
||||
else if (devid == SPIDEV_FLASH)
|
||||
{
|
||||
/* Set the GPIO low to select and high to de-select */
|
||||
|
||||
stm32_gpiowrite(GPIO_FLASH_CS, !selected);
|
||||
stm32_chipselect(dev, GPIO_FLASH_CS,!selected, selected);
|
||||
}
|
||||
}
|
||||
|
||||
@ -184,4 +203,16 @@ ubyte stm32_spi2status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_STM32_SPI3
|
||||
void stm32_spi3select(FAR struct spi_dev_s *dev, enum spi_dev_e devid, boolean selected)
|
||||
{
|
||||
spidbg("devid: %d CS: %s\n", (int)devid, selected ? "assert" : "de-assert");
|
||||
}
|
||||
|
||||
ubyte stm32_spi3status(FAR struct spi_dev_s *dev, enum spi_dev_e devid)
|
||||
{
|
||||
return SPI_STATUS_PRESENT;
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif /* CONFIG_STM32_SPI1 || CONFIG_STM32_SPI2 */
|
||||
|
||||
Loading…
Reference in New Issue
Block a user