tools: Make zig available for arm/riscv/sim

Add essential compile flags to make zig available out of box.

Signed-off-by: Huang Qi <huangqi3@xiaomi.com>

arch/arm/src/armv6-m/Toolchain.defs

@@ -23,6 +23,8 @@
 TOOLCHAIN_MTUNE  := -mcpu=cortex-m0 -mthumb
 TOOLCHAIN_MFLOAT := -mfloat-abi=soft
 
+ZARCHCPUFLAGS := -mcpu=cortex_m0
+
 # Clang Configuration files
 
 ifeq ($(CONFIG_ARM_TOOLCHAIN_CLANG),y)

arch/arm/src/armv7-a/Toolchain.defs

@@ -20,12 +20,16 @@
 
 ifeq ($(CONFIG_ARCH_CORTEXA5),y)
   ARCHCPUFLAGS += -mcpu=cortex-a5
+  ZARCHCPUFLAGS := -mcpu=cortex_a5
 else ifeq ($(CONFIG_ARCH_CORTEXA7),y)
   ARCHCPUFLAGS += -mcpu=cortex-a7
+  ZARCHCPUFLAGS := -mcpu=cortex_a7
 else ifeq ($(CONFIG_ARCH_CORTEXA8),y)
   ARCHCPUFLAGS += -mcpu=cortex-a8
+  ZARCHCPUFLAGS := -mcpu=cortex_a8
 else ifeq ($(CONFIG_ARCH_CORTEXA9),y)
   ARCHCPUFLAGS += -mcpu=cortex-a9
+  ZARCHCPUFLAGS := -mcpu=cortex_a9
 endif
 
 ifneq ($(CONFIG_ARM_DPFPU32),y)

arch/arm/src/armv7-m/Toolchain.defs

@@ -27,6 +27,7 @@ ifeq ($(CONFIG_ARCH_CORTEXM4),y)
   ifeq ($(CONFIG_ARCH_FPU),y)
     TOOLCHAIN_MFLOAT := -mfpu=fpv4-sp-d16
   endif
+  ZARCHCPUFLAGS := -mcpu=cortex_m4
 else ifeq ($(CONFIG_ARCH_CORTEXM7),y)
   TOOLCHAIN_ARM7EM   := y
   TOOLCHAIN_MTUNE    := -mtune=cortex-m7
@@ -38,11 +39,13 @@ else ifeq ($(CONFIG_ARCH_CORTEXM7),y)
       TOOLCHAIN_MFLOAT := -mfpu=fpv5-sp-d16
     endif
   endif
+  ZARCHCPUFLAGS := -mcpu=cortex_m7
 else # ifeq ($(CONFIG_ARCH_CORTEXM3),y)
   TOOLCHAIN_ARM7EM   := n
   TOOLCHAIN_MTUNE    := -mtune=cortex-m3
   TOOLCHAIN_MARCH    := -march=armv7-m
   TOOLCHAIN_MFLOAT   := -mfloat-abi=soft
+  ZARCHCPUFLAGS      := -mcpu=cortex_m3
 endif
 
 ifeq ($(CONFIG_ARCH_FPU),y)

arch/arm/src/armv7-r/Toolchain.defs

@@ -20,10 +20,13 @@
 
 ifeq ($(CONFIG_ARCH_CORTEXR4),y)
   ARCHCPUFLAGS += -mcpu=cortex-r4
+  ZARCHCPUFLAGS := -mcpu=cortex_r4
 else ifeq ($(CONFIG_ARCH_CORTEXR5),y)
   ARCHCPUFLAGS += -mcpu=cortex-r5
+  ZARCHCPUFLAGS := -mcpu=cortex_r5
 else ifeq ($(CONFIG_ARCH_CORTEXR7),y)
   ARCHCPUFLAGS += -mcpu=cortex-r7
+  ZARCHCPUFLAGS := -mcpu=cortex_r7
 endif
 
 ifeq ($(CONFIG_ARCH_FPU),y)

arch/arm/src/armv8-m/Toolchain.defs

@@ -28,6 +28,7 @@ ifeq ($(CONFIG_ARCH_CORTEXM23),y)
   TOOLCHAIN_MTUNE    := -mtune=cortex-m23
   TOOLCHAIN_MARCH    := -march=armv8-m.main
   TOOLCHAIN_MFLOAT   := -mfloat-abi=soft
+  ZARCHCPUFLAGS      := -mcpu=cortex_m23
 else ifeq ($(CONFIG_ARCH_CORTEXM33),y)
   TOOLCHAIN_MTUNE    := -mtune=cortex-m33
   TOOLCHAIN_MARCH    := -march=armv8-m.main$(EXTCPUFLAGS)
@@ -40,6 +41,7 @@ else ifeq ($(CONFIG_ARCH_CORTEXM35P),y)
   ifeq ($(CONFIG_ARCH_FPU),y)
     TOOLCHAIN_MFLOAT := -mfpu=fpv5-sp-d16
   endif
+  ZARCHCPUFLAGS := -mcpu=cortex_m35p
 else ifeq ($(CONFIG_ARCH_CORTEXM55),y)
   TOOLCHAIN_MTUNE    := -mtune=cortex-m55
   ifeq ($(CONFIG_ARM_HAVE_MVE),y)
@@ -50,6 +52,7 @@ else ifeq ($(CONFIG_ARCH_CORTEXM55),y)
   ifeq ($(CONFIG_ARCH_FPU),y)
     TOOLCHAIN_MFLOAT := -mfpu=fpv5-d16
   endif
+  ZARCHCPUFLAGS := -mcpu=cortex_m55
 else ifeq ($(CONFIG_ARCH_CORTEXM85),y)
   TOOLCHAIN_MTUNE    := -mtune=cortex-m85
   ifeq ($(CONFIG_ARM_HAVE_MVE),y)
@@ -60,6 +63,7 @@ else ifeq ($(CONFIG_ARCH_CORTEXM85),y)
   ifeq ($(CONFIG_ARCH_FPU),y)
     TOOLCHAIN_MFLOAT := -mfpu=fpv5-d16
   endif
+  ZARCHCPUFLAGS := -mcpu=cortex_m85
 endif
 
 ifeq ($(CONFIG_ARCH_FPU),y)

arch/arm/src/common/Toolchain.defs

@@ -229,6 +229,10 @@ else
   endif
 endif
 
+# Zig compiler
+
+ZIG := zig
+
 ifeq ($(CONFIG_ARCH_TOOLCHAIN_CLANG),y)
   ARCHOPTIMIZATION += -fshort-enums
 endif
@@ -258,6 +262,20 @@ else
   LDFLAGS += -nostdlib
 endif
 
+ifeq ($(CONFIG_ARM_THUMB),y)
+  ZARCH := thumb
+else
+  ZARCH := arm
+endif
+
+ifeq ($(CONFIG_ARCH_FPU),y)
+  ZEABI := gnueabihf
+else
+  ZEABI := gnueabi
+endif
+
+ZIGFLAGS = -target $(ZARCH)-freestanding-$(ZEABI)
+
 # Optimization of unused sections
 
 ifeq ($(CONFIG_ARM_TOOLCHAIN_ARMCLANG),)

arch/risc-v/src/common/Toolchain.defs

@@ -126,22 +126,27 @@ ifeq ($(CONFIG_RISCV_TOOLCHAIN),GNU_RVG)
 
   ifeq ($(CONFIG_ARCH_RV_ISA_M),y)
     ARCHRVISAM = m
+    ZARCHRVISAM := +m
   endif
 
   ifeq ($(CONFIG_ARCH_RV_ISA_A),y)
     ARCHRVISAA = a
+    ZARCHRVISAA := +a
   endif
   
   ifeq ($(CONFIG_ARCH_RV_ISA_C),y)
     ARCHRVISAC = c
+    ZARCHRVISAC := +c
   endif
 
   ifeq ($(CONFIG_ARCH_FPU),y)
     ARCHRVISAF = f
+    ZARCHRVISAF := +f
   endif
 
   ifeq ($(CONFIG_ARCH_DPFPU),y)
     ARCHRVISAD = d
+    ZARCHRVISAD := +d
   endif
 
   # Detect abi type
@@ -149,9 +154,11 @@ ifeq ($(CONFIG_RISCV_TOOLCHAIN),GNU_RVG)
   ifeq ($(CONFIG_ARCH_RV32),y)
     ARCHTYPE = rv32
     ARCHABITYPE = ilp32
+    ZARCHTYPE := riscv32
   else ifeq ($(CONFIG_ARCH_RV64),y)
     ARCHTYPE = rv64
     ARCHABITYPE = lp64
+    ZARCHTYPE := riscv64
   endif
 
   # Construct arch flags
@@ -182,6 +189,8 @@ ifeq ($(CONFIG_MM_UBSAN_TRAP_ON_ERROR),y)
   ARCHOPTIMIZATION += -fsanitize-undefined-trap-on-error
 endif
 
+ZIGFLAGS = -target $(ZARCHTYPE)-freestanding-none -mcpu generic_$(ARCHTYPE)$(ZARCHRVISAM)$(ZARCHRVISAA)$(ZARCHRVISAF)$(ZARCHRVISAF)$(ZARCHRVISAC) -mcmodel=medium
+
 # Default toolchain
 
 CC      = $(CROSSDEV)gcc
@@ -193,6 +202,7 @@ OBJDUMP = $(CROSSDEV)objdump
 LD      = $(CROSSDEV)ld
 AR      = $(CROSSDEV)ar rcs
 NM      = $(CROSSDEV)nm
+ZIG     = zig
 
 # Link Time Optimization
 

boards/sim/sim/sim/scripts/Make.defs

@@ -124,6 +124,9 @@ endif
 ifeq ($(CONFIG_SIM_M32),y)
   ARCHCFLAGS += -m32
   ARCHCXXFLAGS += -m32
+  ZARCH := x86
+else
+  ZARCH := x86_64
 endif
 
 ARCHPICFLAGS = -fpic
@@ -143,12 +146,14 @@ NM = $(CROSSDEV)nm
 OBJCOPY = $(CROSSDEV)objcopy
 OBJDUMP = $(CROSSDEV)objdump
 RUSTC = rustc --edition 2021
+ZIG = zig
 
 CFLAGS := $(ARCHOPTIMIZATION) $(ARCHCFLAGS) $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) -pipe
 CXXFLAGS := $(ARCHOPTIMIZATION) $(ARCHCXXFLAGS) $(ARCHXXINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS) -pipe
 CPPFLAGS := $(ARCHINCLUDES) $(ARCHDEFINES) $(EXTRAFLAGS)
 AFLAGS := $(CFLAGS) -D__ASSEMBLY__
 RUSTFLAGS := $(ARCHOPTIMIZATIONRUST)
+ZIGFLAGS := -target $(ZARCH)-freestanding-gnu
 
 ifeq ($(CONFIG_LIBCXX),y)
   ifeq ($(CONFIG_HOST_MACOS),y)