stm32h7: add lower half timer driver
This commit is contained in:
Max Kriegleder
Xiang Xiao
parent
8e72b07a62
commit
8c465a64b9
@ -118,6 +118,10 @@ ifeq ($(CONFIG_STM32H7_SDMMC),y)
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CHIP_CSRCS += stm32_sdmmc.c
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endif
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ifeq ($(CONFIG_TIMER),y)
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CHIP_CSRCS += stm32_tim_lowerhalf.c
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endif
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ifeq ($(CONFIG_USBDEV),y)
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CHIP_CSRCS += stm32_otgdev.c
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endif
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581
arch/arm/src/stm32h7/stm32_tim_lowerhalf.c
Normal file
581
arch/arm/src/stm32h7/stm32_tim_lowerhalf.c
Normal file
@ -0,0 +1,581 @@
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/****************************************************************************
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* arch/arm/src/stm32h7/stm32_tim_lowerhalf.c
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*
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* Copyright (C) 2023 Max Kriegleder. All rights reserved.
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* Copyright (C) 2015 Wail Khemir. All rights reserved.
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* Copyright (C) 2015 Omni Hoverboards Inc. All rights reserved.
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* Authors: Wail Khemir <khemirwail@gmail.com>
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* Paul Alexander Patience <paul-a.patience@polymtl.ca>
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* Max Kriegleder <max.kriegleder@gmail.com>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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****************************************************************************/
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <sys/types.h>
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#include <stdint.h>
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#include <string.h>
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#include <errno.h>
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#include <nuttx/irq.h>
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#include <nuttx/timers/timer.h>
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#include <arch/board/board.h>
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#include "stm32_tim.h"
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#if defined(CONFIG_TIMER) && \
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(defined(CONFIG_STM32H7_TIM1) || defined(CONFIG_STM32H7_TIM2) || \
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defined(CONFIG_STM32H7_TIM3) || defined(CONFIG_STM32H7_TIM4) || \
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defined(CONFIG_STM32H7_TIM5) || defined(CONFIG_STM32H7_TIM6) || \
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defined(CONFIG_STM32H7_TIM7) || defined(CONFIG_STM32H7_TIM8) || \
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defined(CONFIG_STM32H7_TIM9) || defined(CONFIG_STM32H7_TIM10) || \
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defined(CONFIG_STM32H7_TIM11) || defined(CONFIG_STM32H7_TIM12) || \
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defined(CONFIG_STM32H7_TIM13) || defined(CONFIG_STM32H7_TIM14))
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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#define STM32_TIM1_RES 16
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#define STM32_TIM2_RES 32
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#define STM32_TIM3_RES 16
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#define STM32_TIM4_RES 16
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#define STM32_TIM5_RES 32
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#define STM32_TIM6_RES 16
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#define STM32_TIM7_RES 16
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#define STM32_TIM8_RES 16
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#define STM32_TIM9_RES 16
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#define STM32_TIM10_RES 16
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#define STM32_TIM11_RES 16
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#define STM32_TIM12_RES 16
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#define STM32_TIM13_RES 16
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#define STM32_TIM14_RES 16
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/****************************************************************************
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* Private Types
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****************************************************************************/
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/* This structure provides the private representation of the "lower-half"
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* driver state structure. This structure must be cast-compatible with the
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* timer_lowerhalf_s structure.
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*/
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struct stm32_lowerhalf_s
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{
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const struct timer_ops_s *ops; /* Lower half operations */
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struct stm32_tim_dev_s *tim; /* stm32 timer driver */
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tccb_t callback; /* Current user interrupt callback */
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void *arg; /* Argument passed to upper half callback */
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bool started; /* True: Timer has been started */
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const uint8_t resolution; /* Number of bits in the timer (16 or 32 bits) */
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};
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/****************************************************************************
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* Private Function Prototypes
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****************************************************************************/
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static int stm32_timer_handler(int irq, void * context, void * arg);
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/* "Lower half" driver methods **********************************************/
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static int stm32_start(struct timer_lowerhalf_s *lower);
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static int stm32_stop(struct timer_lowerhalf_s *lower);
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static int stm32_settimeout(struct timer_lowerhalf_s *lower,
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uint32_t timeout);
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static void stm32_setcallback(struct timer_lowerhalf_s *lower,
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tccb_t callback, void *arg);
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/****************************************************************************
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* Private Data
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****************************************************************************/
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/* "Lower half" driver methods */
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static const struct timer_ops_s g_timer_ops =
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{
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.start = stm32_start,
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.stop = stm32_stop,
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.getstatus = NULL,
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.settimeout = stm32_settimeout,
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.setcallback = stm32_setcallback,
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.ioctl = NULL,
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};
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#ifdef CONFIG_STM32H7_TIM1
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static struct stm32_lowerhalf_s g_tim1_lowerhalf =
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{
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.ops = &g_timer_ops,
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.resolution = STM32_TIM1_RES,
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};
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#endif
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#ifdef CONFIG_STM32H7_TIM2
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static struct stm32_lowerhalf_s g_tim2_lowerhalf =
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{
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.ops = &g_timer_ops,
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.resolution = STM32_TIM2_RES,
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};
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#endif
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#ifdef CONFIG_STM32H7_TIM3
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static struct stm32_lowerhalf_s g_tim3_lowerhalf =
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{
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.ops = &g_timer_ops,
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.resolution = STM32_TIM3_RES,
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};
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#endif
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#ifdef CONFIG_STM32H7_TIM4
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static struct stm32_lowerhalf_s g_tim4_lowerhalf =
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{
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.ops = &g_timer_ops,
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.resolution = STM32_TIM4_RES,
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};
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#endif
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#ifdef CONFIG_STM32H7_TIM5
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static struct stm32_lowerhalf_s g_tim5_lowerhalf =
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{
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.ops = &g_timer_ops,
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.resolution = STM32_TIM5_RES,
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};
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#endif
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#ifdef CONFIG_STM32H7_TIM6
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static struct stm32_lowerhalf_s g_tim6_lowerhalf =
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{
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.ops = &g_timer_ops,
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.resolution = STM32_TIM6_RES,
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};
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#endif
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#ifdef CONFIG_STM32H7_TIM7
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static struct stm32_lowerhalf_s g_tim7_lowerhalf =
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{
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.ops = &g_timer_ops,
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.resolution = STM32_TIM7_RES,
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};
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#endif
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#ifdef CONFIG_STM32H7_TIM8
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static struct stm32_lowerhalf_s g_tim8_lowerhalf =
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{
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.ops = &g_timer_ops,
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.resolution = STM32_TIM8_RES,
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};
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#endif
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#ifdef CONFIG_STM32H7_TIM9
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static struct stm32_lowerhalf_s g_tim9_lowerhalf =
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{
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.ops = &g_timer_ops,
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.resolution = STM32_TIM9_RES,
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};
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#endif
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#ifdef CONFIG_STM32H7_TIM10
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static struct stm32_lowerhalf_s g_tim10_lowerhalf =
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{
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.ops = &g_timer_ops,
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.resolution = STM32_TIM10_RES,
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};
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#endif
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#ifdef CONFIG_STM32H7_TIM11
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static struct stm32_lowerhalf_s g_tim11_lowerhalf =
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{
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.ops = &g_timer_ops,
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.resolution = STM32_TIM11_RES,
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};
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#endif
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#ifdef CONFIG_STM32H7_TIM12
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static struct stm32_lowerhalf_s g_tim12_lowerhalf =
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{
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.ops = &g_timer_ops,
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.resolution = STM32_TIM12_RES,
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};
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#endif
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#ifdef CONFIG_STM32H7_TIM13
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static struct stm32_lowerhalf_s g_tim13_lowerhalf =
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{
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.ops = &g_timer_ops,
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.resolution = STM32_TIM13_RES,
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};
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#endif
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#ifdef CONFIG_STM32H7_TIM14
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static struct stm32_lowerhalf_s g_tim14_lowerhalf =
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{
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.ops = &g_timer_ops,
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.resolution = STM32_TIM14_RES,
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};
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#endif
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/****************************************************************************
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* Private Functions
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****************************************************************************/
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/****************************************************************************
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* Name: stm32_timer_handler
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*
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* Description:
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* timer interrupt handler
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*
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* Input Parameters:
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*
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* Returned Value:
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*
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****************************************************************************/
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static int stm32_timer_handler(int irq, void * context, void * arg)
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{
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struct stm32_lowerhalf_s *lower = (struct stm32_lowerhalf_s *) arg;
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uint32_t next_interval_us = 0;
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STM32_TIM_ACKINT(lower->tim, ATIM_DIER_UIE);
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if (lower->callback(&next_interval_us, lower->arg))
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{
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if (next_interval_us > 0)
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{
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STM32_TIM_SETPERIOD(lower->tim, next_interval_us);
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}
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}
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else
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{
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stm32_stop((struct timer_lowerhalf_s *)lower);
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}
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return OK;
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}
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/****************************************************************************
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* Name: stm32_start
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*
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* Description:
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* Start the timer, resetting the time to the current timeout,
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*
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* Input Parameters:
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* lower - A pointer the publicly visible representation of the
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* "lower-half" driver state structure.
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*
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* Returned Value:
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* Zero on success; a negated errno value on failure.
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*
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****************************************************************************/
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static int stm32_start(struct timer_lowerhalf_s *lower)
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{
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struct stm32_lowerhalf_s *priv = (struct stm32_lowerhalf_s *)lower;
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if (!priv->started)
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{
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STM32_TIM_SETMODE(priv->tim, STM32_TIM_MODE_UP);
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if (priv->callback != NULL)
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{
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STM32_TIM_SETISR(priv->tim, stm32_timer_handler, priv, 0);
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STM32_TIM_ENABLEINT(priv->tim, ATIM_DIER_UIE);
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}
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priv->started = true;
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return OK;
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}
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/* Return EBUSY to indicate that the timer was already running */
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return -EBUSY;
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}
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/****************************************************************************
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* Name: stm32_stop
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*
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* Description:
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* Stop the timer
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*
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* Input Parameters:
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* lower - A pointer the publicly visible representation of the
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* "lower-half" driver state structure.
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*
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* Returned Value:
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* Zero on success; a negated errno value on failure.
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*
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****************************************************************************/
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static int stm32_stop(struct timer_lowerhalf_s *lower)
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{
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struct stm32_lowerhalf_s *priv = (struct stm32_lowerhalf_s *)lower;
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if (priv->started)
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{
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STM32_TIM_SETMODE(priv->tim, STM32_TIM_MODE_DISABLED);
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STM32_TIM_DISABLEINT(priv->tim, ATIM_DIER_UIE);
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STM32_TIM_SETISR(priv->tim, NULL, NULL, 0);
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priv->started = false;
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return OK;
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}
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/* Return ENODEV to indicate that the timer was not running */
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return -ENODEV;
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}
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/****************************************************************************
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* Name: stm32_settimeout
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*
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* Description:
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* Set a new timeout value (and reset the timer)
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*
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* Input Parameters:
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* lower - A pointer the publicly visible representation of the
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* "lower-half" driver state structure.
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* timeout - The new timeout value in microseconds.
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*
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* Returned Value:
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* Zero on success; a negated errno value on failure.
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*
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****************************************************************************/
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static int stm32_settimeout(struct timer_lowerhalf_s *lower,
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uint32_t timeout)
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{
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struct stm32_lowerhalf_s *priv = (struct stm32_lowerhalf_s *)lower;
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uint64_t maxtimeout;
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if (priv->started)
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{
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return -EPERM;
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}
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maxtimeout = (1 << priv->resolution) - 1;
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if (timeout > maxtimeout)
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{
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uint64_t freq = (maxtimeout * 1000000) / timeout;
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STM32_TIM_SETCLOCK(priv->tim, freq);
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STM32_TIM_SETPERIOD(priv->tim, maxtimeout);
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}
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else
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{
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STM32_TIM_SETCLOCK(priv->tim, 1000000);
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STM32_TIM_SETPERIOD(priv->tim, timeout);
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}
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return OK;
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}
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/****************************************************************************
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* Name: stm32_setcallback
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*
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* Description:
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* Call this user provided timeout callback.
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*
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* Input Parameters:
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* lower - A pointer the publicly visible representation of the
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* "lower-half" driver state structure.
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* callback - The new timer expiration function pointer. If this
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* function pointer is NULL, then the reset-on-expiration
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* behavior is restored,
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* arg - Argument that will be provided in the callback
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*
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* Returned Value:
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* The previous timer expiration function pointer or NULL is there was
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* no previous function pointer.
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*
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****************************************************************************/
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static void stm32_setcallback(struct timer_lowerhalf_s *lower,
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tccb_t callback, void *arg)
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{
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struct stm32_lowerhalf_s *priv = (struct stm32_lowerhalf_s *)lower;
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irqstate_t flags = enter_critical_section();
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/* Save the new callback */
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priv->callback = callback;
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priv->arg = arg;
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if (callback != NULL && priv->started)
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{
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STM32_TIM_SETISR(priv->tim, stm32_timer_handler, priv, 0);
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STM32_TIM_ENABLEINT(priv->tim, ATIM_DIER_UIE);
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}
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else
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{
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STM32_TIM_DISABLEINT(priv->tim, ATIM_DIER_UIE);
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STM32_TIM_SETISR(priv->tim, NULL, NULL, 0);
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}
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leave_critical_section(flags);
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}
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/****************************************************************************
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* Public Functions
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****************************************************************************/
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/****************************************************************************
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* Name: stm32_timer_initialize
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*
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* Description:
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* Bind the configuration timer to a timer lower half instance and
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* register the timer drivers at 'devpath'
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*
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* Input Parameters:
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* devpath - The full path to the timer device. This should be of the
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* form /dev/timer0
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* timer - the timer's number.
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*
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* Returned Value:
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* Zero (OK) is returned on success; A negated errno value is returned
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* to indicate the nature of any failure.
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*
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****************************************************************************/
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int stm32_timer_initialize(const char *devpath, int timer)
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{
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struct stm32_lowerhalf_s *lower;
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switch (timer)
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{
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#ifdef CONFIG_STM32H7_TIM1
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case 1:
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lower = &g_tim1_lowerhalf;
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break;
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#endif
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#ifdef CONFIG_STM32H7_TIM2
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case 2:
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lower = &g_tim2_lowerhalf;
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break;
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#endif
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#ifdef CONFIG_STM32H7_TIM3
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case 3:
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lower = &g_tim3_lowerhalf;
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break;
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#endif
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#ifdef CONFIG_STM32H7_TIM4
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case 4:
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lower = &g_tim4_lowerhalf;
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break;
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#endif
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#ifdef CONFIG_STM32H7_TIM5
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case 5:
|
||||
lower = &g_tim5_lowerhalf;
|
||||
break;
|
||||
#endif
|
||||
#ifdef CONFIG_STM32H7_TIM6
|
||||
case 6:
|
||||
lower = &g_tim6_lowerhalf;
|
||||
break;
|
||||
#endif
|
||||
#ifdef CONFIG_STM32H7_TIM7
|
||||
case 7:
|
||||
lower = &g_tim7_lowerhalf;
|
||||
break;
|
||||
#endif
|
||||
#ifdef CONFIG_STM32H7_TIM8
|
||||
case 8:
|
||||
lower = &g_tim8_lowerhalf;
|
||||
break;
|
||||
#endif
|
||||
#ifdef CONFIG_STM32H7_TIM9
|
||||
case 9:
|
||||
lower = &g_tim9_lowerhalf;
|
||||
break;
|
||||
#endif
|
||||
#ifdef CONFIG_STM32H7_TIM10
|
||||
case 10:
|
||||
lower = &g_tim10_lowerhalf;
|
||||
break;
|
||||
#endif
|
||||
#ifdef CONFIG_STM32H7_TIM11
|
||||
case 11:
|
||||
lower = &g_tim11_lowerhalf;
|
||||
break;
|
||||
#endif
|
||||
#ifdef CONFIG_STM32H7_TIM12
|
||||
case 12:
|
||||
lower = &g_tim12_lowerhalf;
|
||||
break;
|
||||
#endif
|
||||
#ifdef CONFIG_STM32H7_TIM13
|
||||
case 13:
|
||||
lower = &g_tim13_lowerhalf;
|
||||
break;
|
||||
#endif
|
||||
#ifdef CONFIG_STM32H7_TIM14
|
||||
case 14:
|
||||
lower = &g_tim14_lowerhalf;
|
||||
break;
|
||||
#endif
|
||||
default:
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
/* Initialize the elements of lower half state structure */
|
||||
|
||||
lower->started = false;
|
||||
lower->callback = NULL;
|
||||
lower->tim = stm32_tim_init(timer);
|
||||
|
||||
if (lower->tim == NULL)
|
||||
{
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
/* Register the timer driver as /dev/timerX. The returned value from
|
||||
* timer_register is a handle that could be used with timer_unregister().
|
||||
* REVISIT: The returned handle is discard here.
|
||||
*/
|
||||
|
||||
void *drvr = timer_register(devpath,
|
||||
(struct timer_lowerhalf_s *)lower);
|
||||
if (drvr == NULL)
|
||||
{
|
||||
/* The actual cause of the failure may have been a failure to allocate
|
||||
* perhaps a failure to register the timer driver (such as if the
|
||||
* 'depath' were not unique). We know here but we return EEXIST to
|
||||
* indicate the failure (implying the non-unique devpath).
|
||||
*/
|
||||
|
||||
return -EEXIST;
|
||||
}
|
||||
|
||||
return OK;
|
||||
}
|
||||
|
||||
#endif /* CONFIG_TIMER */
|
||||
Loading…
Reference in New Issue
Block a user