From 8c962210937fcd4e4c0baa0b6f95ce1439ed34cb Mon Sep 17 00:00:00 2001 From: Gregory Nutt Date: Sun, 30 Oct 2016 07:37:51 -0600 Subject: [PATCH] Xtensa: Replace CONFIG_XTENSA_CALL0_ABI with compiler defined __XTENSA_CALL0_ABI__ --- arch/xtensa/Kconfig | 7 --- arch/xtensa/include/irq.h | 6 +- arch/xtensa/src/common/xtensa_abi.h | 58 +++++++++++++------ arch/xtensa/src/common/xtensa_context.S | 4 +- arch/xtensa/src/common/xtensa_dumpstate.c | 2 +- arch/xtensa/src/common/xtensa_initialstate.c | 2 +- arch/xtensa/src/common/xtensa_int_handlers.S | 6 +- arch/xtensa/src/common/xtensa_macros.h | 4 +- .../xtensa/src/common/xtensa_schedsigaction.c | 4 +- 9 files changed, 54 insertions(+), 39 deletions(-) diff --git a/arch/xtensa/Kconfig b/arch/xtensa/Kconfig index 124cb96a99..71be453e17 100644 --- a/arch/xtensa/Kconfig +++ b/arch/xtensa/Kconfig @@ -31,13 +31,6 @@ config ARCH_FAMILY_LX6 Cadence® Tensilica® Xtensa® LX6 data plane processing unit (DPU). The LX6 is a configurable and extensible processor core. -config XTENSA_CALL0_ABI - bool - default y - ---help--- - The Window ABI is not supported. Only the CALL0 ABI is supported in the - current implementation. - config XTENSA_USE_OVLY bool default n diff --git a/arch/xtensa/include/irq.h b/arch/xtensa/include/irq.h index 1ee9721e38..0e8f7c33b0 100644 --- a/arch/xtensa/include/irq.h +++ b/arch/xtensa/include/irq.h @@ -113,7 +113,7 @@ # define _REG_CALL0_START _REG_LOOPS_START #endif -#ifndef CONFIG_XTENSA_CALL0_ABI +#ifndef __XTENSA_CALL0_ABI__ /* Temporary space for saving stuff during window spill */ # define REG_TMP0 (_REG_CALL0_START + 0) @@ -243,7 +243,7 @@ static inline uint32_t up_irq_save(void) static inline void up_irq_enable(void) { -#ifdef CONFIG_XTENSA_CALL0_ABI +#ifdef __XTENSA_CALL0_ABI__ xtensa_setps(PS_INTLEVEL(0) | PS_UM); #else xtensa_setps(PS_INTLEVEL(0) | PS_UM | PS_WOE); @@ -254,7 +254,7 @@ static inline void up_irq_enable(void) static inline void up_irq_disable(void) { -#ifdef CONFIG_XTENSA_CALL0_ABI +#ifdef __XTENSA_CALL0_ABI__ xtensa_setps(PS_INTLEVEL(XCHAL_EXCM_LEVEL) | PS_UM); #else xtensa_setps(PS_INTLEVEL(XCHAL_EXCM_LEVEL) | PS_UM | PS_WOE); diff --git a/arch/xtensa/src/common/xtensa_abi.h b/arch/xtensa/src/common/xtensa_abi.h index e4c0878c15..6fa4456f83 100644 --- a/arch/xtensa/src/common/xtensa_abi.h +++ b/arch/xtensa/src/common/xtensa_abi.h @@ -36,31 +36,53 @@ /* Windowed ABI * - * Windowed Register Usage - * Callee Register Usage - * Register Name - * a0 Return address - * a1/sp Stack pointer - * a2..a7 In, out, inout, and return values + * The Windowed Register Option replaces the simple 16-entry AR register + * file with a larger register file from which a window of 16 entries is + * visible at any given time. The window is rotated on subroutine entry + * and exit, automatically saving and restoring some registers. When the + * window is rotated far enough to require registers to be saved to or + * restored from the program stack, an exception is raised to move some + * of the register values between the register file and the program stack. + * + * Windowed Register Usage: + * ---------------- ---------------------------------- + * Callee Register Usage + * Register Name + * ---------------- ---------------------------------- + * a0 Return address + * a1/sp Stack pointer + * a2..a7 In, out, inout, and return values + * ---------------- ---------------------------------- * * Calls to routines that use only a2..a3 as parameters may use the CALL4, * CALL8, or CALL12 instructions to save 4, 8, or 12 live registers. Calls * to routines that use a2..a7 for parameters may use only CALL8 or CALL12. * + * The stack pointer SP should only be modified by ENTRY and MOVSP + * instructions (except for initialization and restoration). If some other + * instruction modifies SP, any values in the register-spill area will not + * be moved. + * * Call 0 ABI * - * CALL0 AR Register Usage - * Callee Register Usage - * Register Name - * a0 Return Address - * a1/sp Stack pointer - * a2..a7 In, out, inout, and return values - * a8 Static Chain - * a12..a15 Callee-saved - * a15 Stack-Frame Pointer (optional) + * CALL0 AR Register Usage + * ---------------- ---------------------------------- + * Callee Register Usage + * Register Name + * ---------------- ---------------------------------- + * a0 Return Address + * a1/sp Stack pointer + * a2..a7 In, out, inout, and return values + * a8 Static Chain + * a12..a15 Callee-saved + * a15 Stack-Frame Pointer (optional) * - * CALL0 is used. The return address is placed in A0 and the CPU simply - * jumps to the CALL0 function entry point. + * a0, a2-a11 Caller-saved + * a1, a12..a15 Callee-saved + * ---------------- ---------------------------------- + * + * CALL0 is used. The return address is placed in A0 and the CPU simply + * jumps to the CALL0 function entry point. */ /**************************************************************************** @@ -82,7 +104,7 @@ */ #ifdef __ASSEMBLY__ -#ifdef CONFIG_XTENSA_CALL0_ABI +#ifdef __XTENSA_CALL0_ABI__ /* Call0 */ .macro entry1 size=0x10 diff --git a/arch/xtensa/src/common/xtensa_context.S b/arch/xtensa/src/common/xtensa_context.S index 0e163a475e..a2e69bee5a 100644 --- a/arch/xtensa/src/common/xtensa_context.S +++ b/arch/xtensa/src/common/xtensa_context.S @@ -146,11 +146,11 @@ _xtensa_context_save: s32i a3, a2, (4 * REG_LCOUNT) #endif -#ifndef CONFIG_XTENSA_CALL0_ABI +#ifndef __XTENSA_CALL0_ABI__ mov a9, a0 /* Preserve ret addr */ #endif -#ifndef CONFIG_XTENSA_CALL0_ABI +#ifndef __XTENSA_CALL0_ABI__ /* To spill the reg windows, temp. need pre-interrupt stack ptr and * a4-15. Need to save a9,12,13 temporarily (in frame temps) and * recover originals. Interrupts need to be disabled below diff --git a/arch/xtensa/src/common/xtensa_dumpstate.c b/arch/xtensa/src/common/xtensa_dumpstate.c index f99f3d905c..b1afe927fc 100644 --- a/arch/xtensa/src/common/xtensa_dumpstate.c +++ b/arch/xtensa/src/common/xtensa_dumpstate.c @@ -123,7 +123,7 @@ static inline void xtensa_registerdump(void) (unsigned long)regs[REG_LBEG], (unsigned long)regs[REG_LEND], (unsigned long)regs[REG_LCOUNT]); #endif -#ifndef CONFIG_XTENSA_CALL0_ABI +#ifndef __XTENSA_CALL0_ABI__ _alert(" TMP0: %08lx TMP1: %08lx TMP2: %08lx\n", (unsigned long)regs[REG_TMP0], (unsigned long)regs[REG_TMP1], (unsigned long)regs[REG_TMP2]); diff --git a/arch/xtensa/src/common/xtensa_initialstate.c b/arch/xtensa/src/common/xtensa_initialstate.c index d2b0744460..fb74503ad5 100644 --- a/arch/xtensa/src/common/xtensa_initialstate.c +++ b/arch/xtensa/src/common/xtensa_initialstate.c @@ -87,7 +87,7 @@ void up_initial_state(struct tcb_s *tcb) * mode. */ -#ifdef CONFIG_XTENSA_CALL0_ABI +#ifdef __XTENSA_CALL0_ABI__ xcp->regs[REG_PS] = PS_UM | PS_EXCM; #else diff --git a/arch/xtensa/src/common/xtensa_int_handlers.S b/arch/xtensa/src/common/xtensa_int_handlers.S index fd59b6c662..9ecb529988 100644 --- a/arch/xtensa/src/common/xtensa_int_handlers.S +++ b/arch/xtensa/src/common/xtensa_int_handlers.S @@ -134,7 +134,7 @@ l32i a4, a4, \level << 2 beqz a4, 2f -#ifdef CONFIG_XTENSA_CALL0_ABI +#ifdef __XTENSA_CALL0_ABI__ callx0 a4 beqz a2, 5f #else @@ -221,7 +221,7 @@ .macro ps_setup level tmp #if 0 /* Nested interrupts no yet supported */ -# ifdef CONFIG_XTENSA_CALL0_ABI +# ifdef __XTENSA_CALL0_ABI__ /* Disable interrupts at level and below */ movi \tmp, PS_INTLEVEL(\level) | PS_UM @@ -229,7 +229,7 @@ movi \tmp, PS_INTLEVEL(\level) | PS_UM | PS_WOE # endif #else -# ifdef CONFIG_XTENSA_CALL0_ABI +# ifdef __XTENSA_CALL0_ABI__ /* Disable all low- and medium-priority interrupts. Nested are not yet * supported. */ diff --git a/arch/xtensa/src/common/xtensa_macros.h b/arch/xtensa/src/common/xtensa_macros.h index aabe43b848..9b88671207 100644 --- a/arch/xtensa/src/common/xtensa_macros.h +++ b/arch/xtensa/src/common/xtensa_macros.h @@ -59,7 +59,7 @@ * expansions are implemented as assembler macros. */ -#ifdef CONFIG_XTENSA_CALL0_ABI +#ifdef __XTENSA_CALL0_ABI__ /* Call0 */ .macro entry1 size=0x10 @@ -86,7 +86,7 @@ # define RET(sz) retw # define RET0 retw -#endif /* CONFIG_XTENSA_CALL0_ABI */ +#endif /* __XTENSA_CALL0_ABI__ */ #endif /* __ASSEMBLY */ #endif /* __ARCH_XTENSA_SRC_COMMON_XTENSA_MACROS_H */ diff --git a/arch/xtensa/src/common/xtensa_schedsigaction.c b/arch/xtensa/src/common/xtensa_schedsigaction.c index 8090bb262d..438f712768 100644 --- a/arch/xtensa/src/common/xtensa_schedsigaction.c +++ b/arch/xtensa/src/common/xtensa_schedsigaction.c @@ -151,7 +151,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver) */ CURRENT_REGS[REG_PC] = (uint32_t)xtensa_sigdeliver; -#ifdef CONFIG_XTENSA_CALL0_ABI +#ifdef __XTENSA_CALL0_ABI__ CURRENT_REGS[REG_PS] = (uint32_t)(PS_INTLEVEL(0) | PS_UM); #else CURRENT_REGS[REG_PS] = (uint32_t)(PS_INTLEVEL(0) | PS_UM | PS_WOE); @@ -186,7 +186,7 @@ void up_schedule_sigaction(struct tcb_s *tcb, sig_deliver_t sigdeliver) */ tcb->xcp.regs[REG_PC] = (uint32_t)xtensa_sigdeliver; -#ifdef CONFIG_XTENSA_CALL0_ABI +#ifdef __XTENSA_CALL0_ABI__ tcb->xcp.regs[REG_PS] = (uint32_t)(PS_INTLEVEL(0) | PS_UM); #else tcb->xcp.regs[REG_PS] = (uint32_t)(PS_INTLEVEL(0) | PS_UM | PS_WOE);