From 8c9e9b628c7ddc1176d0d8cf850a64a34ed8df3b Mon Sep 17 00:00:00 2001
From: Dong Heng <dongheng@espressif.com>
Date: Thu, 23 Nov 2023 10:18:02 +0800
Subject: [PATCH] xtensa/esp32s3: GPIO clear pending interrupt status before
 enable IRQ

---
 arch/xtensa/src/esp32s3/esp32s3_gpio.c | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/arch/xtensa/src/esp32s3/esp32s3_gpio.c b/arch/xtensa/src/esp32s3/esp32s3_gpio.c
index c10948ad27..5c0d3e77cf 100644
--- a/arch/xtensa/src/esp32s3/esp32s3_gpio.c
+++ b/arch/xtensa/src/esp32s3/esp32s3_gpio.c
@@ -447,6 +447,17 @@ void esp32s3_gpioirqenable(int irq, gpio_intrtype_t intrtype)
   regval |= (uint32_t)intrtype << GPIO_PIN0_INT_TYPE_S;
   putreg32(regval, regaddr);
 
+  /* Clear pending GPIO interrupt status before enable IRQ */
+
+  if (pin < 32)
+    {
+      putreg32(1 << pin, GPIO_STATUS_W1TC_REG);
+    }
+  else
+    {
+      putreg32(1 << (pin - 32), GPIO_STATUS1_W1TC_REG);
+    }
+
   /* Configuration done. Re-enable the GPIO interrupt. */
 
   up_enable_irq(ESP32S3_IRQ_GPIO_INT_CPU);