Kinetis KL: PWM driver from Alan Carvalho de Assis
This commit is contained in:
Gregory Nutt
parent
ce58c79a1b
commit
8cc9d6a572
@ -269,6 +269,71 @@ config KL_SYSTICK_CORECLK_DIV16
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endchoice
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endchoice
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config KL_TPM0_PWM
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bool "TPM0 PWM"
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default n
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depends on KL_TPM0
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---help---
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Reserve timer 0 for use by PWM
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Timer devices may be used for different purposes. One special purpose is
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to generate modulated outputs for such things as motor control. If KL_TPM0
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is defined then THIS following may also be defined to indicate that
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the timer is intended to be used for pulsed output modulation.
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config KL_TPM0_CHANNEL
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int "TPM0 PWM Output Channel"
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default 0
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range 0 5
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depends on KL_TPM0_PWM
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---help---
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If TIM0 is enabled for PWM usage, you also need specifies the timer output
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channel {0,..,5}
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config KL_TPM1_PWM
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bool "TPM1 PWM"
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default n
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depends on KL_TPM1
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---help---
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Reserve timer 1 for use by PWM
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Timer devices may be used for different purposes. One special purpose is
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to generate modulated outputs for such things as motor control. If KL_TPM1
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is defined then THIS following may also be defined to indicate that
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the timer is intended to be used for pulsed output modulation.
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config KL_TPM1_CHANNEL
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int "TPM1 PWM Output Channel"
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default 0
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range 0 1 if ARCH_CHIP_MKL25Z128
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range 0 5 if !ARCH_CHIP_MKL25Z128
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depends on KL_TPM1_PWM
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---help---
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If TIM1 is enabled for PWM usage, you also need specifies the timer output
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channel {0,..,5}
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config KL_TPM2_PWM
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bool "TPM2 PWM"
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default n
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depends on KL_TPM2
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---help---
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Reserve timer 2 for use by PWM
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Timer devices may be used for different purposes. One special purpose is
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to generate modulated outputs for such things as motor control. If KL_TPM2
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is defined then THIS following may also be defined to indicate that
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the timer is intended to be used for pulsed output modulation.
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config KL_TPM2_CHANNEL
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int "TPM2 PWM Output Channel"
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default 0
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range 0 1 if ARCH_CHIP_MKL25Z128
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range 0 5 if !ARCH_CHIP_MKL25Z128
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depends on KL_TPM2_PWM
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---help---
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If TIM2 is enabled for PWM usage, you also need specifies the timer output
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channel {0,..,5}
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comment "Kinetis GPIO Interrupt Configuration"
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comment "Kinetis GPIO Interrupt Configuration"
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config GPIO_IRQ
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config GPIO_IRQ
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@ -83,6 +83,10 @@ CHIP_CSRCS += kl_spi.c
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endif
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endif
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endif
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endif
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ifeq ($(CONFIG_PWM),y)
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CHIP_CSRCS += kl_pwm.c
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endif
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ifeq ($(CONFIG_DEBUG),y)
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ifeq ($(CONFIG_DEBUG),y)
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CHIP_CSRCS += kl_dumpgpio.c
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CHIP_CSRCS += kl_dumpgpio.c
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endif
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endif
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743
arch/arm/src/kl/kl_pwm.c
Normal file
743
arch/arm/src/kl/kl_pwm.c
Normal file
@ -0,0 +1,743 @@
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/****************************************************************************
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* arch/arm/src/kl/kl_pwm.c
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*
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* Copyright (C) 2013 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <gnutt@nuttx.org>
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* Alan Carvalho de Assis <acassis@gmail.com>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* 3. Neither the name NuttX nor the names of its contributors may be
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* used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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****************************************************************************/
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/****************************************************************************
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* Included Files
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****************************************************************************/
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#include <nuttx/config.h>
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#include <stdint.h>
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#include <stdio.h>
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#include <assert.h>
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#include <errno.h>
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#include <debug.h>
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#include <nuttx/arch.h>
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#include <nuttx/pwm.h>
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#include <arch/board/board.h>
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#include "up_internal.h"
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#include "up_arch.h"
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#include "chip.h"
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#include "kl_pwm.h"
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#include "kl_gpio.h"
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#include "chip/kl_tpm.h"
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#include "chip/kl_sim.h"
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/* This module then only compiles if there is at least one enabled timer
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* intended for use with the PWM upper half driver.
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*/
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#if defined(CONFIG_KL_TPM0_PWM) || defined(CONFIG_KL_TPM1_PWM) || \
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defined(CONFIG_KL_TPM2_PWM)
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/****************************************************************************
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* Pre-processor Definitions
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****************************************************************************/
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/* PWM/Timer Definitions ****************************************************/
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/* Debug ********************************************************************/
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/* Non-standard debug that may be enabled just for testing PWM */
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#ifndef CONFIG_DEBUG
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# undef CONFIG_DEBUG_PWM
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#endif
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#ifdef CONFIG_DEBUG_PWM
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# define pwmdbg dbg
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# define pwmlldbg lldbg
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# ifdef CONFIG_DEBUG_VERBOSE
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# define pwmvdbg vdbg
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# define pwmllvdbg llvdbg
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# define pwm_dumpgpio(p,m) kl_dumpgpio(p,m)
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# else
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# define pwmlldbg(x...)
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# define pwmllvdbg(x...)
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# define pwm_dumpgpio(p,m)
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# endif
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#else
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# define pwmdbg(x...)
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# define pwmlldbg(x...)
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# define pwmvdbg(x...)
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# define pwmllvdbg(x...)
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# define pwm_dumpgpio(p,m)
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#endif
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/****************************************************************************
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* Private Types
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****************************************************************************/
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/* This structure representst the state of one PWM timer */
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struct kl_pwmtimer_s
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{
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FAR const struct pwm_ops_s *ops; /* PWM operations */
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uint8_t tpmid; /* Timer/PWM Module ID {0,..,2} */
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uint8_t channel; /* Timer/PWM Module channel: {0,..5} */
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uint32_t base; /* The base address of the timer */
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uint32_t pincfg; /* Output pin configuration */
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uint32_t pclk; /* The frequency of the peripheral clock */
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};
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/****************************************************************************
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* Static Function Prototypes
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****************************************************************************/
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/* Register access */
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static uint32_t pwm_getreg(struct kl_pwmtimer_s *priv, int offset);
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static void pwm_putreg(struct kl_pwmtimer_s *priv, int offset, uint32_t value);
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#if defined(CONFIG_DEBUG_PWM) && defined(CONFIG_DEBUG_VERBOSE)
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static void pwm_dumpregs(struct kl_pwmtimer_s *priv, FAR const char *msg);
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#else
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# define pwm_dumpregs(priv,msg)
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#endif
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/* Timer management */
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static int pwm_timer(FAR struct kl_pwmtimer_s *priv,
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FAR const struct pwm_info_s *info);
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/* PWM driver methods */
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static int pwm_setup(FAR struct pwm_lowerhalf_s *dev);
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static int pwm_shutdown(FAR struct pwm_lowerhalf_s *dev);
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static int pwm_start(FAR struct pwm_lowerhalf_s *dev,
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FAR const struct pwm_info_s *info);
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static int pwm_stop(FAR struct pwm_lowerhalf_s *dev);
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static int pwm_ioctl(FAR struct pwm_lowerhalf_s *dev,
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int cmd, unsigned long arg);
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/****************************************************************************
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* Private Data
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****************************************************************************/
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/* This is the list of lower half PWM driver methods used by the upper half driver */
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static const struct pwm_ops_s g_pwmops =
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{
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.setup = pwm_setup,
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.shutdown = pwm_shutdown,
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.start = pwm_start,
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.stop = pwm_stop,
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.ioctl = pwm_ioctl,
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};
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#ifdef CONFIG_KL_TPM0_PWM
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static struct kl_pwmtimer_s g_pwm0dev =
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{
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.ops = &g_pwmops,
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.tpmid = 0,
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.channel = CONFIG_KL_TPM0_CHANNEL,
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.base = KL_TPM0_BASE,
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.pincfg = PWM_TPM0_PINCFG,
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.pclk = BOARD_CORECLK_FREQ,
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};
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#endif
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#ifdef CONFIG_KL_TPM1_PWM
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static struct kl_pwmtimer_s g_pwm1dev =
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{
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.ops = &g_pwmops,
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.tpmid = 1,
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.channel = CONFIG_KL_TPM1_CHANNEL,
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.base = KL_TPM1_BASE,
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.pincfg = PWM_TPM1_PINCFG,
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.pclk = BOARD_CORECLK_FREQ,
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};
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#endif
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#ifdef CONFIG_KL_TPM2_PWM
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static struct kl_pwmtimer_s g_pwm2dev =
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{
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.ops = &g_pwmops,
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.tpmid = 2,
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.channel = CONFIG_KL_TPM2_CHANNEL,
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.base = KL_TPM2_BASE,
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.pincfg = PWM_TPM2_PINCFG,
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.pclk = BOARD_CORECLK_FREQ,
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};
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#endif
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/****************************************************************************
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* Private Functions
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****************************************************************************/
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/****************************************************************************
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* Name: pwm_getreg
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*
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* Description:
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* Read the value of an PWM timer register.
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*
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* Input Parameters:
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* priv - A reference to the PWM block status
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* offset - The offset to the register to read
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*
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* Returned Value:
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* The current contents of the specified register
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*
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****************************************************************************/
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static uint32_t pwm_getreg(struct kl_pwmtimer_s *priv, int offset)
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{
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return getreg32(priv->base + offset);
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}
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/****************************************************************************
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* Name: pwm_putreg
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*
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* Description:
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* Read the value of an PWM timer register.
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*
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* Input Parameters:
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* priv - A reference to the PWM block status
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* offset - The offset to the register to read
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*
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* Returned Value:
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* None
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*
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****************************************************************************/
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static void pwm_putreg(struct kl_pwmtimer_s *priv, int offset, uint32_t value)
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{
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putreg32(value, priv->base + offset);
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}
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/****************************************************************************
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* Name: pwm_dumpregs
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*
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* Description:
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* Dump all timer registers.
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*
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* Input parameters:
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* priv - A reference to the PWM block status
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*
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* Returned Value:
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* None
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*
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****************************************************************************/
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#if defined(CONFIG_DEBUG_PWM) && defined(CONFIG_DEBUG_VERBOSE)
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static void pwm_dumpregs(struct kl_pwmtimer_s *priv, FAR const char *msg)
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{
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pwmvdbg("%s:\n", msg);
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pwmvdbg(" TPM%d_SC: %04x TPM%d_CNT: %04x TPM%d_MOD: %04x\n",
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priv->tpmid,
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pwm_getreg(priv, TPM_SC_OFFSET),
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priv->tpmid,
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pwm_getreg(priv, TPM_CNT_OFFSET),
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priv->tpmid,
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pwm_getreg(priv, TPM_MOD_OFFSET));
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pwmvdbg(" TPM%d_STATUS: %04x TPM%d_CONF: %04x\n",
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priv->tpmid,
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pwm_getreg(priv, TPM_STATUS_OFFSET),
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priv->tpmid,
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pwm_getreg(priv, TPM_CONF_OFFSET));
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pwmvdbg(" TPM%d_C0SC: %04x TPM%d_C0V: %04x\n",
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priv->tpmid,
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pwm_getreg(priv, TPM_C0SC_OFFSET),
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priv->tpmid,
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pwm_getreg(priv, TPM_C0V_OFFSET));
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pwmvdbg(" TPM%d_C1SC: %04x TPM%d_C1V: %04x\n",
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priv->tpmid,
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pwm_getreg(priv, TPM_C1SC_OFFSET),
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priv->tpmid,
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pwm_getreg(priv, TPM_C1V_OFFSET));
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pwmvdbg(" TPM%d_C2SC: %04x TPM%d_C2V: %04x\n",
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priv->tpmid,
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pwm_getreg(priv, TPM_C2SC_OFFSET),
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priv->tpmid,
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pwm_getreg(priv, TPM_C2V_OFFSET));
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pwmvdbg(" TPM%d_C3SC: %04x TPM%d_C3V: %04x\n",
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priv->tpmid,
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pwm_getreg(priv, TPM_C3SC_OFFSET),
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priv->tpmid,
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pwm_getreg(priv, TPM_C3V_OFFSET));
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pwmvdbg(" TPM%d_C4SC: %04x TPM%d_C4V: %04x\n",
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priv->tpmid,
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pwm_getreg(priv, TPM_C4SC_OFFSET),
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priv->tpmid,
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pwm_getreg(priv, TPM_C4V_OFFSET));
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|
pwmvdbg(" TPM%d_C5SC: %04x TPM%d_C5V: %04x\n",
|
||||||
|
priv->tpmid,
|
||||||
|
pwm_getreg(priv, TPM_C5SC_OFFSET),
|
||||||
|
priv->tpmid,
|
||||||
|
pwm_getreg(priv, TPM_C5V_OFFSET));
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/****************************************************************************
|
||||||
|
* Name: pwm_timer
|
||||||
|
*
|
||||||
|
* Description:
|
||||||
|
* (Re-)initialize the timer resources and start the pulsed output
|
||||||
|
*
|
||||||
|
* Input parameters:
|
||||||
|
* priv - A reference to the lower half PWM driver state structure
|
||||||
|
* info - A reference to the characteristics of the pulsed output
|
||||||
|
*
|
||||||
|
* Returned Value:
|
||||||
|
* Zero on success; a negated errno value on failure
|
||||||
|
*
|
||||||
|
****************************************************************************/
|
||||||
|
|
||||||
|
static int pwm_timer(FAR struct kl_pwmtimer_s *priv,
|
||||||
|
FAR const struct pwm_info_s *info)
|
||||||
|
{
|
||||||
|
/* Calculated values */
|
||||||
|
|
||||||
|
uint32_t prescaler;
|
||||||
|
uint32_t tpmclk;
|
||||||
|
uint32_t modulo;
|
||||||
|
uint32_t regval;
|
||||||
|
uint32_t cv;
|
||||||
|
uint8_t i;
|
||||||
|
|
||||||
|
uint8_t presc_values[8] = {1, 2, 4, 8, 16, 32, 64, 128};
|
||||||
|
|
||||||
|
/* Register contents */
|
||||||
|
|
||||||
|
DEBUGASSERT(priv != NULL && info != NULL);
|
||||||
|
|
||||||
|
pwmvdbg("TPM%d channel: %d frequency: %d duty: %08x\n",
|
||||||
|
priv->tpmid, priv->channel, info->frequency, info->duty);
|
||||||
|
|
||||||
|
DEBUGASSERT(info->frequency > 0 && info->duty > 0 &&
|
||||||
|
info->duty < uitoub16(100));
|
||||||
|
|
||||||
|
/* Calculate optimal values for the timer prescaler and for the timer modulo
|
||||||
|
* register. If' frequency' is the desired frequency, then
|
||||||
|
*
|
||||||
|
* modulo = tpmclk / frequency
|
||||||
|
* tpmclk = pclk / presc
|
||||||
|
*
|
||||||
|
* Or,
|
||||||
|
*
|
||||||
|
* modulo = pclk / presc / frequency
|
||||||
|
*
|
||||||
|
* There are many solutions to do this, but the best solution will be the
|
||||||
|
* one that has the largest modulo value and the smallest prescaler value.
|
||||||
|
* That is the solution that should give us the most accuracy in the timer
|
||||||
|
* control. Subject to:
|
||||||
|
*
|
||||||
|
* 1 <= presc <= 128 (need to be 1, 2, 4, 8, 16, 32, 64, 128)
|
||||||
|
* 1 <= modulo <= 65535
|
||||||
|
*
|
||||||
|
* So presc = pclk / 65535 / frequency would be optimal.
|
||||||
|
*
|
||||||
|
* Example:
|
||||||
|
*
|
||||||
|
* pclk = 24 MHz
|
||||||
|
* frequency = 100 Hz
|
||||||
|
*
|
||||||
|
* prescaler = 24,000,000 / 65,535 / 100
|
||||||
|
* = 3.6 (or 4 -- taking the ceiling always)
|
||||||
|
* timclk = 24,000,000 / 4
|
||||||
|
* = 6,000,000
|
||||||
|
* modulo = 6,000,000 / 100
|
||||||
|
* = 60,000
|
||||||
|
*/
|
||||||
|
|
||||||
|
prescaler = (priv->pclk / info->frequency + 65534) / 65535;
|
||||||
|
|
||||||
|
for (i = 0; i < 7; i++)
|
||||||
|
{
|
||||||
|
if (prescaler <= presc_values[i])
|
||||||
|
{
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
prescaler = i;
|
||||||
|
|
||||||
|
tpmclk = priv->pclk / presc_values[prescaler];
|
||||||
|
|
||||||
|
modulo = tpmclk / info->frequency;
|
||||||
|
if (modulo < 1)
|
||||||
|
{
|
||||||
|
modulo = 1;
|
||||||
|
}
|
||||||
|
else if (modulo > 65535)
|
||||||
|
{
|
||||||
|
modulo = 65535;
|
||||||
|
}
|
||||||
|
|
||||||
|
/* Duty cycle:
|
||||||
|
*
|
||||||
|
* duty cycle = cv / modulo (fractional value)
|
||||||
|
*/
|
||||||
|
|
||||||
|
cv = b16toi(info->duty * modulo + b16HALF);
|
||||||
|
|
||||||
|
pwmvdbg("TPM%d PCLK: %d frequency: %d TPMCLK: %d prescaler: %d modulo: %d c0v: %d\n",
|
||||||
|
priv->tpmid, priv->pclk, info->frequency, tpmclk,
|
||||||
|
presc_values[prescaler], modulo, c0v);
|
||||||
|
|
||||||
|
/* Disable TPM and reset CNT before writing MOD and PS */
|
||||||
|
|
||||||
|
pwm_putreg(priv, TPM_SC_OFFSET, TPM_SC_CMOD_DIS);
|
||||||
|
pwm_putreg(priv, TPM_CNT_OFFSET, 0);
|
||||||
|
|
||||||
|
/* Set the modulo value */
|
||||||
|
|
||||||
|
pwm_putreg(priv, TPM_MOD_OFFSET, (uint16_t)modulo);
|
||||||
|
|
||||||
|
/* Set the duty cycle for channel specific */
|
||||||
|
|
||||||
|
switch (priv->channel)
|
||||||
|
{
|
||||||
|
case 0: /* PWM Mode configuration: Channel 0 */
|
||||||
|
{
|
||||||
|
pwm_putreg(priv, TPM_C0SC_OFFSET, TPM_CnSC_MSB | TPM_CnSC_ELSB);
|
||||||
|
pwm_putreg(priv, TPM_C0V_OFFSET, (uint16_t) cv);
|
||||||
|
}
|
||||||
|
break;
|
||||||
|
|
||||||
|
case 1: /* PWM Mode configuration: Channel 1 */
|
||||||
|
{
|
||||||
|
pwm_putreg(priv, TPM_C1SC_OFFSET, TPM_CnSC_MSB | TPM_CnSC_ELSB);
|
||||||
|
pwm_putreg(priv, TPM_C1V_OFFSET, (uint16_t) cv);
|
||||||
|
}
|
||||||
|
break;
|
||||||
|
|
||||||
|
case 2: /* PWM Mode configuration: Channel 2 */
|
||||||
|
{
|
||||||
|
pwm_putreg(priv, TPM_C2SC_OFFSET, TPM_CnSC_MSB | TPM_CnSC_ELSB);
|
||||||
|
pwm_putreg(priv, TPM_C2V_OFFSET, (uint16_t) cv);
|
||||||
|
}
|
||||||
|
break;
|
||||||
|
|
||||||
|
case 3: /* PWM Mode configuration: Channel 3 */
|
||||||
|
{
|
||||||
|
pwm_putreg(priv, TPM_C3SC_OFFSET, TPM_CnSC_MSB | TPM_CnSC_ELSB);
|
||||||
|
pwm_putreg(priv, TPM_C3V_OFFSET, (uint16_t) cv);
|
||||||
|
}
|
||||||
|
break;
|
||||||
|
|
||||||
|
case 4: /* PWM Mode configuration: Channel 4 */
|
||||||
|
{
|
||||||
|
pwm_putreg(priv, TPM_C4SC_OFFSET, TPM_CnSC_MSB | TPM_CnSC_ELSB);
|
||||||
|
pwm_putreg(priv, TPM_C4V_OFFSET, (uint16_t) cv);
|
||||||
|
}
|
||||||
|
break;
|
||||||
|
|
||||||
|
case 5: /* PWM Mode configuration: Channel 5 */
|
||||||
|
{
|
||||||
|
pwm_putreg(priv, TPM_C5SC_OFFSET, TPM_CnSC_MSB | TPM_CnSC_ELSB);
|
||||||
|
pwm_putreg(priv, TPM_C5V_OFFSET, (uint16_t) cv);
|
||||||
|
}
|
||||||
|
break;
|
||||||
|
|
||||||
|
default:
|
||||||
|
pwmdbg("No such channel: %d\n", priv->channel);
|
||||||
|
return -EINVAL;
|
||||||
|
}
|
||||||
|
|
||||||
|
/* Set prescaler and enable clock */
|
||||||
|
|
||||||
|
regval = pwm_getreg(priv, TPM_SC_OFFSET);
|
||||||
|
regval &= ~(TPM_SC_PS_MASK);
|
||||||
|
regval &= ~(TPM_SC_CMOD_MASK);
|
||||||
|
regval |= prescaler | TPM_SC_CMOD_LPTPM_CLK;
|
||||||
|
pwm_putreg(priv, TPM_SC_OFFSET, (uint16_t)regval);
|
||||||
|
|
||||||
|
pwm_dumpregs(priv, "After starting");
|
||||||
|
return OK;
|
||||||
|
}
|
||||||
|
|
||||||
|
/****************************************************************************
|
||||||
|
* Name: pwm_setup
|
||||||
|
*
|
||||||
|
* Description:
|
||||||
|
* This method is called when the driver is opened. The lower half driver
|
||||||
|
* should configure and initialize the device so that it is ready for use.
|
||||||
|
* It should not, however, output pulses until the start method is called.
|
||||||
|
*
|
||||||
|
* Input parameters:
|
||||||
|
* dev - A reference to the lower half PWM driver state structure
|
||||||
|
*
|
||||||
|
* Returned Value:
|
||||||
|
* Zero on success; a negated errno value on failure
|
||||||
|
*
|
||||||
|
* Assumptions:
|
||||||
|
* AHB1 or 2 clocking for the GPIOs and timer has already been configured
|
||||||
|
* by the RCC logic at power up.
|
||||||
|
*
|
||||||
|
****************************************************************************/
|
||||||
|
|
||||||
|
static int pwm_setup(FAR struct pwm_lowerhalf_s *dev)
|
||||||
|
{
|
||||||
|
uint32_t regval;
|
||||||
|
FAR struct kl_pwmtimer_s *priv = (FAR struct kl_pwmtimer_s *)dev;
|
||||||
|
|
||||||
|
/* Enable access to TPM modules */
|
||||||
|
|
||||||
|
regval = getreg32(KL_SIM_SCGC6);
|
||||||
|
regval |= SIM_SCGC6_TPM0 | SIM_SCGC6_TPM1 | SIM_SCGC6_TPM2;
|
||||||
|
putreg32(regval, KL_SIM_SCGC6);
|
||||||
|
|
||||||
|
pwmvdbg("TPM%d pincfg: %08x\n", priv->tpmid, priv->pincfg);
|
||||||
|
pwm_dumpregs(priv, "Initially");
|
||||||
|
|
||||||
|
/* Configure the PWM output pin, but do not start the timer yet */
|
||||||
|
|
||||||
|
kl_configgpio(priv->pincfg);
|
||||||
|
pwm_dumpgpio(priv->pincfg, "PWM setup");
|
||||||
|
return OK;
|
||||||
|
}
|
||||||
|
|
||||||
|
/****************************************************************************
|
||||||
|
* Name: pwm_shutdown
|
||||||
|
*
|
||||||
|
* Description:
|
||||||
|
* This method is called when the driver is closed. The lower half driver
|
||||||
|
* stop pulsed output, free any resources, disable the timer hardware, and
|
||||||
|
* put the system into the lowest possible power usage state
|
||||||
|
*
|
||||||
|
* Input parameters:
|
||||||
|
* dev - A reference to the lower half PWM driver state structure
|
||||||
|
*
|
||||||
|
* Returned Value:
|
||||||
|
* Zero on success; a negated errno value on failure
|
||||||
|
*
|
||||||
|
****************************************************************************/
|
||||||
|
|
||||||
|
static int pwm_shutdown(FAR struct pwm_lowerhalf_s *dev)
|
||||||
|
{
|
||||||
|
FAR struct kl_pwmtimer_s *priv = (FAR struct kl_pwmtimer_s *)dev;
|
||||||
|
uint32_t pincfg;
|
||||||
|
|
||||||
|
pwmvdbg("TPM%d pincfg: %08x\n", priv->tpmid, priv->pincfg);
|
||||||
|
|
||||||
|
/* Make sure that the output has been stopped */
|
||||||
|
|
||||||
|
pwm_stop(dev);
|
||||||
|
|
||||||
|
/* Then put the GPIO pin back to the default state */
|
||||||
|
|
||||||
|
pincfg = (priv->pincfg & ~(_PIN_MODE_MASK));
|
||||||
|
pincfg |= GPIO_INPUT;
|
||||||
|
kl_configgpio(pincfg);
|
||||||
|
return OK;
|
||||||
|
}
|
||||||
|
|
||||||
|
/****************************************************************************
|
||||||
|
* Name: pwm_start
|
||||||
|
*
|
||||||
|
* Description:
|
||||||
|
* (Re-)initialize the timer resources and start the pulsed output
|
||||||
|
*
|
||||||
|
* Input parameters:
|
||||||
|
* dev - A reference to the lower half PWM driver state structure
|
||||||
|
* info - A reference to the characteristics of the pulsed output
|
||||||
|
*
|
||||||
|
* Returned Value:
|
||||||
|
* Zero on success; a negated errno value on failure
|
||||||
|
*
|
||||||
|
****************************************************************************/
|
||||||
|
|
||||||
|
static int pwm_start(FAR struct pwm_lowerhalf_s *dev,
|
||||||
|
FAR const struct pwm_info_s *info)
|
||||||
|
{
|
||||||
|
FAR struct kl_pwmtimer_s *priv = (FAR struct kl_pwmtimer_s *)dev;
|
||||||
|
return pwm_timer(priv, info);
|
||||||
|
}
|
||||||
|
|
||||||
|
/****************************************************************************
|
||||||
|
* Name: pwm_stop
|
||||||
|
*
|
||||||
|
* Description:
|
||||||
|
* Stop the pulsed output and reset the timer resources
|
||||||
|
*
|
||||||
|
* Input parameters:
|
||||||
|
* dev - A reference to the lower half PWM driver state structure
|
||||||
|
*
|
||||||
|
* Returned Value:
|
||||||
|
* Zero on success; a negated errno value on failure
|
||||||
|
*
|
||||||
|
* Assumptions:
|
||||||
|
* This function is called to stop the pulsed output at anytime. This
|
||||||
|
* method is also called from the timer interrupt handler when a repetition
|
||||||
|
* count expires... automatically stopping the timer.
|
||||||
|
*
|
||||||
|
****************************************************************************/
|
||||||
|
|
||||||
|
static int pwm_stop(FAR struct pwm_lowerhalf_s *dev)
|
||||||
|
{
|
||||||
|
FAR struct kl_pwmtimer_s *priv = (FAR struct kl_pwmtimer_s *)dev;
|
||||||
|
irqstate_t flags;
|
||||||
|
|
||||||
|
pwmvdbg("TPM%d\n", priv->tpmid);
|
||||||
|
|
||||||
|
/* Disable interrupts momentary to stop any ongoing timer processing and
|
||||||
|
* to prevent any concurrent access to the reset register.
|
||||||
|
*/
|
||||||
|
|
||||||
|
flags = irqsave();
|
||||||
|
|
||||||
|
/* Disable further interrupts and stop the timer */
|
||||||
|
|
||||||
|
pwm_putreg(priv, TPM_SC_OFFSET, TPM_SC_CMOD_DIS);
|
||||||
|
pwm_putreg(priv, TPM_CNT_OFFSET, 0);
|
||||||
|
|
||||||
|
/* Determine which timer channel to clear */
|
||||||
|
|
||||||
|
switch (priv->channel)
|
||||||
|
{
|
||||||
|
case 0:
|
||||||
|
pwm_putreg(priv, TPM_C0V_OFFSET, 0);
|
||||||
|
break;
|
||||||
|
|
||||||
|
case 1:
|
||||||
|
pwm_putreg(priv, TPM_C1V_OFFSET, 0);
|
||||||
|
break;
|
||||||
|
|
||||||
|
case 2:
|
||||||
|
pwm_putreg(priv, TPM_C2V_OFFSET, 0);
|
||||||
|
break;
|
||||||
|
|
||||||
|
case 3:
|
||||||
|
pwm_putreg(priv, TPM_C3V_OFFSET, 0);
|
||||||
|
break;
|
||||||
|
|
||||||
|
case 4:
|
||||||
|
pwm_putreg(priv, TPM_C4V_OFFSET, 0);
|
||||||
|
break;
|
||||||
|
|
||||||
|
case 5:
|
||||||
|
pwm_putreg(priv, TPM_C5V_OFFSET, 0);
|
||||||
|
break;
|
||||||
|
|
||||||
|
default:
|
||||||
|
pwmdbg("No such channel: %d\n", priv->channel);
|
||||||
|
return -EINVAL;
|
||||||
|
}
|
||||||
|
|
||||||
|
irqrestore(flags);
|
||||||
|
|
||||||
|
pwm_dumpregs(priv, "After stop");
|
||||||
|
return OK;
|
||||||
|
}
|
||||||
|
|
||||||
|
/****************************************************************************
|
||||||
|
* Name: pwm_ioctl
|
||||||
|
*
|
||||||
|
* Description:
|
||||||
|
* Lower-half logic may support platform-specific ioctl commands
|
||||||
|
*
|
||||||
|
* Input parameters:
|
||||||
|
* dev - A reference to the lower half PWM driver state structure
|
||||||
|
* cmd - The ioctl command
|
||||||
|
* arg - The argument accompanying the ioctl command
|
||||||
|
*
|
||||||
|
* Returned Value:
|
||||||
|
* Zero on success; a negated errno value on failure
|
||||||
|
*
|
||||||
|
****************************************************************************/
|
||||||
|
|
||||||
|
static int pwm_ioctl(FAR struct pwm_lowerhalf_s *dev, int cmd, unsigned long arg)
|
||||||
|
{
|
||||||
|
#ifdef CONFIG_DEBUG_PWM
|
||||||
|
FAR struct kl_pwmtimer_s *priv = (FAR struct kl_pwmtimer_s *)dev;
|
||||||
|
|
||||||
|
/* There are no platform-specific ioctl commands */
|
||||||
|
|
||||||
|
pwmvdbg("TPM%d\n", priv->tpmid);
|
||||||
|
#endif
|
||||||
|
return -ENOTTY;
|
||||||
|
}
|
||||||
|
|
||||||
|
/****************************************************************************
|
||||||
|
* Public Functions
|
||||||
|
****************************************************************************/
|
||||||
|
|
||||||
|
/****************************************************************************
|
||||||
|
* Name: kl_pwminitialize
|
||||||
|
*
|
||||||
|
* Description:
|
||||||
|
* Initialize one timer for use with the upper_level PWM driver.
|
||||||
|
*
|
||||||
|
* Input Parameters:
|
||||||
|
* timer - A number identifying the timer use. The number of valid timer
|
||||||
|
* IDs varies with the STM32 MCU and MCU family but is somewhere in
|
||||||
|
* the range of {1,..,14}.
|
||||||
|
*
|
||||||
|
* Returned Value:
|
||||||
|
* On success, a pointer to the STM32 lower half PWM driver is returned.
|
||||||
|
* NULL is returned on any failure.
|
||||||
|
*
|
||||||
|
****************************************************************************/
|
||||||
|
|
||||||
|
FAR struct pwm_lowerhalf_s *kl_pwminitialize(int timer)
|
||||||
|
{
|
||||||
|
FAR struct kl_pwmtimer_s *lower;
|
||||||
|
|
||||||
|
pwmvdbg("TPM%d\n", timer);
|
||||||
|
|
||||||
|
switch (timer)
|
||||||
|
{
|
||||||
|
#ifdef CONFIG_KL_TPM0_PWM
|
||||||
|
case 0:
|
||||||
|
lower = &g_pwm0dev;
|
||||||
|
|
||||||
|
break;
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#ifdef CONFIG_KL_TPM1_PWM
|
||||||
|
case 1:
|
||||||
|
lower = &g_pwm1dev;
|
||||||
|
|
||||||
|
break;
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#ifdef CONFIG_KL_TPM2_PWM
|
||||||
|
case 2:
|
||||||
|
lower = &g_pwm2dev;
|
||||||
|
|
||||||
|
break;
|
||||||
|
#endif
|
||||||
|
|
||||||
|
default:
|
||||||
|
pwmdbg("No such timer configured\n");
|
||||||
|
return NULL;
|
||||||
|
}
|
||||||
|
|
||||||
|
return (FAR struct pwm_lowerhalf_s *)lower;
|
||||||
|
}
|
||||||
|
|
||||||
|
#endif /* CONFIG_KL_TPMn_PWM, n = 0,...,2 */
|
||||||
197
arch/arm/src/kl/kl_pwm.h
Normal file
197
arch/arm/src/kl/kl_pwm.h
Normal file
@ -0,0 +1,197 @@
|
|||||||
|
/************************************************************************************
|
||||||
|
* arch/arm/src/kl/kl_pwm.h
|
||||||
|
*
|
||||||
|
* Copyright (C) 2013 Gregory Nutt. All rights reserved.
|
||||||
|
* Author: Gregory Nutt <gnutt@nuttx.org>
|
||||||
|
* Alan Carvalho de Assis <acassis@gmail.com>
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without
|
||||||
|
* modification, are permitted provided that the following conditions
|
||||||
|
* are met:
|
||||||
|
*
|
||||||
|
* 1. Redistributions of source code must retain the above copyright
|
||||||
|
* notice, this list of conditions and the following disclaimer.
|
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright
|
||||||
|
* notice, this list of conditions and the following disclaimer in
|
||||||
|
* the documentation and/or other materials provided with the
|
||||||
|
* distribution.
|
||||||
|
* 3. Neither the name NuttX nor the names of its contributors may be
|
||||||
|
* used to endorse or promote products derived from this software
|
||||||
|
* without specific prior written permission.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||||
|
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||||
|
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||||
|
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||||
|
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||||
|
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||||
|
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||||
|
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||||
|
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||||
|
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||||
|
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
||||||
|
* POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
*
|
||||||
|
************************************************************************************/
|
||||||
|
|
||||||
|
#ifndef __ARCH_ARM_SRC_KL_KINETIS_PWM_H
|
||||||
|
#define __ARCH_ARM_SRC_KL_KINETIS_PWM_H
|
||||||
|
|
||||||
|
/************************************************************************************
|
||||||
|
* Included Files
|
||||||
|
************************************************************************************/
|
||||||
|
|
||||||
|
#include <nuttx/config.h>
|
||||||
|
|
||||||
|
#include "chip.h"
|
||||||
|
|
||||||
|
/************************************************************************************
|
||||||
|
* Pre-processor Definitions
|
||||||
|
************************************************************************************/
|
||||||
|
/* Configuration ********************************************************************/
|
||||||
|
/* Timer devices may be used for different purposes. One special purpose is
|
||||||
|
* to generate modulated outputs for such things as motor control. If CONFIG_KL_TPMn
|
||||||
|
* is defined then the CONFIG_KL_TPMn_PWM must also be defined to indicate that
|
||||||
|
* timer "n" is intended to be used for pulsed output signal generation.
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifndef CONFIG_KL_TPM0
|
||||||
|
# undef CONFIG_KL_TPM0_PWM
|
||||||
|
#endif
|
||||||
|
#ifndef CONFIG_KL_TPM1
|
||||||
|
# undef CONFIG_KL_TPM1_PWM
|
||||||
|
#endif
|
||||||
|
#ifndef CONFIG_KL_TPM2
|
||||||
|
# undef CONFIG_KL_TPM2_PWM
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/* Check if PWM support for any channel is enabled. */
|
||||||
|
|
||||||
|
#if defined(CONFIG_KL_TPM0_PWM) || defined(CONFIG_KL_TPM1_PWM) || \
|
||||||
|
defined(CONFIG_KL_TPM2_PWM)
|
||||||
|
|
||||||
|
#include <arch/board/board.h>
|
||||||
|
#include "chip/kl_pinmux.h"
|
||||||
|
|
||||||
|
/* For each timer that is enabled for PWM usage, we need the following additional
|
||||||
|
* configuration settings:
|
||||||
|
*
|
||||||
|
* CONFIG_KL_TPMx_CHANNEL - Specifies the timer output channel {1,..,4}
|
||||||
|
* PWM_TPMx_CHn - One of the values defined in chip/stm32*_pinmap.h. In the case
|
||||||
|
* where there are multiple pin selections, the correct setting must be provided
|
||||||
|
* in the arch/board/board.h file.
|
||||||
|
*
|
||||||
|
* NOTE: The STM32 timers are each capable of generating different signals on
|
||||||
|
* each of the four channels with different duty cycles. That capability is
|
||||||
|
* not supported by this driver: Only one output channel per timer.
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifdef CONFIG_KL_TPM0_PWM
|
||||||
|
# if !defined(CONFIG_KL_TPM0_CHANNEL)
|
||||||
|
# error "CONFIG_KL_TPM0_CHANNEL must be provided"
|
||||||
|
# elif CONFIG_KL_TPM0_CHANNEL == 0
|
||||||
|
# define PWM_TPM0_PINCFG GPIO_TPM0_CH0OUT
|
||||||
|
# elif CONFIG_KL_TPM0_CHANNEL == 1
|
||||||
|
# define PWM_TPM0_PINCFG GPIO_TPM0_CH1OUT
|
||||||
|
# elif CONFIG_KL_TPM0_CHANNEL == 2
|
||||||
|
# define PWM_TPM0_PINCFG GPIO_TPM1_CH2OUT
|
||||||
|
# elif CONFIG_KL_TPM0_CHANNEL == 3
|
||||||
|
# define PWM_TPM0_PINCFG GPIO_TPM1_CH3OUT
|
||||||
|
# elif CONFIG_KL_TPM0_CHANNEL == 4
|
||||||
|
# define PWM_TPM0_PINCFG GPIO_TPM1_CH4OUT
|
||||||
|
# elif CONFIG_KL_TPM0_CHANNEL == 5
|
||||||
|
# define PWM_TPM0_PINCFG GPIO_TPM1_CH5OUT
|
||||||
|
# else
|
||||||
|
# error "Unsupported value of CONFIG_KL_TPM1_CHANNEL"
|
||||||
|
# endif
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#ifdef CONFIG_KL_TPM1_PWM
|
||||||
|
# if !defined(CONFIG_KL_TPM1_CHANNEL)
|
||||||
|
# error "CONFIG_KL_TPM1_CHANNEL must be provided"
|
||||||
|
# elif CONFIG_KL_TPM1_CHANNEL == 0
|
||||||
|
# define PWM_TPM1_PINCFG GPIO_TPM1_CH0OUT
|
||||||
|
# elif CONFIG_KL_TPM1_CHANNEL == 1
|
||||||
|
# define PWM_TPM1_PINCFG GPIO_TPM1_CH1OUT
|
||||||
|
# elif CONFIG_KL_TPM1_CHANNEL == 2
|
||||||
|
# define PWM_TPM1_PINCFG GPIO_TPM1_CH2OUT
|
||||||
|
# elif CONFIG_KL_TPM1_CHANNEL == 3
|
||||||
|
# define PWM_TPM1_PINCFG GPIO_TPM1_CH3OUT
|
||||||
|
# elif CONFIG_KL_TPM1_CHANNEL == 4
|
||||||
|
# define PWM_TPM1_PINCFG GPIO_TPM1_CH4OUT
|
||||||
|
# elif CONFIG_KL_TPM1_CHANNEL == 5
|
||||||
|
# define PWM_TPM1_PINCFG GPIO_TPM1_CH5OUT
|
||||||
|
# else
|
||||||
|
# error "Unsupported value of CONFIG_KL_TPM2_CHANNEL"
|
||||||
|
# endif
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#ifdef CONFIG_KL_TPM2_PWM
|
||||||
|
# if !defined(CONFIG_KL_TPM2_CHANNEL)
|
||||||
|
# error "CONFIG_KL_TPM2_CHANNEL must be provided"
|
||||||
|
# elif CONFIG_KL_TPM2_CHANNEL == 0
|
||||||
|
# define PWM_TPM2_PINCFG GPIO_TPM2_CH0OUT
|
||||||
|
# elif CONFIG_KL_TPM2_CHANNEL == 1
|
||||||
|
# define PWM_TPM2_PINCFG GPIO_TPM2_CH1OUT
|
||||||
|
# elif CONFIG_KL_TPM2_CHANNEL == 2
|
||||||
|
# define PWM_TPM2_PINCFG GPIO_TPM2_CH2OUT
|
||||||
|
# elif CONFIG_KL_TPM2_CHANNEL == 3
|
||||||
|
# define PWM_TPM2_PINCFG GPIO_TPM2_CH3OUT
|
||||||
|
# elif CONFIG_KL_TPM2_CHANNEL == 4
|
||||||
|
# define PWM_TPM2_PINCFG GPIO_TPM2_CH4OUT
|
||||||
|
# elif CONFIG_KL_TPM2_CHANNEL == 5
|
||||||
|
# define PWM_TPM2_PINCFG GPIO_TPM2_CH5OUT
|
||||||
|
# else
|
||||||
|
# error "Unsupported value of CONFIG_KL_TPM3_CHANNEL"
|
||||||
|
# endif
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/************************************************************************************
|
||||||
|
* Public Types
|
||||||
|
************************************************************************************/
|
||||||
|
|
||||||
|
/************************************************************************************
|
||||||
|
* Public Data
|
||||||
|
************************************************************************************/
|
||||||
|
|
||||||
|
#ifndef __ASSEMBLY__
|
||||||
|
|
||||||
|
#undef EXTERN
|
||||||
|
#if defined(__cplusplus)
|
||||||
|
#define EXTERN extern "C"
|
||||||
|
extern "C" {
|
||||||
|
#else
|
||||||
|
#define EXTERN extern
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/************************************************************************************
|
||||||
|
* Public Functions
|
||||||
|
************************************************************************************/
|
||||||
|
|
||||||
|
/************************************************************************************
|
||||||
|
* Name: kl_pwminitialize
|
||||||
|
*
|
||||||
|
* Description:
|
||||||
|
* Initialize one timer for use with the upper_level PWM driver.
|
||||||
|
*
|
||||||
|
* Input Parameters:
|
||||||
|
* timer - A number identifying the timer use. The number of valid timer
|
||||||
|
* IDs varies with the STM32 MCU and MCU family but is somewhere in
|
||||||
|
* the range of {1,..,14}.
|
||||||
|
*
|
||||||
|
* Returned Value:
|
||||||
|
* On success, a pointer to the STM32 lower half PWM driver is returned.
|
||||||
|
* NULL is returned on any failure.
|
||||||
|
*
|
||||||
|
************************************************************************************/
|
||||||
|
|
||||||
|
FAR struct pwm_lowerhalf_s *kl_pwminitialize(int timer);
|
||||||
|
|
||||||
|
#undef EXTERN
|
||||||
|
#if defined(__cplusplus)
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#endif /* __ASSEMBLY__ */
|
||||||
|
#endif /* CONFIG_KL_TPMx_PWM */
|
||||||
|
#endif /* __ARCH_ARM_SRC_KL_KINETIS_PWM_H */
|
||||||
Loading…
Reference in New Issue
Block a user