Add stm32 header files
git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@2074 42af7a65-404d-4744-a932-0658087f49c3
This commit is contained in:
patacongo
parent
1f1cc72700
commit
8d061681ff
54
arch/arm/src/stm32/Make.defs
Executable file
54
arch/arm/src/stm32/Make.defs
Executable file
@ -0,0 +1,54 @@
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############################################################################
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# arch/arm/src/stm32/Make.defs
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#
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# Copyright (C) 2009 Gregory Nutt. All rights reserved.
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# Author: Gregory Nutt <spudmonkey@racsa.co.cr>
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#
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# Redistribution and use in source and binary forms, with or without
|
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# modification, are permitted provided that the following conditions
|
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# are met:
|
||||
#
|
||||
# 1. Redistributions of source code must retain the above copyright
|
||||
# notice, this list of conditions and the following disclaimer.
|
||||
# 2. Redistributions in binary form must reproduce the above copyright
|
||||
# notice, this list of conditions and the following disclaimer in
|
||||
# the documentation and/or other materials provided with the
|
||||
# distribution.
|
||||
# 3. Neither the name NuttX nor the names of its contributors may be
|
||||
# used to endorse or promote products derived from this software
|
||||
# without specific prior written permission.
|
||||
#
|
||||
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
# FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
# COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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||||
# INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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# BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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# OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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# AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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# ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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# POSSIBILITY OF SUCH DAMAGE.
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#
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############################################################################
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HEAD_ASRC = stm32_vectors.S
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CMN_ASRCS = up_context.S
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CMN_CSRCS = up_allocateheap.c up_assert.c up_blocktask.c up_copystate.c \
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up_createstack.c up_mdelay.c up_udelay.c up_exit.c \
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up_idle.c up_initialize.c up_initialstate.c up_interruptcontext.c \
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up_modifyreg8.c up_modifyreg16.c up_modifyreg32.c \
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up_releasepending.c up_releasestack.c up_reprioritizertr.c \
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up_schedulesigaction.c up_sigdeliver.c up_unblocktask.c \
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up_usestack.c up_doirq.c up_hardfault.c up_svcall.c
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CHIP_ASRCS =
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CHIP_CSRCS = stm32_start.c stm32_syscontrol.c stm32_irq.c \
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stm32_gpio.c stm32_gpioirq.c stm32_timerisr.c stm32_lowputc.c \
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stm32_serial.c stm32_ssi.c stm32_dumpgpio.c
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ifdef CONFIG_NET
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CHIP_CSRCS += stm32_ethernet.c
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endif
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83
arch/arm/src/stm32/chip.h
Executable file
83
arch/arm/src/stm32/chip.h
Executable file
@ -0,0 +1,83 @@
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/************************************************************************************
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* arch/arm/src/stm32/chip.h
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*
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* Copyright (C) 2009 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
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*
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* Redistribution and use in source and binary forms, with or without
|
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* modification, are permitted provided that the following conditions
|
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* are met:
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*
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
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* the documentation and/or other materials provided with the
|
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* distribution.
|
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* 3. Neither the name NuttX nor the names of its contributors may be
|
||||
* used to endorse or promote products derived from this software
|
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
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* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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************************************************************************************/
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#ifndef __ARCH_ARM_SRC_STM32_CHIP_H
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#define __ARCH_ARM_SRC_STM32_CHIP_H
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/************************************************************************************
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* Included Files
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************************************************************************************/
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#include <nuttx/config.h>
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#include <sys/types.h>
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/************************************************************************************
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* Definitions
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************************************************************************************/
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/* Get customizations for each supported chip (only the STM32F103Z right now) */
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#ifdef CONFIG_CHIP_STM32F103Z
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# define STM32_NTIM 4 /* TIM1-TIM4 */
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# define STM32_NSPI 2 /* SPI1-2 */
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# define STM32_NUSART 3 /* USART1-3 */
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# define STM32_NI2C 2 /* I2C1-2 */
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# define STM32_NCAN 1 /* bxCAN1 */
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# define STM32_NGPIO 5 /* GPIOA-E */
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# define STM32_NADC 2 /* ADC 1-2 */
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# define STM32_NDAC 0 /* No DAC */
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# define STM32_NCRC 0 /* No CRC */
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# define STM32_NTHERNET 0 /* No ethernet */
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#else
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# error "Unsupported STM32 chip */
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#endif
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/* Then get all of the register definitions */
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#include "stm32_memorymap.h"
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/************************************************************************************
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* Public Types
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************************************************************************************/
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/************************************************************************************
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* Public Data
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************************************************************************************/
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/************************************************************************************
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* Public Functions
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************************************************************************************/
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#endif /* __ARCH_ARM_SRC_STM32_CHIP_H */
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139
arch/arm/src/stm32/stm32_memorymap.h
Executable file
139
arch/arm/src/stm32/stm32_memorymap.h
Executable file
@ -0,0 +1,139 @@
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/************************************************************************************
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* arch/arm/src/stm32/stm32_memorymap.h
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*
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* Copyright (C) 2009 Gregory Nutt. All rights reserved.
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* Author: Gregory Nutt <spudmonkey@racsa.co.cr>
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*
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* Redistribution and use in source and binary forms, with or without
|
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* modification, are permitted provided that the following conditions
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* are met:
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*
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||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in
|
||||
* the documentation and/or other materials provided with the
|
||||
* distribution.
|
||||
* 3. Neither the name NuttX nor the names of its contributors may be
|
||||
* used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
|
||||
* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
|
||||
* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
|
||||
* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
|
||||
* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
|
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* POSSIBILITY OF SUCH DAMAGE.
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*
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************************************************************************************/
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#ifndef __ARCH_ARM_SRC_STM32_STM32_MEMORYMAP_H
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#define __ARCH_ARM_SRC_STM32_STM32_MEMORYMAP_H
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/************************************************************************************
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* Included Files
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************************************************************************************/
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#include <nuttx/config.h>
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#include <sys/types.h>
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#include "chip.h"
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/************************************************************************************
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* Definitions
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************************************************************************************/
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/* FLASH and SRAM *******************************************************************/
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#define STM32_FLASH_BASE 0x08000000 /* 0x08000000 - Up to 512Kb */
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#define STM32_SRAM_BASE 0x20000000 /* 0x20000000 - 64Kb SRAM */
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/* Register Base Address ************************************************************/
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/* APB1 bus */
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#define STM32_TIM2_BASE 0x40000000 /* 0x40000000 - 0x400003ff: TIM2 timer */
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#define STM32_TIM3_BASE 0x40000400 /* 0x40000400 - 0x400007ff: TIM3 timer */
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#define STM32_TIM4_BASE 0x40000800 /* 0x40000800 - 0x40000bff: TIM4 timer */
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#define STM32_TIM5_BASE 0x40000c00 /* 0x40000c00 - 0x40000fff: TIM5 timer */
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#define STM32_TIM6_BASE 0x40001000 /* 0x40001000 - 0x400013ff: TIM6 timer */
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#define STM32_TIM7_BASE 0x40001400 /* 0x40001400 - 0x400007ff: TIM7 timer */
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/* 0x40001800 - 0x40000fff: Reserved */
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#define STM32_RTC_BASE 0x40002800 /* 0x40002800 - 0x40002bff: RTC */
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#define STM32_WWDG_BASE 0x40002C00 /* 0x40002C00 - 0x40002fff: Window watchdog (WWDG) */
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#define STM32_IWDG_BASE 0x40003000 /* 0x40003000 - 0x400033ff: Independent watchdog (IWDG) */
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/* 0x40003400 - 0x400037ff: Reserved */
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#define STM32_SPI1_BASE 0x40003800 /* 0x40003800 - 0x40003bff: SPI1/I21 */
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#define STM32_I2S1_BASE 0x40003800
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#define STM32_SPI2_BASE 0x40003c00 /* 0x40003c00 - 0x40003fff: SPI2/I2S */
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#define STM32_I2S2_BASE 0x40003c00
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/* 0x40004000 - 0x400043ff: Reserved */
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#define STM32_USART2_BASE 0x40004400 /* 0x40004400 - 0x400047ff: USART2 */
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#define STM32_USART3_BASE 0x40004800 /* 0x40004800 - 0x40004bff: USART3 */
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#define STM32_UART4_BASE 0x40004c00 /* 0x40004c00 - 0x40004fff: UART4 */
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#define STM32_UART5_BASE 0x40005000 /* 0x40005000 - 0x400053ff: UART5 */
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#define STM32_I2C1_BASE 0x40005400 /* 0x40005400 - 0x400057ff: I2C1 */
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#define STM32_I2C2_BASE 0x40005800 /* 0x40005800 - 0x40005Bff: I2C2 */
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#define STM32_USB_BASE 0x40005c00 /* 0x40005c00 - 0x40005fff: USB device FS registers */
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#define STM32_USBCANRAM_BASE 0x40006000 /* 0x40006000 - 0x400063ff: Shared USB/CAN SRAM 512 bytes */
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#define STM32_bxCAN1_BASE 0x40006400 /* 0x40006400 - 0x400067ff: bxCAN1 */
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#define STM32_bxCAN2_BASE 0x40006800 /* 0x40006800 - 0x40006bff: bxCAN2 */
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#define STM32_BKP_BASE 0x40006c00 /* 0x40006c00 - 0x40006fff: Backup registers (BKP) */
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#define STM32_PWR_BASE 0x40007000 /* 0x40007000 - 0x400073ff: Power control PWR */
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#define STM32_DAC_BASE 0x40007400 /* 0x40007400 - 0x400077ff: DAC */
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/* 0x40007800 - 0x4000ffff: Reserved */
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/* APB2 bus */
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#define STM32_AFIO_BASE 0x40010000 /* 0x40010000 - 0x400103ff: AFIO */
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#define STM32_EXTI_BASE 0x40010400 /* 0x40010400 - 0x400107ff: EXTI */
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#define STM32_GPIOA_BASE 0x40010800 /* 0x40010800 - 0x40010bff: GPIO Port A */
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#define STM32_GPIOB_BASE 0X40010c00 /* 0X40010c00 - 0x40010fff: GPIO Port B */
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#define STM32_GPIOC_BASE 0x40011000 /* 0x40011000 - 0x400113ff: GPIO Port C */
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#define STM32_GPIOD_BASE 0x40011400 /* 0x40011400 - 0x400117ff: GPIO Port D */
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#define STM32_GPIOE_BASE 0x40011800 /* 0x40011800 - 0x40011bff: GPIO Port E */
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#define STM32_GPIOF_BASE 0x4001c000 /* 0x4001c000 - 0x400111ff: GPIO Port F */
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#define STM32_GPIOG_BASE 0x40012000 /* 0x40012000 - 0x400123ff: GPIO Port G */
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#define STM32_ADC1_BASE 0x40012400 /* 0x40012400 - 0x400127ff: ADC1 */
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#define STM32_ADC2_BASE 0x40012800 /* 0x40012800 - 0x40012bff: ADC2 */
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#define STM32_TIM1_BASE 0x40012c00 /* 0x40012c00 - 0x40012fff: TIM1 timer */
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#define STM32_SPI1_BASE 0x40013000 /* 0x40013000 - 0x400133ff: SPI1 */
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#define STM32_TIM8_BASE 0x40012c00 /* 0x40013400 - 0x400137ff: TIM8 timer */
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#define STM32_USART1_BASE 0x40013800 /* 0x40013800 - 0x40013bff: USART1 */
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#define STM32_ADC3_BASE 0x40012800 /* 0x40012800 - 0x40013fff: ADC3 */
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/* 0x40014000 - 0x40017fff: Reserved */
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/* AHB bus */
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#define STM32_SDIO_BASE 0x40020000 /* 0x40018000 - 0x400183ff: SDIO */
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/* 0x40018400 - 0x40017fff: Reserved */
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#define STM32_DMA1_BASE 0x40020000 /* 0x40020000 - 0x400203ff: DMA1 */
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#define STM32_DMA2_BASE 0x40020400 /* 0x40020000 - 0x400207ff: DMA2 */
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/* 0x40020800 - 0x40020fff: Reserved */
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#define STM32_RCC_BASE 0x40021000 /* 0x40021000 - 0x400213ff: Reset and Clock control RCC */
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/* 0x40021400 - 0x40021fff: Reserved */
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#define STM32_OTGFS_BASE 0x50000000 /* 0x50000000 - 0x500003ff: USB OTG FS */
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#define STM32_FLASH_BASE 0x40022000 /* 0x40022000 - 0x400223ff: Flash memory interface */
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#define STM32_CRC_BASE 0x40028000 /* 0x40023000 - 0x400233ff: RC */
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/* 0x40023400 - 0x40027fff: Reserved */
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#define STM32_ETHERNET_BASE 0x40028000 /* 0x40028000 - 0x40029fff: Ethernet */
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/* 0x40030000 - 0x4fffffff: Reserved */
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/************************************************************************************
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* Public Types
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************************************************************************************/
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/************************************************************************************
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* Public Data
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************************************************************************************/
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/************************************************************************************
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* Public Functions
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************************************************************************************/
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#endif /* __ARCH_ARM_SRC_STM32_STM32_MEMORYMAP_H */
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@ -35,6 +35,9 @@ GNU Toolchain Options
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CONFIG_STM32_RAISONANCE=y
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CONFIG_STM32_BUILDROOT=y (default)
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If you are not using CONFIG_STM32_BUILDROOT, then you may also have to modify
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the PATH in the setenv.h file if your make cannot find the tools.
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NOTE: the CodeSourcery, devkitARM, and Raisonance toolchains are Windows native
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toolchains. The NuttX buildroot toolchain is a Cygwin or Linux native toolchain.
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There are several limitations to using a Windows based toolchain in a Cygwin
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@ -35,13 +35,36 @@
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include ${TOPDIR}/.config
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# The default value for CROSSDEV can be overridden from the make command line:
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# make -- Will build for the devkitARM toolchain
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# make CROSSDEV=arm-eabi- -- Will build for the devkitARM toolchain
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# make CROSSDEV=arm-none-eabi- -- Will build for the CodeSourcery toolchain
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# make CROSSDEV=arm-elf- -- Will build for the NuttX buildroot toolchain
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# Setup for the selected toolchain
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ifneq ($(CONFIG_STM32_BUILDROOT),y)
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# Windows-native toolchains
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ifeq ($(CONFIG_STM32_DEVKITARM),y)
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CROSSDEV = arm-eabi-
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else
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CROSSDEV = arm-none-eabi-
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endif
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WINTOOL = y
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DIRLINK = $(TOPDIR)/tools/winlink.sh
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DIRUNLINK = $(TOPDIR)/tools/unlink.sh
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MKDEP = $(TOPDIR)/tools/mknulldeps.sh
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ARCHCPUFLAGS = -mcpu=cortex-m3 -mthumb -mfloat-abi=soft
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ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}"
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ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}"
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ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/ostest/ld.script}"
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MAXOPTIMIZATION = -O2
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# The NuttX buildroot toolchain
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else
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# Linux/Cygwin-native toolchain (assumed from the NuttX buildroot)
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CROSSDEV = arm-elf-
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MKDEP = $(TOPDIR)/tools/mkdeps.sh
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ARCHCPUFLAGS = -mtune=cortex-m3 -march=armv7-m -mfloat-abi=soft
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ARCHINCLUDES = -I. -isystem $(TOPDIR)/include
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ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx
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ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/ostest/ld.script
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MAXOPTIMIZATION = -Os
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endif
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CROSSDEV = arm-eabi-
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CC = $(CROSSDEV)gcc
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CXX = $(CROSSDEV)g++
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CPP = $(CROSSDEV)gcc -E
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@ -54,25 +77,6 @@ OBJDUMP = $(CROSSDEV)objdump
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ARCHCCVERSION = ${shell $(CC) -v 2>&1 | sed -n '/^gcc version/p' | sed -e 's/^gcc version \([0-9\.]\)/\1/g' -e 's/[-\ ].*//g' -e '1q'}
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ARCHCCMAJOR = ${shell echo $(ARCHCCVERSION) | cut -d'.' -f1}
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ifeq ($(CROSSDEV),arm-elf-)
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MKDEP = $(TOPDIR)/tools/mkdeps.sh
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ARCHCPUFLAGS = -mtune=cortex-m3 -march=armv7-m -mfloat-abi=soft
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ARCHINCLUDES = -I. -isystem $(TOPDIR)/include
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ARCHXXINCLUDES = -I. -isystem $(TOPDIR)/include -isystem $(TOPDIR)/include/cxx
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ARCHSCRIPT = -T$(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/ostest/ld.script
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MAXOPTIMIZATION = -Os
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else
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WINTOOL = y
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DIRLINK = $(TOPDIR)/tools/winlink.sh
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DIRUNLINK = $(TOPDIR)/tools/unlink.sh
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MKDEP = $(TOPDIR)/tools/mknulldeps.sh
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ARCHCPUFLAGS = -mcpu=cortex-m3 -mthumb -mfloat-abi=soft
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ARCHINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}"
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ARCHXXINCLUDES = -I. -isystem "${shell cygpath -w $(TOPDIR)/include}" -isystem "${shell cygpath -w $(TOPDIR)/include/cxx}"
|
||||
ARCHSCRIPT = -T "${shell cygpath -w $(TOPDIR)/configs/$(CONFIG_ARCH_BOARD)/ostest/ld.script}"
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MAXOPTIMIZATION = -O2
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endif
|
||||
|
||||
ifeq ("${CONFIG_DEBUG_SYMBOLS}","y")
|
||||
ARCHOPTIMIZATION = -g
|
||||
else
|
||||
|
||||
Loading…
Reference in New Issue
Block a user