diff --git a/configs/mx1ads/include/board.h b/configs/mx1ads/include/board.h index 4379121d73..978017b157 100644 --- a/configs/mx1ads/include/board.h +++ b/configs/mx1ads/include/board.h @@ -49,24 +49,92 @@ * Definitions ************************************************************************************/ -/* Clock settings */ +/* Clock settings -- All clock values are precalculated */ -#define IMX_SYS_CLK_FREQ 16780000 -#define IMX_SYSPLL_CLK_FREQ 16000000 -#define IMX_PERCLK1_FREQ 96000000 +#define IMX_SYS_CLK_FREQ 16780000 /* Crystal frequency */ -/* MPCTL */ +/* MPCTL0 -- Controls the MCU clock: + * + * MFI + MFN / (MFD+1) + * IMX_MCUPLL_CLK_FREQ = 2 * IMX_SYS_CLK_FREQ * -------------------- + * PD + 1 + */ -#define IMX_MPCTL0_VALUE 0x04632410 /* For 150MHz MCU PLL clock */ -#define IMX_MPCTL0_VALUE 0x03AA11B9 /* For 150 MHz ARM clock with 32.768 KHz crystal */ +#if 0 /* 150 MHz */ +# define IMX_MPCTL0_MFN 16 +# define IMX_MPCTL0_MFI 9 +# define IMX_MPCTL0_MFD 99 +# define IMX_MPCTL0_PD 1 +#else /* 180 MHz */ +# define IMX_MPCTL0_MFN 441 +# define IMX_MPCTL0_MFI 4 +# define IMX_MPCTL0_MFD 938 +# define IMX_MPCTL0_PD 0 +#endif -/* SPCTL */ +#define IMX_MPCTL0_VALUE \ + ((IMX_MPCTL0_MFN << PLL_MPCTL0_MFN_SHIFT) |\ + (IMX_MPCTL0_MFI << PLL_MPCTL0_MFI_SHIFT) |\ + (IMX_MPCTL0_MFD << PLL_MPCTL0_MFD_SHIFT) |\ + (IMX_MPCTL0_PD << PLL_MPCTL0_PD_SHIFT)) -#define IMX_SPCTL0_VALUE 0x07AA16A6; /* For 96MHz peripheral clock with 32.768 KHz crystal */ +/* This yields: */ -/* PDCR */ +#if 0 /* 150 MHz */ +# define IMX_MCUPLL_CLK_FREQ 153704800 +#else /* 180 MHz */ +# define IMX_MCUPLL_CLK_FREQ 183561405 +#endif -#define IMX_PCDR_VALUE 0x00000055 +/* SPCTL0 -- Controls the system PLL: + * + * MFI + MFN / (MFD+1) + * IMX_SYSPLL_CLK_FREQ = 2 * IMX_SYS_CLK_FREQ * -------------------- + * PD + 1 + */ + +#define IMX_SPCTL0_MFN 678 +#define IMX_SPCTL0_MFI 5 +#define IMX_SPCTL0_MFD 938 +#define IMX_SPCTL0_PD 1 + +#define IMX_SPCTL0_VALUE \ + ((IMX_SPCTL0_MFN << PLL_SPCTL0_MFN_SHIFT) |\ + (IMX_SPCTL0_MFI << PLL_SPCTL0_MFI_SHIFT) |\ + (IMX_SPCTL0_MFD << PLL_SPCTL0_MFD_SHIFT) |\ + (IMX_SPCTL0_PD << PLL_SPCTL0_PD_SHIFT)) + +/* This yields: */ + +#define IMX_SYSPLL_CLK_FREQ 96015910 + +/* PDCR -- Controls peripheral clocks */ + +#define IMX_PCLKDIV1 5 +#define IMX_PCLKDIV2 5 +#define IMX_PCLKDIV3 0 + +#define IMX_PCDR_VALUE \ + ((IMX_PCLKDIV1 << PLL_PCDR_PCLKDIV1_SHIFT) |\ + (IMX_PCLKDIV2 << PLL_PCDR_PCLKDIV2_SHIFT) |\ + (IMX_PCLKDIV3 << PLL_PCDR_PCLKDIV3_SHIFT)) + +/* IMX_PERCLK1_FREQ = IMX_SYSPLL_CLK_FREQ / IMX_PCLKDIV1 + 1 */ + +#define IMX_PERCLK1_FREQ 16002651 + +/* IMX_PERCLK2_FREQ = IMX_SYSPLL_CLK_FREQ / IMX_PCLKDIV2 + 1 */ + +#define IMX_PERCLK2_FREQ 16002651 + +/* IMX_PERCLK2_FREQ = IMX_SYSPLL_CLK_FREQ / IMX_PCLKDIV4 + 1 */ + +#define IMX_PERCLK2_FREQ 96015910 + +/* CSCR settings -- Controls HCLK and BCLK and USB clock */ + +#define IMX_CSCR_BCLKDIV 1 +#define IMX_CSCR_USBDIV 6 /* LED definitions ******************************************************************/ @@ -88,6 +156,13 @@ #ifndef __ASSEMBLY__ +/* All i.MX architectures must provide the following entry point. This entry point + * is called early in the intitialization -- after all memory has been configured + * and mapped but before any devices have been initialized. + */ + +extern void imx_boardinitialize(void); + #endif #endif /* __ARCH_BOARD_BOARD_H */ diff --git a/configs/mx1ads/src/Makefile b/configs/mx1ads/src/Makefile index eba605d8ca..9078d58322 100644 --- a/configs/mx1ads/src/Makefile +++ b/configs/mx1ads/src/Makefile @@ -39,7 +39,7 @@ CFLAGS += -I$(TOPDIR)/sched ASRCS = AOBJS = $(ASRCS:.S=$(OBJEXT)) -CSRCS = up_leds.c up_network.c +CSRCS = up_boot.c up_leds.c up_network.c COBJS = $(CSRCS:.c=$(OBJEXT)) SRCS = $(ASRCS) $(CSRCS) diff --git a/configs/mx1ads/src/up_boot.c b/configs/mx1ads/src/up_boot.c new file mode 100755 index 0000000000..237f6aa9bc --- /dev/null +++ b/configs/mx1ads/src/up_boot.c @@ -0,0 +1,105 @@ +/************************************************************************************ + * configs/mx1ads/src/up_boot.c + * arch/arm/src/board/up_boot.c + * + * Copyright (C) 2009 Gregory Nutt. All rights reserved. + * Author: Gregory Nutt + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in + * the documentation and/or other materials provided with the + * distribution. + * 3. Neither the name NuttX nor the names of its contributors may be + * used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE + * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS + * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN + * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE + * POSSIBILITY OF SUCH DAMAGE. + * + ************************************************************************************/ + +/************************************************************************************ + * Included Files + ************************************************************************************/ + +#include +#include + +#include + +#include "up_arch.h" +#include "imx_gpio.h" + +/************************************************************************************ + * Definitions + ************************************************************************************/ + +/************************************************************************************ + * Private Functions + ************************************************************************************/ + +/************************************************************************************ + * Public Functions + ************************************************************************************/ + +/************************************************************************************ + * Name: imx_boardinitialize + * + * Description: + * All i.MX architectures must provide the following entry point. This entry point + * is called early in the intitialization -- after all memory has been configured + * and mapped but before any devices have been initialized. + ************************************************************************************/ + +void imx_boardinitialize(void) +{ + uint32 regval; + + putreg32(0x000003ab, IMX_SC_GPCR); /* I/O pad driving strength */ + putreg32(IMX_MPCTL0_VALUE, IMX_PLL_MPCTL0); + putreg32(IMX_SPCTL0_VALUE, IMX_PLL_SPCTL0); + + regval = (CSCR_CLKOSEL_FCLK | /* Output FCLK on CLK0 */ + (IMX_CSCR_USBDIV << PLL_CSCR_USBDIV_SHIFT) | /* USB divider */ + CSCR_SDCNT_4thEDGE | /* Shutdown on 4th edge */ + (IMX_CSCR_BCLKDIV << PLL_CSCR_BCLKDIV_SHIFT) | /* Bclock divider */ + PLL_CSCR_SPEN | PLL_CSCR_MPEN); /* Enable MUC and System PLL */ + putreg32(regval, IMX_PLL_CSCR); + + /* Use these new frequencies now */ + + putreg32(IMX_PLL_CSCR, regval | (PLL_CSCR_MPLLRESTART|PLL_CSCR_SPLLRESTART)); + + /* Setup peripheral clocking */ + + putreg32(IMX_PCDR_VALUE, IMX_PLL_PCDR); + + /* Configure CS4 for cs8900 Ethernet */ + +#ifdef CONFIG_NET + putreg32(0x00000f00, IMX_EIM_CS4H); + putreg32(0x00001501, IMX_EIM_CS4L); + + imxgpio_configprimary(GPIOA, 21); + imxgpio_configprimary(GPIOA, 22); + + regval = getreg32(IMX_CS4_VSECTION + 0x0c); + regval = getreg32(IMX_CS4_VSECTION + 0x0c); +#endif +}