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Fix for UART7 and UART8 on STM32 clock enable from Aton

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This commit is contained in:
Gregory Nutt 2014-09-11 10:27:40 -06:00
parent 5620909005
commit 8d9df11ca2
2 changed files with 6 additions and 4 deletions
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4
arch/arm/src/stm32/chip/stm32f20xxx_rcc.h
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@ -1,7 +1,7 @@
/****************************************************************************************************
* arch/arm/src/stm32/chip/stm32f20xxx_rcc.h
*
* Copyright (C) 2012 Gregory Nutt. All rights reserved.
* Copyright (C) 2012, 2014 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
@ -357,6 +357,8 @@
#define RCC_APB1ENR_CAN2EN (1 << 26) /* Bit 26: CAN 2 clock enable */
#define RCC_APB1ENR_PWREN (1 << 28) /* Bit 28: Power interface clock enable */
#define RCC_APB1ENR_DACEN (1 << 29) /* Bit 29: DAC interface clock enable */
#define RCC_APB1ENR_UART7EN (1 << 30) /* Bit 30: UART7 clock enable */
#define RCC_APB1ENR_UART8EN (1 << 31) /* Bit 31: UART8 clock enable */
/* APB2 Peripheral Clock enable register */

6
arch/arm/src/stm32/stm32_serial.c
View File

@ -1,7 +1,7 @@
/****************************************************************************
* arch/arm/src/stm32/stm32_serial.c
*
* Copyright (C) 2009-2013 Gregory Nutt. All rights reserved.
* Copyright (C) 2009-2014 Gregory Nutt. All rights reserved.
* Author: Gregory Nutt <gnutt@nuttx.org>
*
* Redistribution and use in source and binary forms, with or without
@ -1375,13 +1375,13 @@ static void up_set_apb_clock(struct uart_dev_s *dev, bool on)
#endif
#ifdef CONFIG_STM32_UART7
case STM32_UART7_BASE:
rcc_en = RCC_APB1ENR_USART5EN;
rcc_en = RCC_APB1ENR_UART7EN;
regaddr = STM32_RCC_APB1ENR;
break;
#endif
#ifdef CONFIG_STM32_UART8
case STM32_UART8_BASE:
rcc_en = RCC_APB1ENR_USART5EN;
rcc_en = RCC_APB1ENR_UART8EN;
regaddr = STM32_RCC_APB1ENR;
break;
#endif