diff --git a/arch/arm/src/lpc17xx/lpc17_clockconfig.c b/arch/arm/src/lpc17xx/lpc17_clockconfig.c
index ad542534a1..27c1d42584 100755
--- a/arch/arm/src/lpc17xx/lpc17_clockconfig.c
+++ b/arch/arm/src/lpc17xx/lpc17_clockconfig.c
@@ -135,7 +135,8 @@ void lpc17_clockconfig(void)
 
   /* Wait for PLL to report that it is connected and enabled */
 
-  while ((getreg32(LPC17_SYSCON_PLL0STAT) & (SYSCON_PLL0STAT_PLLE|SYSCON_PLL0STAT_PLLC)) == 0);
+  while ((getreg32(LPC17_SYSCON_PLL0STAT) & (SYSCON_PLL0STAT_PLLE|SYSCON_PLL0STAT_PLLC))
+          != (SYSCON_PLL0STAT_PLLE|SYSCON_PLL0STAT_PLLC));
 #endif
 
   /* PLL1 receives its clock input from the main oscillator only and can be used to
@@ -173,7 +174,8 @@ void lpc17_clockconfig(void)
 
   /* Wait for PLL to report that it is connected and enabled */
 
-  while ((getreg32(LPC17_SYSCON_PLL1STAT) & (SYSCON_PLL1STAT_PLLE|SYSCON_PLL1STAT_PLLC)) == 0);
+  while ((getreg32(LPC17_SYSCON_PLL1STAT) & (SYSCON_PLL1STAT_PLLE|SYSCON_PLL1STAT_PLLC))
+         != (SYSCON_PLL1STAT_PLLE|SYSCON_PLL1STAT_PLLC));
 #else
   /* Otherwise, setup up the USB clock divider to generate the USB clock from PLL0 */
 
diff --git a/arch/arm/src/lpc17xx/lpc17_lowputc.c b/arch/arm/src/lpc17xx/lpc17_lowputc.c
index c2dd3916f4..83dbd709c1 100755
--- a/arch/arm/src/lpc17xx/lpc17_lowputc.c
+++ b/arch/arm/src/lpc17xx/lpc17_lowputc.c
@@ -158,7 +158,7 @@
  *   BAUD <= CCLK / 16 / MinDL
  */
 
-#if CONSOLE_BAUD < (LPC17_CCLK / 16 / UART_MINDL )
+#if CONSOLE_BAUD < (LPC17_CCLK / 16 / UART_MINDL)
 #  define CONSOLE_CCLKDIV  SYSCON_PCLKSEL_CCLK
 #  define CONSOLE_NUMERATOR (LPC17_CCLK)
 
@@ -173,7 +173,7 @@
  *   BAUD <= CCLK / 8 / MinDL
  */
 
-#elif CONSOLE_BAUD < (LPC17_CCLK / 8 / UART_MINDL )
+#elif CONSOLE_BAUD < (LPC17_CCLK / 8 / UART_MINDL)
 #  define CONSOLE_CCLKDIV SYSCON_PCLKSEL_CCLK2
 #  define CONSOLE_NUMERATOR (LPC17_CCLK / 2)
 
@@ -188,7 +188,7 @@
  *   BAUD <= CCLK / 4 / MinDL 
  */
 
-#elif CONSOLE_BAUD < (LPC17_CCLK / 4 / UART_MINDL )
+#elif CONSOLE_BAUD < (LPC17_CCLK / 4 / UART_MINDL)
 #  define CONSOLE_CCLKDIV SYSCON_PCLKSEL_CCLK4
 #  define CONSOLE_NUMERATOR (LPC17_CCLK / 4)
 
@@ -203,7 +203,7 @@
  *   BAUD <= CCLK / 2 / MinDL 
  */
 
-#else /* if CONSOLE_BAUD < (LPC17_CCLK / 2 / UART_MINDL ) */
+#else /* if CONSOLE_BAUD < (LPC17_CCLK / 2 / UART_MINDL) */
 #  define CONSOLE_CCLKDIV   SYSCON_PCLKSEL_CCLK8
 #  define CONSOLE_NUMERATOR (LPC17_CCLK /  8)
 #endif