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Xtensa ESP32: Using wrong register to disable interrupts.

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This commit is contained in:
Gregory Nutt 2016-12-17 09:07:24 -06:00
parent b506bd6ee6
commit 8de1127899
3 changed files with 18 additions and 11 deletions
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1
arch/Kconfig
View File

@ -77,6 +77,7 @@ config ARCH_X86
config ARCH_XTENSA
bool "Xtensa"
select ARCH_HAVE_CUSTOMOPT
---help---
Cadence® Tensilica® Xtensa® actictures.

8
arch/xtensa/src/common/xtensa_vectors.S
View File

@ -203,7 +203,7 @@ _xtensa_nmi_vector:
s32i a0, sp, (4 * REG_A0)
s32i a2, sp, (4 * REG_A2)
movi a2, XTENSA_NMI_EXCEPTION /* Address of state save on stack */
movi a2, XTENSA_NMI_EXCEPTION /* Argument 1: Error code */
call0 _xtensa_panic /* Does not return */
#else
@ -245,7 +245,7 @@ _debug_exception_vector:
s32i a0, sp, (4 * REG_A0)
s32i a2, sp, (4 * REG_A2)
movi a2, XTENSA_DEBUG_EXCEPTION /* Address of state save on stack */
movi a2, XTENSA_DEBUG_EXCEPTION /* Argument 1: Error code */
call0 _xtensa_panic /* Does not return */
.end literal_prefix
@ -284,7 +284,7 @@ _double_exception_vector:
s32i a0, sp, (4 * REG_A0)
s32i a2, sp, (4 * REG_A2)
movi a2, XTENSA_DOUBLE_EXCEPTION /* Address of state save on stack */
movi a2, XTENSA_DOUBLE_EXCEPTION /* Argument 1: Error code */
call0 _xtensa_panic /* Does not return */
.end literal_prefix
@ -321,7 +321,7 @@ _kernel_exception_vector:
s32i a0, sp, (4 * REG_A0)
s32i a2, sp, (4 * REG_A2)
movi a2, XTENSA_KERNEL_EXCEPTION /* Address of state save on stack */
movi a2, XTENSA_KERNEL_EXCEPTION /* Argument 1: Error code */
call0 _xtensa_panic /* Does not return */
.end literal_prefix

20
arch/xtensa/src/esp32/esp32_serial.c
View File

@ -1047,8 +1047,11 @@ static int esp32_receive(struct uart_dev_s *dev, unsigned int *status)
static void esp32_rxint(struct uart_dev_s *dev, bool enable)
{
struct esp32_dev_s *priv = (struct esp32_dev_s *)dev->priv;
irqstate_t flags;
int regval;
flags = enter_critical_section();
if (enable)
{
/* Receive an interrupt when their is anything in the Rx data register (or an Rx
@ -1066,10 +1069,13 @@ static void esp32_rxint(struct uart_dev_s *dev, bool enable)
{
/* Disable the RX interrupts */
esp32_serialout(priv, UART_INT_CLR_OFFSET,
(UART_RXFIFO_FULL_INT_CLR_S | UART_FRM_ERR_INT_CLR_S |
UART_RXFIFO_TOUT_INT_CLR_S));
regval = esp32_serialin(priv, UART_INT_ENA_OFFSET);
regval &= ~(UART_RXFIFO_FULL_INT_CLR_S | UART_FRM_ERR_INT_CLR_S |
UART_RXFIFO_TOUT_INT_CLR_S);
esp32_serialout(priv, UART_INT_ENA_OFFSET, regval);
}
leave_critical_section(flags);
}
/****************************************************************************
@ -1114,13 +1120,12 @@ static void esp32_txint(struct uart_dev_s *dev, bool enable)
{
struct esp32_dev_s *priv = (struct esp32_dev_s *)dev->priv;
irqstate_t flags;
int regval;
flags = enter_critical_section();
if (enable)
{
uint32_t regval;
/* Set to receive an interrupt when the TX holding register register
* is empty
*/
@ -1141,8 +1146,9 @@ static void esp32_txint(struct uart_dev_s *dev, bool enable)
{
/* Disable the TX interrupt */
esp32_serialout(priv, UART_INT_CLR_OFFSET,
(UART_TX_DONE_INT_CLR_S | UART_TXFIFO_EMPTY_INT_CLR_S));
regval = esp32_serialin(priv, UART_INT_ENA_OFFSET);
regval &= ~(UART_TX_DONE_INT_ENA_S | UART_TXFIFO_EMPTY_INT_ENA_S);
esp32_serialout(priv, UART_INT_ENA_OFFSET, regval);
}
leave_critical_section(flags);