diff --git a/arch/arm/src/armv7-m/exc_return.h b/arch/arm/src/armv7-m/exc_return.h index 5f46dd071f..9490a3c8a3 100644 --- a/arch/arm/src/armv7-m/exc_return.h +++ b/arch/arm/src/armv7-m/exc_return.h @@ -94,10 +94,10 @@ */ #if defined(CONFIG_ARMV7M_CMNVECTOR) && defined(CONFIG_ARCH_FPU) -# define EXC_RETURN_PRIVTHR (EXC_RETURN_BASE | EXC_RETURN_THREAD_MODE) +# define EXC_RETURN_PRIVTHR (EXC_RETURN_BASE | EXC_RETURN_THREAD_MODE) #else -# define EXC_RETURN_PRIVTHR (EXC_RETURN_BASE | EXC_RETURN_STD_CONTEXT | \ - EXC_RETURN_THREAD_MODE) +# define EXC_RETURN_PRIVTHR (EXC_RETURN_BASE | EXC_RETURN_STD_CONTEXT | \ + EXC_RETURN_THREAD_MODE) #endif /* EXC_RETURN_UNPRIVTHR: Return to unprivileged thread mode. Exception return gets @@ -105,19 +105,11 @@ */ #if defined(CONFIG_ARMV7M_CMNVECTOR) && defined(CONFIG_ARCH_FPU) -# define EXC_RETURN_UNPRIVTHR (EXC_RETURN_BASE | EXC_RETURN_THREAD_MODE | \ - EXC_RETURN_PROCESS_STACK) +# define EXC_RETURN_UNPRIVTHR (EXC_RETURN_BASE | EXC_RETURN_THREAD_MODE | \ + EXC_RETURN_PROCESS_STACK) #else -# define EXC_RETURN_UNPRIVTHR (EXC_RETURN_BASE | EXC_RETURN_STD_CONTEXT | \ - EXC_RETURN_THREAD_MODE | EXC_RETURN_PROCESS_STACK) -#endif - -/* In the kernel build is not selected, then all threads run in privileged thread - * mode. - */ - -#ifdef CONFIG_NUTTX_KERNEL -# define EXC_RETURN 0xfffffff9 +# define EXC_RETURN_UNPRIVTHR (EXC_RETURN_BASE | EXC_RETURN_STD_CONTEXT | \ + EXC_RETURN_THREAD_MODE | EXC_RETURN_PROCESS_STACK) #endif /************************Th************************************************************ diff --git a/arch/arm/src/kinetis/kinetis_vectors.S b/arch/arm/src/kinetis/kinetis_vectors.S index 11ac46221b..055841d5a8 100644 --- a/arch/arm/src/kinetis/kinetis_vectors.S +++ b/arch/arm/src/kinetis/kinetis_vectors.S @@ -41,6 +41,8 @@ #include #include +#include "exc_return.h" + /************************************************************************************************ * Preprocessor Definitions ************************************************************************************************/ @@ -59,13 +61,6 @@ #define IDLE_STACK (_ebss+CONFIG_IDLETHREAD_STACKSIZE) #define HEAP_BASE (_ebss+CONFIG_IDLETHREAD_STACKSIZE) -/* The Cortex-M4 return from interrupt is unusual. We provide the following special - * address to the BX instruction. The particular value also forces a return to - * thread mode and covers state from the main stack point, the MSP (vs. the MSP). - */ - -#define EXC_RETURN 0xfffffff9 - /************************************************************************************************ * Global Symbols ************************************************************************************************/ @@ -690,7 +685,7 @@ kinetis_common: * actually occurs with interrupts still disabled). */ - ldr r14, =EXC_RETURN /* Load the special value */ + ldr r14, =EXC_RETURN_PRIVTHR /* Load the special value */ #endif /* Restore the interrupt state */ diff --git a/arch/arm/src/lm/lm_vectors.S b/arch/arm/src/lm/lm_vectors.S index 0f4300065c..4459d49a7a 100644 --- a/arch/arm/src/lm/lm_vectors.S +++ b/arch/arm/src/lm/lm_vectors.S @@ -60,13 +60,6 @@ #define IDLE_STACK (_ebss+CONFIG_IDLETHREAD_STACKSIZE-4) #define HEAP_BASE (_ebss+CONFIG_IDLETHREAD_STACKSIZE-4) -/* The Cortex-M3 return from interrupt is unusual. We provide the following special - * address to the BX instruction. The particular value also forces a return to - * thread mode and covers state from the main stack point, the MSP (vs. the MSP). - */ - -#define EXC_RETURN 0xfffffff9 - /************************************************************************************ * Global Symbols ************************************************************************************/ @@ -288,7 +281,7 @@ lm_irqcommon: * actually occurs with interrupts still disabled). */ - ldr r14, =EXC_RETURN /* Load the special value */ + ldr r14, =EXC_RETURN_PRIVTHR /* Load the special value */ #endif /* Restore the interrupt state */ diff --git a/arch/arm/src/lpc17xx/lpc17_vectors.S b/arch/arm/src/lpc17xx/lpc17_vectors.S index 06b6afdf6b..569559079d 100644 --- a/arch/arm/src/lpc17xx/lpc17_vectors.S +++ b/arch/arm/src/lpc17xx/lpc17_vectors.S @@ -64,13 +64,6 @@ #define IDLE_STACK (_ebss+CONFIG_IDLETHREAD_STACKSIZE-4) #define HEAP_BASE (_ebss+CONFIG_IDLETHREAD_STACKSIZE) -/* The Cortex-M3 return from interrupt is unusual. We provide the following special - * address to the BX instruction. The particular value also forces a return to - * thread mode and covers state from the main stack point, the MSP (vs. the MSP). - */ - -#define EXC_RETURN 0xfffffff9 - /************************************************************************************************ * Global Symbols ************************************************************************************************/ @@ -378,7 +371,7 @@ lpc17_common: * actually occurs with interrupts still disabled). */ - ldr r14, =EXC_RETURN /* Load the special value */ + ldr r14, =EXC_RETURN_PRIVTHR /* Load the special value */ #endif /* Restore the interrupt state */ diff --git a/arch/arm/src/sam3u/sam3u_vectors.S b/arch/arm/src/sam3u/sam3u_vectors.S index baaeb54b95..f1d85b8b88 100644 --- a/arch/arm/src/sam3u/sam3u_vectors.S +++ b/arch/arm/src/sam3u/sam3u_vectors.S @@ -65,13 +65,6 @@ #define IDLE_STACK (_ebss+CONFIG_IDLETHREAD_STACKSIZE) #define HEAP_BASE (_ebss+CONFIG_IDLETHREAD_STACKSIZE) -/* The Cortex-M3 return from interrupt is unusual. We provide the following special - * address to the BX instruction. The particular value also forces a return to - * thread mode and covers state from the main stack point, the MSP (vs. the MSP). - */ - -#define EXC_RETURN 0xfffffff9 - /************************************************************************************************ * Global Symbols ************************************************************************************************/ @@ -406,7 +399,7 @@ sam3u_common: * actually occurs with interrupts still disabled). */ - ldr r14, =EXC_RETURN /* Load the special value */ + ldr r14, =EXC_RETURN_PRIVTHR /* Load the special value */ #endif /* Restore the interrupt state */ diff --git a/arch/arm/src/stm32/stm32_allocateheap.c b/arch/arm/src/stm32/stm32_allocateheap.c index 3eed90dd45..e6ba2b9472 100644 --- a/arch/arm/src/stm32/stm32_allocateheap.c +++ b/arch/arm/src/stm32/stm32_allocateheap.c @@ -48,8 +48,10 @@ #include #include "chip.h" +#include "mpu.h" #include "up_arch.h" #include "up_internal.h" +#include "stm32_mpuinit.h" /**************************************************************************** * Private Definitions diff --git a/arch/arm/src/stm32/stm32_vectors.S b/arch/arm/src/stm32/stm32_vectors.S index c81ae74f57..6ecd92b74c 100644 --- a/arch/arm/src/stm32/stm32_vectors.S +++ b/arch/arm/src/stm32/stm32_vectors.S @@ -43,6 +43,7 @@ #include #include "chip.h" +#include "exc_return.h" /************************************************************************************ * Configuration @@ -72,13 +73,6 @@ #define IDLE_STACK (_ebss+CONFIG_IDLETHREAD_STACKSIZE-4) #define HEAP_BASE (_ebss+CONFIG_IDLETHREAD_STACKSIZE) -/* The Cortex-M3 return from interrupt is unusual. We provide the following special - * address to the BX instruction. The particular value also forces a return to - * thread mode and covers state from the main stack point, the MSP (vs. the MSP). - */ - -#define EXC_RETURN 0xfffffff9 - /************************************************************************************ * Global Symbols ************************************************************************************/ @@ -387,7 +381,7 @@ stm32_common: * actually occurs with interrupts still disabled). */ - ldr r14, =EXC_RETURN /* Load the special value */ + ldr r14, =EXC_RETURN_PRIVTHR /* Load the special value */ #endif /* Restore the interrupt state */