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reconcile architectures w/o interrupt controllers

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git-svn-id: svn://svn.code.sf.net/p/nuttx/code/trunk@1153 42af7a65-404d-4744-a932-0658087f49c3
This commit is contained in:
patacongo 2008-11-07 16:59:36 +00:00
parent 1e23712132
commit 8e0de5260d
9 changed files with 20 additions and 66 deletions
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2
arch/arm/include/str71x/irq.h
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@ -110,8 +110,6 @@ extern "C" {
* Public Functions
************************************************************************************/
EXTERN int up_irqpriority(int irq, ubyte priority); /* Set interrupt priority (0-15) */
#undef EXTERN
#ifdef __cplusplus
}

4
arch/arm/src/str71x/str71x_irq.c
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@ -169,14 +169,14 @@ void up_maskack_irq(int irq)
}
/****************************************************************************
* Name: up_irqpriority
* Name: up_prioritize_irq
*
* Description:
* set interrupt priority
*
****************************************************************************/
int up_irqpriority(int irq, ubyte priority)
int up_prioritize_irq(int irq, int priority)
{
uint32 addr;
uint32 reg32;

2
arch/arm/src/str71x/str71x_timerisr.c
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@ -184,7 +184,7 @@ void up_timerinit(void)
/* Set the IRQ interrupt priority */
up_irqpriority(STR71X_IRQ_SYSTIMER, 1);
up_prioritize_irq(STR71X_IRQ_SYSTIMER, 1);
/* Attach the timer interrupt vector */

2
arch/sh/src/common/up_doirq.c
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@ -81,7 +81,7 @@ void up_doirq(int irq, uint32* regs)
current_regs = regs;
/* Mask and acknowledge the interrupt */
/* Mask and acknowledge the interrupt (if supported by the chip) */
up_maskack_irq(irq);

6
arch/sh/src/common/up_internal.h
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@ -171,9 +171,13 @@ extern void up_wdtinit(void);
extern void up_timerinit(void);
/* Defined in up_irq.c */
/* Defined in chip-specific logic if CONFIG_ARCH_NOINTC is not set */
#ifndef CONFIG_ARCH_NOINTC
extern void up_maskack_irq(int irq);
#else
# define up_maskack_irq(irq)
#endif
/* Defined in board/up_leds.c */

2
arch/sh/src/sh1/sh1_head.S
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@ -232,7 +232,7 @@ __start0:
add #4, r0 /* R0: Address of next byte to clear in BSS */
cmp/ge r0, r1 /* End of BSS? */
bt 3b /* Loop until the end of BSS */
nop /* Delay slot
nop /* Delay slot */
/* Configure the uart so that we can get debug output as soon
* as possible.

44
arch/sh/src/sh1/sh1_irq.c
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@ -88,54 +88,14 @@ void up_irqinitialize(void)
}
/****************************************************************************
* Name: up_disable_irq
*
* Description:
* Disable the IRQ specified by 'irq'
*
****************************************************************************/
void up_disable_irq(int irq)
{
#warning "To be provided"
}
/****************************************************************************
* Name: up_enable_irq
*
* Description:
* Enable the IRQ specified by 'irq'
*
****************************************************************************/
void up_enable_irq(int irq)
{
#warning "To be provided"
}
/****************************************************************************
* Name: up_maskack_irq
*
* Description:
* Mask the IRQ and acknowledge it
*
****************************************************************************/
void up_maskack_irq(int irq)
{
#warning "To be provided"
}
/****************************************************************************
* Name: up_irqpriority
* Name: up_prioritize_irq
*
* Description:
* set interrupt priority
*
****************************************************************************/
#warning "Should this be supported?"
void up_irqpriority(int irq, ubyte priority)
void up_prioritize_irq(int irq, int priority)
{
#warning "To be provided"
}

22
arch/sh/src/sh1/sh1_serial.c
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@ -425,24 +425,16 @@ static int up_attach(struct uart_dev_s *dev)
/* Attach the RDR full IRQ */
ret = irq_attach(priv->irq + , up_interrupt);
ret = irq_attach(priv->irq + SH1_RXI_IRQ_OFFSET, up_interrupt);
if (ret == OK)
{
/* Enable the interrupt
*/
/* Attach the TDR empty IRQ */
up_enable_irq(priv->irq);
}
/* Enable the RDR full and TDR empty interrupts at the interupt controller
* (RX and TX interrupts are still disabled in the SCI)
*/
if (ret == OK)
{
up_enable_irq(priv->irq);
up_enable_irq(priv->irq);
ret = irq_attach(priv->irq + SH1_TXI_IRQ_OFFSET, up_interrupt);
if (ret < 0)
{
(void)irq_detach(priv->irq + SH1_RXI_IRQ_OFFSET);
}
}
return ret;

2
arch/sh/src/sh1/sh1_timerisr.c
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@ -104,7 +104,7 @@ void up_timerinit(void)
/* Set the IRQ interrupt priority */
up_irqpriority(STR71X_IRQ_SYSTIMER, 1);
up_prioritize_irq(STR71X_IRQ_SYSTIMER, 1);
/* Attach the timer interrupt vector */